High-Efficiency Flicker-Free LED Driver with Soft-Switching Feature

Abstract

A novel interleaved DC-DC buck converter is proposed to drive high-brightness light-emitting diodes (LEDs). The circuit configuration mainly consists of two buck converters, which are connected in parallel and use interleaved operation. Through interleaved operation, the power capability of the converter is doubled. Traditionally, two individual inductors are used in the two buck converters. The difference between conventional parallel-operated buck converters using two energy storage inductors and the proposed circuit is that the proposed circuit uses two small inductors and a coupled inductor that replace the two inductors of the buck converters. In this way, both buck converters can be designed to operate in discontinuous-current mode (DCM), even if the magnetizing inductance of the coupled inductor is large. Therefore, the freewheeling diodes can achieve zero-current switching off (ZCS). Applying the principle of conservation of magnetic flux, the magnetizing current is converted between the two windings of the coupled inductor. Because nearly constant magnetizing current continuously flows into the output, the output voltage ripple can be effectively reduced without the use of large-value electrolytic capacitors. In addition, each winding current can drop from positive to negative, and this reverse current can discharge the parasitic capacitor of the active switch to zero volts. In this way, the active switches can operate at zero-voltage switching on (ZVS), leading to low switching losses. A 180 W prototype LED driver was built and tested. Our experimental results show satisfactory performance.

1. Introduction

Compared with fluorescent lamps or high-intensity gas-discharged lamps, light-emitting diodes (LED) have the advantages of higher luminous efficiency, longer lifespans, and higher color rendering, and have been widely used in various lighting systems [1,2,3,4]. In advanced countries, lighting electricity accounts for a high proportion of overall electricity consumption, so research on high-efficiency LED drivers has become an important topic in academia and industry. In general, circuit efficiency and lifetime are two important considerations when designing LED drivers [5,6,7].

The characteristics of LEDs are very similar to those of ordinary diodes, and they are both driven by DC voltage. Researchers have proposed various DC-DC converters to drive LEDs. Because the rated voltage of each LED is very small and increasing the output voltage by connecting many LEDs in series is not a practical approach, buck converters that can easily be pulsed-width modulation (PWM)-controlled to achieve low output voltage are commonly used [8,9,10,11,12]. In addition, the buck converter has a circuit topology in which the energy-storage inductor is connected in series with the output terminal. By designing a buck converter that operates in continuous-current mode (CCM), the inductor can continue to provide current to the output terminal. Compared with other commonly used PWM converters such as boost, buck-boost, flyback converters, etc., the buck converter can use its smaller capacitance to effectively reduce the output voltage ripple to a reasonable value. This means that the buck converter does not require a large electrolytic capacitor that has a low lifespan of usually less than 10,000 h and is usually the bottleneck in the product life of power converters [1,3,13].

Similar to other PWM converters, buck converters have the advantages of simple circuit structure and easy control, yet also have the disadvantage of hard switching; the active switch cannot meet zero-voltage switching on (ZVS), resulting in huge switching losses. In order to solve the problem of hard switching, some soft-switching technologies use active clamping circuits or snubber circuits to enable the active switches to achieve ZVS [14,15,16,17,18]. However, in addition to more complex control, these soft-switching technologies require components such as auxiliary switches, diodes, inductors, and capacitors, resulting in higher product costs. Moreover, the current loop in the active clamp circuit or the snubber circuit also generates conduction loss, and some auxiliary switches cannot meet the ZVS, resulting in high switching losses. Another technique used to make the active switch operate at ZVS is using the control method of synchronous rectification (SR) [19,20,21]. When applying SR technology, MOSFETs must be used to replace the original flywheel diodes in the circuit. In order to ensure ZVS operation, SR technology must detect the inductor current and turn on the active switch when the inductor current drops to a negative value. Therefore, the control circuit of SR technology is more complex due to the need for additional MOSFETs and current detection circuits.

Another major factor affecting converter efficiency is that the power diodes do not operate at zero-current switching off (ZCS). As mentioned before, in order to reduce the current/voltage ripple, the buck converter should operate in CCM so its freewheeling diode is turned off when there is forward current. When a diode does not turn off at zero current due to the rapid return of minority carriers across the space charge region, a large reverse current is generated, which causes problems such as increased diode loss, reduced circuit efficiency, and increased electromagnetic interference (EMI).

Aiming for high circuit efficiency and long product lifetime, we developed a new converter to drive high-brightness LEDs. The circuit topology is mainly composed of two interleaved buck converters in which a coupled inductor is used. Through interleaved operation, the magnetizing current of the coupled inductor continuously flows into the output terminal. The output voltage/current ripple can be effectively reduced without using a large electrolytic capacitor. In addition, the active switches can operate at ZVS, and the freewheel diodes can operate at ZCS. A 180 W prototype LED driver was built and measured to verify the feasibility of this proposed circuit.

2. Proposed Circuit Topology and Operating Principle

2.1. Circuit Topology

Figure 1 shows the proposed LED driver, which is mainly composed of two buck converters. One buck converter consists of a MOSFET S₁, a freewheel diode D₁, an inductor L₁, and one winding of a coupled inductor T₁, while the other converter consists of a MOSFET S₂, a freewheel diode D₂, an inductor L₂, and the other winding of the coupled inductor. Here, the two windings are called primary and secondary windings. Capacitances C_DS1 and C_DS2 and diodes D_S1 and D_S2 are the parasitic capacitances and intrinsic diodes of S₁ and S₂. S₁ and S₂ are alternately turned on and off by two gated voltages, v_GS1 and v_GS2. As shown in Figure 2, v_GS1 and v_GS2 are high-frequency square waveforms. They have the same frequency f_s and the same duty cycle D, and there is an overlap time during which both square waves are high voltage.

The coupled inductor consists of a magnetic core and two windings with the same number of turns. It is modeled by using a simplified transformer model, as shown in Figure 3, where L₁₁ and L₂₂ represent the leakage inductance of each winding, T_c is an ideal transformer with a turn ratio equal to 1:1, and magnetizing inductance is L_M. The voltage across L_M, the current flowing in the two windings, and the magnetizing inductance are denoted as $v_T$, $i_{T1}$, $i_{T2}$, and $i_{lm}$, respectively. Based on the simplified model, the relation between these currents can be expressed as:

$$i_{l1}=i_{lm}+i_{T1}$$

(1)

$$i_{l2}=i_{T2}=-i_{T1}$$

(2)

Adding (1) and (2), we obtain:

$$i_{lm}=i_{l1}+i_{l2}$$

(3)

Equation (3) states that magnetizing current is equal to the sum of the two winding currents, i.e., if the magnetizing current remains constant, the magnetizing current can be converted to flow between the two windings. Using (3) and Faraday’s law of inductance, the following equation is written:

$$v_T=\frac{L_M{di}_{lm}}{dt}=\frac{L_{M}d(i_{l1}+i_{l2})}{dt}$$

(4)

2.2. Steady-State Circuit Analysis

2.2.1. Equivalent Circuits of Different Operating Modes

In order to ensure ZVS and ZCS operation, buck converters are designed to operate in DCM. At steady-state operation, the circuit operation can be divided into ten operating modes in one high-frequency cycle. Figure 4 shows the equivalent circuits for different operating modes, where the leakage inductance L₁₁ and L₂₂ are combined with L₁ and L₂:

$$L_{l1}=L_1+L_{11}$$

(5)

$$L_{l2}=L_2+L_{22}$$

(6)

As shown in Figure 4a, the voltages across L_l1 and L_l2 are denoted as $v_{l1}$ and $v_{l2}$, respectively. The following assumptions are made for simplifying the circuit analysis:

• The resistances of all components are neglected.
• L_l1 and L_l2 are equal (L_l1 = L_l2 = L_l).
• L_M is large; hence, $i_{lm}$ only changes slightly within one switching period.
• The output capacitance C_o is large enough to have a constant output voltage $V_{LED}$.

The conceptual voltage and current waveforms of the main components for each operation mode are shown in Figure 5.

2.2.2. Detailed Circuit Analysis of Different Operating Modes

Mode I (t₀ < t < t₁)

Before mode I, S₁ and S₂ are both on, as shown in Figure 4j. Because S₂ is turned on before S₁, most of $i_{lm}$ flows through the secondary winding. Therefore, $i_{l2}$ is much larger than $i_{l1}$. Mode I starts at the moment when S₂ is turned off. Figure 4a shows the equivalent circuit. S₁ remains on, and $i_{l2}$ charges the parasitic capacitance C_DS2. Because C_DS2 is very small and $i_{l2}$ is high, C_DS2 is quickly charged to V_in. When $v_{DS2}$ is equal to V_in, mode I ends. As mentioned above, because C_DS2 is small and the charging current is large, the duration of this mode is very short.

Mode II (t₁ < t < t₂)

S₂ is off, and the voltage $v_{DS2}$ is maintained at $V_{in}$. The current $i_{l2}$ converts from S₂ to flow through D₂ to the output terminal. From Figure 4b, the voltage equations of the buck converters are as follows:

$$v_{l1}+v_T+V_{LED}=V_{in}$$

(7)

$$v_{l2}+v_T+V_{LED}=0$$

(8)

Adding (7) and (8) results in:

$$V_{in}=\left(v_{l1}+v_{l2}\right)+2v_T+2V_{LED}$$

(9)

Applying Faraday’s law to L_l1 and L_l2 and using (3) results in:

$$v_{l1}+v_{l2}=\frac{L_{l}d{i}_{l1}}{dt}+\frac{L_{l}d{i}_{l2}}{dt}=\frac{L_{l}d{i}_{lm}}{dt}$$

(10)

Substituting (4) and (10) into (9) yields:

$$v_T=\frac{L_M}{L_l+2L_M}\left(V_{in}-2V_{LED}\right)$$

(11)

Substituting (11) into (7) and (8) yields:

$$v_{l1}=\frac{L_M+L_l}{L_l+2L_M}{V}_{in}-\frac{L_l}{L_l+2L_M}{V}_{LED}$$

(12)

$$v_{l2}=-\frac{L_M}{L_l+2L_M}{V}_{in}-\frac{L_l}{L_l+2L_M}{V}_{LED}$$

(13)

Because L_M is much larger than L_l, (12) and (13) show that $v_{l1}$ is positive and $v_{l2}$ is negative. Therefore, $i_{l1}$ rises and $i_{l1}$ decreases. In other words, when S₂ is turned off, the current flowing through the secondary winding of the coupled inductor is converted to flow through the primary winding. When the current $i_{l1}$ drops to zero, the circuit enters the next operating mode.

Mode III (t₂ < t < t₃)

This mode describes the short duration of discharging C_DS2 to −0.7 V. From Figure 4c, the voltages across L_l1 and L_l2 are:

$$v_{l1}=V_{in}-v_T-V_{LED}$$

(14)

$$v_{l2}=V_{in}-v_T-v_{DS2}-V_{LED}$$

(15)

Adding (14) and (15) yields:

$$v_{l1}+v_{l2}=2V_{in}-2v_T-2V_{LED}-v_{DS2}$$

(16)

Substituting (4) and (10) into (16) derives:

$$v_T=\frac{L_M}{L_l+2L_M}(2V_{in}-2V_{\mathit{LED}}-v_{\mathit{DS}2})$$

(17)

Substituting (17) into (14) and (15) yields:

$$v_{l1}=\frac{L_l}{L_l+2L_M}\left(V_{in}-V_{LED}\right)+\frac{L_M}{L_l+2L_M}{v}_{DS2}$$

(18)

$$v_{l2}=\frac{L_l}{L_l+2L_M}\left(V_{in}-V_{LED}\right)-\frac{L_l+L_M}{L_l+2L_M}{v}_{DS2}$$

(19)

At the beginning of this mode, $v_{DS2}$ is equal to V_in. Equation (19) reveals that $v_{l2}$ is negative. Therefore, $i_{l2}$ continues to decrease from zero to become negative. The capacitance $C_{DS2}$ is discharged, and $v_{DS2}$ decreases. From (17) to (19), it can be seen that v_T and $v_{l2}$ increase, while $v_{l1}$ decreases. As soon as $v_{DS2}$ decreases to −0.7 V, D_S2 is turned on, and the circuit begins operating in mode IV.

Mode IV (t₃ < t < t₄)

From Figure 4d, neglecting the diode conducting voltage, the voltage equations of the buck converters are:

$$v_{l1}+v_T+V_{LED}=V_{in}$$

(20)

$$v_{l2}+v_T+V_{LED}=V_{in}$$

(21)

Adding (20) and (21), we obtain:

$$2V_{in}=\left(v_{l1}+v_{l2}\right)+2v_T+2V_{LED}$$

(22)

Substituting (4) and (10) into (22) derives:

$$v_T=\frac{2L_M}{L_l+2L_M}\left(V_{in}-V_{LED}\right)$$

(23)

Substituting (23) into (20) and (21), we obtain:

$$v_{l1}=v_{l2}=\frac{L_l}{L_l+2L_M}\left(V_{in}-V_{LED}\right)$$

(24)

From (23) and (24), $v_{l1}$, $v_{l2}$, and $v_T$ are all positive, so $i_{l1}$, $i_{l2}$, and $i_{lm}$ all increase. Because L_M is much larger than L_l, (24) shows that $v_{l1}$ and $v_{l2}$ are small, and $i_{l1}$ and $i_{l2}$ slowly rise. Before $i_{l2}$ rises to zero, $v_{\mathit{GS}2}$ changes from low to high level in this mode. When $i_{l2}$ rises to zero and changes its polarity, it flows through S₂, and the circuit enters the next operating mode.

Mode V (t₄ < t < t₅)

S₁ and S₂ are both on. Before S₂ is turned on, D_S2 is on to clamp S₂ at zero volts, so S₂ fulfills ZVS. Figure 4e shows the equivalent circuit of this mode. The equations of $v_{l1}$, $v_{l2}$, and $v_T$ are the same as those of mode IV, so $i_{l1}$, $i_{l2}$, and $i_{lm}$ continue to rise. When $v_{\mathit{GS}1}$ changes from high to low level, S₁ is turned off and the circuit enters operation mode VI.

Mode VI (t₅ < t < t₆) to Mode X (t₉ < t < t₁₀)

Figure 4f–j represents the equivalent circuits of operating modes VI to X, respectively. The circuit operation of modes VI to X is similar to that of modes I to V so is not be repeated here.

When $v_{\mathit{GS}2}$ changes from high to low level, S₂ is turned off, and the circuit enters mode I of the next high-frequency cycle.

3. Mathematical Equation Derivation

3.1. Magnetizing Current and Inductance Design Equation

According to the previous assumption that L_M is large enough, the magnetizing current I_LM can be regarded as a constant. In addition, L_M is assumed to be much higher than L_l. Therefore, in mode II, from (12) and (13), $v_{l1}$ and $v_{l2}$ are approximately equal to:

$$v_{l1}\approx \frac{V_{in}}{2}$$

(25)

$$v_{l2}\approx \frac{-V_{in}}{2}$$

(26)

Mode III describes the process in which the parasitic capacitance of S₂ is discharged from V_in to −0.7 V. In general, C_DS2 is small, so the duration of mode III is very short. During this brief period, the drop of $i_{l2}$ is also very small, so when mode III ends, $i_{l2}$ is almost equal to zero (as shown in Figure 5).

In modes IV and V, from (24), v_l1 and v_l2 are approximately equal to zero:

$$v_{l1}=v_{l2}=\frac{L_l}{L_l+2L_M}\left(V_{in}-V_{LED}\right)\approx 0$$

(27)

Because $v_{l1}$ and $v_{l2}$ are almost zero, $i_{l1}$ and $i_{l2}$ hardly change during modes IV and V. To summarize the above description, in mode II, the increasing value of $i_{l1}$ is equal to the decreasing value of $i_{l2}$, and the increasing value (or decreasing value) is approximately equal to I_LM, which can be expressed as:

$$I_{LM}=\frac{V_{in}}{2L_l}\cdot t_f$$

(28)

where $t_f$ represents the duration of mode II ($t_f$ = $t_2$ − $t_1$)

In mode II, $v_T$ is negative and $i_{lm}$ decreases. On the contrary, in modes IV and V, $v_T$ is positive and $i_{lm}$ increases. The sum of the durations of modes IV and V is defined as t_r (t_r = t₅ − t₃). At a steady-state operation, the average voltage of $v_T$ is equal to zero. Using (11) and (23) yields:

$$\overline{v_T}=\frac{L_M}{L_l+2L_M}\left(V_{in}-2V_{LED}\right)\cdot t_f+\frac{2L_M}{L_l+2L_M}\left(V_{in}-V_{LED}\right)\cdot t_r=0$$

(29)

The sum of the fall time and rise time of $i_{lm}$ equals half of the switching period:

$$t_f+t_r=0.5T_s$$

(30)

where T_s is the switching period of the active switch. Substituting (30) into (29) gives:

$$t_f=\left(1-\frac{V_{LED}}{V_{in}}\right)T_s$$

(31)

$$t_r=\left(\frac{V_{LED}}{V_{in}}-\frac{1}{2}\right)T_s$$

(32)

Because both t_r and t_f must be positive values, (30) and (31) imply that the constraints for realizing the LED driver in this study are:

$$\frac{1}{2}{V}_{in}<V_{LED}<V_{in}$$

(33)

As mentioned above, because the rise amount of i_l1 in mode II is almost equal to I_LM, the following equation can be deduced by substituting (31) into (28):

$$I_{LM}=\frac{\left(V_{in}-V_{LED}\right)T_s}{2L_l}$$

(34)

At steady-state operation, I_LM is equal to the LED current:

$$I_{LED}=\frac{V_{LED}}{R_{LED}}=I_{LM}=\frac{\left(V_{in}-V_{LED}\right)T_s}{2L_l}$$

(35)

Using (35), it can be deduced that the inductance of L_l is equal to:

$$L_l=\frac{R_{LED}(V_{in}-V_{LED})}{2V_{LED}{f}_s}=\frac{(V_{in}-V_{LED})V_{LED}}{2P_o{f}_s}$$

(36)

where P_o represents the output power of the LED driver.

3.2. LED Voltage Ripple Factor

Figure 6 shows the conceptual waveform of the magnetizing current. Using (23) and (32), the change in $i_{lm}$ is approximately equal to:

$$\Delta I_{LM}=\frac{v_T}{L_M}\cdot t_r\approx \frac{1}{2L_M{f}_s}\left(V_{in}-V_{LED}\right)\cdot \left(\frac{2V_{LED}}{V_{in}}-1\right)$$

(37)

The output capacitor is charged when $i_{lm}$ is higher than I_LED. The light blue area represents the amount of charge flowing into C_o, expressed as:

$$\Delta Q=\frac{\Delta I_{LM}}{4}\cdot \frac{T_s}{2}=\frac{\left(V_{in}-V_{LED}\right)\cdot \left(\frac{2V_{LED}}{V_{in}}-1\right)}{16L_M{f}_s^2}$$

(38)

Using (38), the ripple and ripple factor of the output voltage are expressed as:

$$\Delta V_{LED}=\frac{\left(V_{in}-V_{LED}\right)\cdot \left(\frac{2V_{LED}}{V_{in}}-1\right)}{16L_M{f}_s^2{C}_o}$$

(39)

$$r_v=\frac{\Delta V_{LED}}{V_{LED}}=\frac{\left(\frac{V_{in}}{V_{LED}}-1\right)\cdot \left(\frac{2V_{LED}}{V_{in}}-1\right)}{16L_M{f}_s^2{C}_o}$$

(40)

4. Prototype LED Driver and Experimental Results

4.1. Parameter Design and Control Circuit

A 180 W prototype of the proposed LED driver was built and tested to verify its feasibility. The specifications is shown in

Table 1. Specifications of the proposed LED driver.

Item	Value
Input Voltage, Vin	60 V
Output Voltage, VLED	36 V
Output Power, Po	180 W
Voltage Ripple Factor, rv	<1%
Switching Frequency, fs (at rated power)	50 kHz
3 W LED Rated Voltage	3.6 V
3 W LED Rated Current	0.83 A

. The load consisted of sixty 3 W LEDs, and the rated voltage and current of each LED were 3.6 V and 0.83 A, respectively. The LEDs were connected as follows: 6 strings of LEDs in parallel, with each string containing 10 LEDs in series. Hence, the output voltage and current at the rated power operation were 36 V and 5.0 A, respectively. The LED equivalent resistance R_LED was calculated to be 7.2 Ω. In this illustrative example, the ripple factor of output voltage was designed to be less than 1%.

Using (36), the values of L_l1 and L_l2 were obtained:

$$L_{l1}=L_{l2}=\frac{\left(60-36\right)\times 36}{2\times 180\times 50\times {10}^3}=48 \mathsf{\mu }\mathrm{H}$$

(41)

For a buck converter operating in DCM, the input power is inversely proportional to the inductance value. Here, assuming 95% energy conversion efficiency, L_l1 and L_l2 were designed to be 45.6 μF. As mentioned earlier in this article, the magnetizing inductance should be much higher than the value of L_l1 and L_l2. Here, the magnetizing inductance was 732 μF, which was about 16 times that of L_l1 and L_l2.

Using (40), the value of C_o was calculated at a 1% ripple factor:

$$C_o=\frac{\left(60/36-1\right)\cdot \left(2\times 36/60-1\right)}{16\times 732\times {10}^{-6}\times {\left(50\times {10}^3\right)}^2\times 0.01}=0.46 \mathsf{\mu }\mathrm{F}$$

(42)

In order to have a ripple factor of less than 1%, a metal-film capacitor with capacitance of 1 μF was chosen. The component parameters are listed in

Table 2. Component parameters.

Item	Value
Inductance, Ll1, Ll2	45.6 μH, 45.6 μH
Magnetizing Inductance, LM	732 μH
Output capacitance, Co	1 μF (metal-film capacitor)
Diodes D1, D2	C3D10060A
Active switches S1, S2	STW52NK25Z

.

As shown in (36), the output power is inversely proportional to the switching frequency. Therefore, the LED current can be regulated by a frequency control scheme. The control circuit is shown in Figure 7. The output voltages of the microcontroller (dsPIC33FJ16GS504) were fed to two gate drivers (TLP250) that output v_GS1 and v_GS2 to alternately turn S₁ and S₂ on and off. The current sensor (ACS712) sensed the LED current and output a voltage value proportional to the magnitude of the current. The difference between the output voltage of the current sensor and a reference value was measured by the operational amplifier (OP1) and sent to the other operational amplifier (OP2) for voltage amplification; then, the amplified voltage was sent to the microprocessor to adjust the switching frequency.

4.2. Experimental Results

Figure 8 shows the voltage and current waveforms of the two active switches. There was a small amount of negative current flowing through each active switch, and the gate voltage changed from low to high before the negative current became positive. When the negative current discharged the parasitic capacitance of the switch to −0.7 V, it turned on the intrinsic diode. Because the intrinsic diode was turned on, the voltage across the switch was clamped to almost zero voltage; therefore, the switch satisfied ZVS operation. Figure 9 shows the current waveforms of the freewheel diodes. Both diode currents dropped to zero and naturally turned off, leading to ZCS operation. Figure 10 shows the waveforms of the current in both windings of the coupled inductor. As predicted, the magnetizing current was converted between the two windings, and both winding currents dropped to slightly below zero. Figure 11 shows the output voltage and output current waveforms. The measured output power was equal to 181.2 W. The calculated ripple factor was 0.8%. The power losses in the components at the rated power operation were measured and are shown in

Table 3. Measured losses in the components.

Item	Value
Coupled Inductors, LM	0.8 W
Inductors, L1, L2	0.23 W, 0.23 W
Active Switches, S1, S2	0.8 W, 0.8 W
Diodes, D1, D2	0.7 W, 0.7 W
Output Capacitor, Co	0.3 W

. Due to ZVS and ZCS operation, the circuit efficiency was as high as 97.5%.

The LED power was controlled by adjusting the switching frequency. The measured efficiency curves over a load range of 25% to 100% rated power are shown in Figure 12. Efficiency slightly dropped when the LEDs were dimmed from 80% to 25% of the rated power.

5. Conclusions

In this study, an interleaved DC-DC converter was designed for driving high-power LEDs. The circuit topology consists of two buck converters, which are alternately turned on and off. A coupled inductor consisting of a magnetic core and two windings is shared by the two buck converters. To maintain the magnetic flux continuity, the magnetizing current is converted between the two windings. In this way, the freewheel diodes can operate at ZCS and the active switches can operate at ZVS. In addition, because the magnetizing current is nearly constant and the buck converter continuously supplies the magnetizing current to the output terminal, the ripple voltage remains very small even when a small metal-film capacitor is used.

Detailed steady-state operation was analyzed and the mathematical equations for different modes were derived; thereafter, the component parameters were designed. Finally, a 180 W prototype circuit was implemented to drive sixty 3 W LEDs. By adjusting the switching frequency of the active switches, the LED power was dimmed from 100% to 25% rated power. Owing to ZVS and ZCS operation, the switching losses of the semiconductor devices were effectively reduced, leading to a high circuit efficiency. The measured circuit efficiency was as high as 97.5% at the rated power operation. At a low power operation, the circuit efficiency remained high. When the circuit was operated at 25% of its rated power, the efficiency was 94.7%. The output capacitor was a 1 μF metal-film capacitor; the measured ripple factor of the output voltage was as low as 0.8%. Without the use of any bulk electrolytic capacitors, the long lifetime of the proposed LED driver can be ensured. The experimental results verified the feasibility of the proposed circuit.