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An Innovative Successive Approximation Register Analog-to-Digital Converter for a Nine-Axis Sensing System

Department of Electronic Engineering, National Chiao Tung University, Hsinchu 300, Taiwan
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J. Low Power Electron. Appl. 2021, 11(1), 3; https://0-doi-org.brum.beds.ac.uk/10.3390/jlpea11010003
Received: 23 November 2020 / Revised: 18 December 2020 / Accepted: 6 January 2021 / Published: 9 January 2021
With nine-axis sensing systems in 5G smartphones, mobile power consumption has become increasingly important, and ultra-low-power (ULP) sensor circuits can decrease power consumption to tens of microwatts. This paper presents an innovative successive approximation register analog-to-digital converter, which comprises fine (three most significant bits (MSBs) plus course conversion (11 least significant bits (LSBs)) capacitive digital-to-analog converters (CDACs), ULP, four-mode reconfigurable resolution (9, 10, 11, or 12 bits), an internally generated clock, meta-detection, the switching base midpoint voltage (Vm) (SW-B-M), bit control logic, multi-phase control logic, fine (three MSBs) plus course conversion (11 LSBs) switch control logic, phase control logic, and an input signal plus negative voltage (VI + NEG) voltage generator. Then, the mechanism of the discrete Fourier transform (DFT)-based calibration is applied. The scalable voltage technique was used, and the analog/digital voltage was Vanalog (1.5 V) and Vdigital (0.9 V) to meet the specifications of the nine-axis ULP sensing system. The CDACs can reconfigure four-mode resolutions, 9–12 bits, for use in nine-axis sensor applications. The corresponding dynamic signal-to-noise and distortion ratio performance was 50.78, 58.53, 62.42, and 66.51 dB. In the 12-bit mode, the power consumption of the ADC was approximately 2.7 μW, and the corresponding figure of merit (FoM) was approximately 30.5 fJ for each conversion step. View Full-Text
Keywords: reconfigurable; SAR-ADC; fine (3 MSBs) plus course conversion (11 LSBs) CDAC; DFT-based reconfigurable; SAR-ADC; fine (3 MSBs) plus course conversion (11 LSBs) CDAC; DFT-based
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MDPI and ACS Style

Lin, C.-H.; Wen, K.-A. An Innovative Successive Approximation Register Analog-to-Digital Converter for a Nine-Axis Sensing System. J. Low Power Electron. Appl. 2021, 11, 3. https://0-doi-org.brum.beds.ac.uk/10.3390/jlpea11010003

AMA Style

Lin C-H, Wen K-A. An Innovative Successive Approximation Register Analog-to-Digital Converter for a Nine-Axis Sensing System. Journal of Low Power Electronics and Applications. 2021; 11(1):3. https://0-doi-org.brum.beds.ac.uk/10.3390/jlpea11010003

Chicago/Turabian Style

Lin, Chih-Hsuan, and Kuei-Ann Wen. 2021. "An Innovative Successive Approximation Register Analog-to-Digital Converter for a Nine-Axis Sensing System" Journal of Low Power Electronics and Applications 11, no. 1: 3. https://0-doi-org.brum.beds.ac.uk/10.3390/jlpea11010003

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