Fully Differential Miller Op-Amp with Enhanced Large- and Small-Signal Figures of Merit

Abstract

A highly power-efficient, fully differential Miller op-amp with accurately controlled output quiescent current is introduced. The op-amp can drive both capacitive and resistive load due to the presence of the auxiliary amplifier. This amplifier helps to achieve class AB operation of the proposed op-amp. The fully differential auxiliary amplifier is compact and uses a resistive local common-mode feedback network. It consumes only 6% of the total current of the op-amp. The proposed op-amp has several innovative features. Incorporating the auxiliary amplifier helps to improve the unity gain frequency, power efficiency, slew-rate, and common-mode rejection ratio of the proposed op-amp. It can drive a wide range of resistive (200 Ω–1 MΩ) and capacitive loads (5 pF–300 pF). The op-amp has a large signal dynamic current efficiency of 8.6 and a large signal static current efficiency of 7.9. The small-signal figure of merit is 8.7 for R_L = 1 MΩ and 7.3 for R_L = 200 Ω.

1. Introduction

Fully differential signal processing is a wise choice to maintain signal integrity in high-speed data acquisition systems such as communications, imaging, instrumentation, and video applications. Analog-to-digital converters [1] are essential components in high-speed data acquisition systems [2]. They need a differential amplifier to drive their differential input. The use of an integrated fully differential amplifier for modern mixed-signal [3] processing applications can provide many advantages such as: (a) increased immunity to external noise, (b) suppressed noise from power supply, (c) increased output voltage swing [4,5] for a given voltage rail, which is ideal for low-voltage systems, and (d) reduced even-order harmonics. Thus, designing a power-efficient fully differential amplifier [6] that can drive a wide range of resistive and capacitive loads is very useful for today’s battery-operated portable electronic equipment, e.g., for the Internet of Things (IoT) [7] applications. The conventional class-A [8] fully differential Miller op-amp has an asymmetric slew-rate (SR) and a current efficiency CE = I_outpk/I_totQ < 0.5, where I_outpk is the minimum of the positive and negative peak output currents: I_outpk = MIN{I_outpk ⁺, I_outpk⁻}. Most approaches to implement class AB output stages incorporate a floating battery between the gates of the output nMOS and pMOS transistors of a Miller op-amp. The popular class AB op-amps with floating batteries can be seen in [9,10]. A push-pull class AB op-amp [11,12,13] can be designed to drive both resistive and capacitive loads. However, the practical implementation of the floating battery is challenging in today’s sub-micron technology, where the supply voltage is a serious constraint. In order to maintain a well-defined constant output quiescent current, I_outQ independent on supply voltage, nominal component values, and technology parameter variations, the floating battery scheme requires an additional I_outQ control circuit. The control circuit can be complex and further increase the supply requirements and power dissipation, which can significantly lower the current efficiency.

In the proposed approach, an improved class-AB op-amp is implemented by utilizing a compact fully differential auxiliary amplifier instead of two floating batteries. This approach significantly improves the figures of merit of the op-amp over fully differential class AB Miller op-amps based on a floating battery implementation. The following section describes the scheme in detail. The op-amp’s performance is measured and compared using conventional: (a) large-signal dynamic current efficiency figures of merit FoM_Dyn = SR.C_L/P_Q [14,15], where SR is slew rate, P_Q is the quiescent power dissipation, and C_L is load capacitance; (b) small-signal figures of merit FoM_SS = f_u.C_L/P_Q [14,16], where f_u is the unity gain frequency; (c) and authors introduce a new large-signal static current efficiency figures of merit FoM_stat = I_outp^RL/I_Qtotal.

2. Proposed Op-Amp

The proposed class-AB op-amp shown in Figure 1 is a fully differential operational amplifier that can drive a wide range of resistive and capacitive loads. The op-amp uses a high gain telescopic input stage to keep a high DC open-loop gain even for low-valued resistive loads (high resistive loading conditions) that degrade the gain of the output stage and push-pull class AB output stages. Conventional Miller compensation is used to achieve stability over a wide range of loading conditions. The main contribution of this paper is the utilization of a compact, fully differential auxiliary amplifier (AuxAmp) that is used to achieve power-efficient class AB operation and improved unity gain frequency f_u in the proposed op-amp. As discussed in detail below, this approach offers several advantages with respect to conventional class AB schemes: it generates signal voltages V_Y and V_YP that are amplified versions and in phase with V_X and V_XP. In order to have enough headroom for the auxiliary amplifier’s input differential pair (M₄, M_4P), a floating battery V_SB is used to reduce the threshold voltage of M₄, M_4P. This floating battery is implemented using a diode-connected PMOS transistor with a minimal quiescent current, just like V_BAT in the input stage is used. In addition, M₄ and M_4P are scaled up by a factor of three. This is to reduce their drain-source saturation voltage V_DSsat. A resistive local common-mode feedback (RLCMFB) network is used as a load in order to obtain moderate gain A_Aux from the AuxAmp. The non-inverting gain of the auxiliary amplifier is given approximately by $A_{Aux}=\left(V_Y-V_Y{}_P\right)/V_X=\left(V_{YP}-V_Y\right)/V_{XP}=g_{m4,4P}{R}_{CMF}/2$. The AuxAmp increases the overall open-loop gain, the unity-gain frequency, and significantly the peak negative output currents and slew-rate of the op-amp. This AuxAmp also assists the proposed op-amp in maintaining an accurate output quiescent current I_OutQ minimizing the effect of temperature, supply voltage variations, and technology parameter variations on I_OutQ. The quiescent gate voltages V_Y, V_YP of transistors M_ON,ONP control the quiescent output current I_outQ. Under quiescent conditions, no current flows in resistors R_CMF, and the gate-source voltage of M_ON,ONP is V_Y = V_YP = V_GS5P,5Q, independent of the value of R_CMF that sets the gain A_Aux. The AuxAmp consumes only 6% of the total op-amp quiescent current, which helps to keep the op-amp’s current efficiency high.

2.1. Operation

In the presence of positive input differential signals, the voltage at node V_X decreases and at V_XP increases, while the voltages at node V_Y decrease and at node V_YP increase by a factor A_Aux. As a result, M_OP will provide a large output positive current and M_ONP a large negative output current. The drain currents of M_ON, M_OPP will decrease and eventually reach zero. Similarly, M_ON can provide large negative output currents for negative input signals, and M_OPP can provide large positive output currents as the voltage at V_XP decreases. In the conventional floating battery scheme where variations V_X, V_XP are transferred directly to V_Y, V_YP, the maximum negative output current is limited by the relatively small positive excursion of V_X, V_XP transferred to V_Y, V_YP. In the proposed scheme, the gain A_Aux increases significantly the excursion of V_Y, V_YP and the peak negative output current. A_Aux also increases the open-loop gain, common-mode rejection ratio (CMRR), power supply rejection ratio (PSRR), and unity gain frequency of the op-amp.

2.2. Frequency Response

The gain of the telescopic input stage A_I is given by (1).

$$A_I=g_{m1}{R}_X=g_{m1}\left(g_m{r}_o{}^2/2\right)$$

(1)

For simplicity, it is assumed that g_m and r_o are the transconductance gain and output resistance of all unit size NMOS and PMOS transistors, and R_X is resistance at nodes V_X, V_XP.

The single-ended gain of the auxiliary amplifier is given by $A_{Aux}=\left(g_{m4,4P}{R}_{Y,YP}\right)/2$. R_Y,YP is the resistance at nodes V_Y and V_YP: where $R_Y=r_{o4P}.g_{mCP2P}.r_{oCP2P}\left|\right|R_{CMF}\left|\right|r_o{}_{5P}$. The value of the R_CMF is selected in such a way so that $R_{CMF}\ll r_{o4}{}_P,r_{oCP2P},r_{o5P}$. As a result, R_Y can be approximated as R_Y ≈ R_CMF. Thus, gain of the auxiliary amplifier can be expressed approximately by (2).

$$A_{Aux}\approx \left(g_{m4,4P}{R}_{CMF}\right)/2$$

(2)

The gain of the output stage is given by (3).

$$A_{out}=(g_{mOP}+A_{Aux}{g}_{mON})R_{out}$$

(3)

where R_out is $R_{out}=r_{oOP}\left|\right|r_{oON}\left|\right|R_L$. g_mOP and g_mON are transconductance gains of output transistors M_OP and M_ON.

Thus, the open-loop DC gain A_OLDC of the proposed op-amp is expressed by (4).

$$A_{OLDC}=A_I{A}_{out}=\left({\left(g_m{r}_o\right)}^2/2\right)\left(g_{mouteff}{R}_{out}\right)$$

(4)

where $g_{mouteff}=g_{mOP}+A_{Aux}{g}_{mON}$.

The dominant pole is at node V_{X, XP,} and is given by (5).

$$f_{PDOMX}=1/\left(2\pi R_X{C}_X\right)$$

(5)

Here, C_X is given by $C_X=\left(1-(-A_{out})\right)C_C$.

The gain-bandwidth product (GBW) of the proposed op-amp is given by the expression (6).

$$\begin{array}{l}GBW=\left(A_I{A}_{out}\right)\frac{1}{2\pi R_X\left(1+A_{out}\right)C_C}\\ =\left(g_{m1}{A}_{out}\right)\frac{1}{2\pi \left(1+A_{out}\right)C_C}\end{array}$$

(6)

A_out is strongly dependent on R_L. For very low R_L values, it can even take values |A_out| < 1. Besides the dominant pole, the proposed op-amp has two pairs of high-frequency poles: one at V_Y (V_YP) and another at V_outP (V_outM). The output high-frequency pole f_Pout is given in (7).

$$f_{Pout}=\left(g_{mOP}+A_{Aux}{g}_{mON}+G_L\right)/\left(2\pi C_L\right)$$

(7)

In the proposed op-amp, the auxiliary amplifier causes f_Pout to be higher than output pole frequency f_{Pout_conv} of the conventional op-amp shown in Figure 2. The high-frequency output pole of the conventional op-amp of Figure 2 is given in (8).

$$f_{Pout\_conv}=\left(g_{mOP\_conv}+G_L\right)/2\pi C_L$$

(8)

where g_{mOP_conv} is the transconductance gain of the output PMOS transistor of the conventional op-amp. The value of f_Pout of the proposed op-amp for C_L = 300 pF and R_L = 1 MΩ is 6 MHz, whereas the output pole frequency for the conventional-A op-amp f_{Pout_conv} is only 687 kHZ for a similar loading condition.

It can be seen that the auxiliary amplifier in the proposed op-amp shifts the output pole to a higher frequency. Consequently, a higher unity gain frequency can be obtained in the proposed op-amp.

The pole at nodes V_Y, V_YP is expressed by (9).

$$f_{PY}=1/\left(2\pi R_{CMF}{C}_Y\right)$$

(9)

Here, C_Y is given by $C_Y\approx C_{gsON}+C_{dBCP2P}+C_{dB5P}+C_{gdON}\left(1+\left(\raisebox{1ex}{$A_{out}$}\!\left/ \!\raisebox{-1ex}{$A_{VY}$}\right.\right)\right)+C_{gd5P}$.

From (9), it can be said that the location of the poles (f_PY) at node V_Y,YP depends on the value of R_CMF. The high-frequency pole f_PY is inversely proportional to the value of R_CMF, i.e., $f_{PY}\propto 1/R_{CMF}$. Again from (2), it can be seen that the gain of the auxiliary amplifier depends on the value of R_CMF, i.e., $A_{Aux}\propto R_{CMF}$. Thus, the selection of R_CMF plays an essential role in determining the stability, overall open-loop gain, and slew-rate improvement of the proposed op-amp as the gain of the auxiliary control of the dynamic current of M_ON,ONP. In the proposed circuit, the value of the R_CMF is 60 kΩ. This selection of R_CMF helps to place f_PY at a higher frequency than the unity gain frequency of the op-amp. The higher value of f_pY helps achieve approximately constant gain from the auxiliary amplifier until the proposed op-amp’s unity gain frequency. The value of the f_PY in the proposed op-amp is 29 MHz, which is twice larger than the unity gain frequency of the proposed op-amp.

The zero is given by (10).

$$f_z=1/\left(2\pi C_C\left(R_C-{\left(g_{mOP}+A_{Aux}{g}_{mON}\right)}^{-1}\right)\right)$$

(10)

3. Results

The proposed and conventional class-A (Conv-A) op-amps are simulated with Cadence using TSMC 180 nm CMOS technology parameters. For a fair comparison, equal unit size pMOS and nMOS transistors with W/L = 10 µm/0.4 µm are used in both op-amps. The output nMOS and pMOS transistors are scaled up by the factors 5/1 and 8/0.7 with respect to unit size transistors. The value of the compensation capacitor is 3 pF for both op-amps. The only difference between the proposed and Conv-A op-amp is that the Conv-A op-amp does not have the auxiliary amplifier, which only increases power dissipation by 6%. The schematic diagram of the Conv-A amplifier is given in Figure 2. The value of the RCMF used in the auxiliary amplifier of the proposed op-amp is 60 kΩ. The values of RC in the proposed op-amp are 200 Ω and 6 kΩ for the capacitive loads CL = 5 pF and 300 pF, respectively. For the fixed CL, the selected compensation network can drive RL values from 1 MΩ to 200 Ω, whereas in the conventional op-amp for a similar capacitive load CL = 300 pF and 5 pF, the values of RC are 18 kΩ and 500 Ω. A bias current IB = 17 µA, dual supply voltages VDD = 900 mV, VSS = −900 mV, and a reference common-mode output voltage VrefCM = 0 V are used for the simulations of both op-amps. Figure 3 and Figure 4 show open-loop frequency responses of the Conv-A and the proposed op-amps. It can be seen from the responses that both op-amps are stable for the wide range of capacitive (5 pF–300 pF) and resistive load (200 Ω–1 MΩ). However, the proposed op-amp’s gain is higher and varies from 116.4 dB to 74.5 dB for RL, changing from 1 MΩ to 200 Ω. For similar loading conditions, the Conv-A op-amp has the gain that varies from 96.8 dB to 57.2 dB. The proposed op-amp achieves a higher gain because of the auxiliary amplifier.

The transient response of the proposed op-amp was simulated using the unity gain closed loop inverting amplifier configuration, shown in Figure 5. Equal R_in and R_f values of 100 kΩ were used in the simulation. Figure 6 shows the transient response of the proposed and Conv-A op-amps in unity gain inverting configuration for a 1 MHz, ±400 mVpp pulse input, with C_L = 300 pF and two resistive load values R_L = 200 Ω and 1 MΩ. From the pulse response, it can be seen that the Conv-A op-amp cannot follow the input pulse, whereas the proposed op-amp can follow the input for all the considered loading conditions. The proposed op-amp has a slew rate of 13 V/µs, whereas the Conv-A op-amp has a much lower slew rate of 0.9 V/µs. The proposed op-amp can provide ±4.36 mA peak currents to a 300 pF capacitor. On the contrary, the Conv-A op-amp can provide only 58 µA peak negative output currents, which corresponds to the class-A op-amp’s output quiescent current (I_outQ). Figure 7 shows the single-ended output currents of both op-amps in the 200 Ω resistive load for ±400 mV pulse input. It can be seen that due to the substantial limitation of the negative current in the Conv-A op-amp, the outputs cannot follow the negative excursion of the input pulse. As a result, the op-amp cannot provide differential complementary output signals. It can be seen that the peak negative current is –58 μA. On the other hand, the proposed op-amp can provide complementary output signals with equal positive and negative output currents of ±1 mA in the 200 Ω resistive loads for the ±200 mV pulse input.

Figure 8 shows the output current of the proposed and Conv-A op-amp for C_L = 300 pF, 5 pF, and R_L = 1 MΩ for the ±400 mVpp 1 MHz pulse input. The proposed op-amp can provide ±4.36 mA peak currents to 300 pF load capacitors. On the contrary, the Conv-A op-amp can provide only 58 µA negative output, which corresponds to the class-A op-amp’s output quiescent current (I_outQ). Figure 9 shows the total harmonic distortion of the proposed and Conv-A op-amp for a 400 mV amplitude sinusoidal signal whose frequency is varied from 1 kHz to 8 MHz. It can be seen that the proposed op-amp has much lower (35 dB) harmonic distortion than the Conv-A op-amp.

The proposed op-amp has close to rail-to-rail output swing from −1.69 V to 1.69 V for a ±1.7 V, 0.5 MHz triangular input signal. It can be seen in Figure 10.

Table 1. Corner analysis of op-amp at T = −20 °C.

Corner	tt	ff	fs	sf	ss	Std.
ITotalQ (µA)	253	251	250	249	247	2
fu (MHz) @ RL =1 MΩ	15.5	16.9	15.2	14	13.5	1.19
PM (o) @ RL =1 MΩ	59	56	56	62	63	2.92
Gain	117.9	114	117.6	118	117	1.5
SR (V/µs)	13	11	10	10	9	1.4
Ioutpk−RL =200 Ω (mA)	2	1.9	1.9	2	2	0.05

,

Table 2. Corner analysis of op-amp at T = 27 °C.

Corner	tt	ff	fs	sf	ss	Std.
ITotalQ (µA)	253	252	250	252	255	1.62
fu (MHz) @ RL =1 MΩ	13.4	14.5	13	13.2	12	0.8
PM (o) @ RL =1 MΩ	59	58	61	60	60	1.01
Gain (dB)	116.4	110	113	114.2	120	3.35
SR (V/µs)	13	12	11	12	14	1.01
Ioutpk− RL =200 Ω (mA)	2	1.9	2	2	2	0.04

and

Table 3. Corner analysis of op-amp at T = 120 °C.

Corner	tt	ff	fs	sf	ss	Std.
ITotalQ (µA)	251	259	251	252	255	3.07
fu (MHz) @ RL = 1 MΩ	9.5	9.4	9.5	10	9.2	0.26
PM (o) @ RL = 1 MΩ	58	58	58	57	59	0.63
Gain (dB)	100	95	111	110	117	7.9
SR (V/µs)	11	14	11	12	15	1.62
Ioutpk−RL =200 Ω (mA)	2	1.8	1.9	2	2	0.08

show the corner analysis of the proposed op-amp at different temperatures. It can be asserted that the proposed op-amp is robust against the variation of process technology and temperature. The standard deviation (Std.) for each parameter at different corners is calculated for each considered temperature and given in the table. The common-mode rejection ratios (CMRRs) and power supply rejection ratios (PSRRs) are measured, including 2% typical mismatches between the differential pair transistors in both op-amps. The positive and negative PSRRs are 95 dB and 92 dB. The CMRR of the proposed op-amp is 96 dB.

Table 4. Summary of the simulated results and performance comparison.

Parameter (Units)	Proposed	Conv-A	[17]	[18]	[19]	[20]	[21]
Inversion Level	SI	SI	SI	SI	SI	SI	SB
CMOS Process (µm)	0.18	0.18	0.18	0.18	0.18	0.35	0.18
Supply Voltage (V)	±0.9	±0.9	1.8	1.8	1.8	3.3	±300
Capacitive Load (pF)	5–300	5–300	10	1	100	25	10
Resistive Load (Ω)	1 M/200	1 M/200	-	-	-	500	-
SR (V/μs)	13	0.9	17.83	650	63	248.6	8.4
DC Gain (dB)	116.4/ 74.5	96.8/57.4	73	85.6	84	69.5	42.2
PM (º)	59/82 @CL = 300 pF, RL = 1 MΩ/ @CL = 300 pF, RL = 200 Ω	57/90	64	66.7	77	69.65	54
fu (MHz)	13.32/11.21	3.88/4.2	15	987	91	354	16.1
CMRR @DC (dB)	96	90	80	80	-	45	85.12
PSRR+ @DC (dB)	95	87	78	78	-	27.5	53.25
PSRR-@DC (dB)	92	85	-		-	-	56.89
Ioutpk + RL (µA)	2000 @200 Ω	1500 @200 Ω	-	-	-	2000 @500 Ω	-
Ioutpk−RL =200 Ω (µA)	2000	1500	-	-	-	0	-
ItotQ (µA)	253	182	239	1000	1722	8042	41.3
Power (μW)	455	327.6	429.68	1800	3100	26,540	24.8
Input Referred Noise	317@1 kHz nV/√Hz	330@1 KHz nV/√Hz	84@100 kHz nV/√Hz	118 µVrms (1 Hz–100 MHz)	340@100 kHz nV/√Hz	35.52 @100 kHz	69@1 MHz
FOMCEDyn (V.pF/µs.µW)	8.6	0.82	0.41	0.4	2	0.23	3.39
FOMSS (MHz.pF/µW)	8.7/7.3	3.5/3.8	0.35	0.5	2.9	0.33	6.49
FOMCEStat (µA/µW)	7.9	-	-	-	-	0.08	-

shows comprehensive simulation results of the proposed op-amp and comparisons of the performance with state-of-the-art works. The proposed op-amp has the highest static and dynamic current efficiency figures of merit.

4. Conclusions

The proposed fully differential op-amp can drive a wide range of resistive (200 Ω–1 MΩ) and capacitive (5–300 pF) loads. A compact auxiliary amplifier is used in the op-amp. This sets a well-controlled output quiescent current and increases the op-amp’s unity gain frequency, significantly the peak negative output current. The proposed op-amp has high dynamic and static current efficiencies as well as a large and small-signal figure of merit. The auxiliary amplifier consumes only 6% of the total op-amp current, making the proposed op-amp highly power-efficient.