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An 18-Gb/s/pin Single-Ended PAM-4 Transmitter for Memory Interfaces with Adaptive Impedance Matching and Output Level Compensation

1
Department of Electrical and Computer Engineering, Seoul National University, Seoul 08826, Korea
2
Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul 08826, Korea
3
Department of Electronics and Communications Engineering, Kwangwoon University, Seoul 01897, Korea
*
Author to whom correspondence should be addressed.
Academic Editor: Anna Richelli
Received: 24 June 2021 / Revised: 20 July 2021 / Accepted: 21 July 2021 / Published: 24 July 2021
(This article belongs to the Special Issue High-Speed I/O Circuits and Architectures)
This paper presents a method for preventing output level distortion while matching the channel impedance in the single-ended PAM-4 transmitter for memory interfaces. ZQ codes for all four output signal levels were obtained through ZQ calibration and saved in the ZQ code table. The ZQ code generator then adaptively selected the appropriate codes depending on the data pattern and delivered them to the output driver; this can improve the level separation mismatch ratio (RLM) while matching the channel impedance. To validate the effectiveness of our approach, a prototype chip with an active area of 0.035 mm2 was fabricated in a 65 nm CMOS process. It achieved the energy efficiency of 3.09 pJ/bit/pin at 18 Gb/s/pin, and its RLM was 0.971 while matching the channel impedance. View Full-Text
Keywords: single-ended signaling; transmitter; four-level pulse amplitude modulation (PAM-4); impedance matching; level separation mismatch ratio (RLM); memory interface single-ended signaling; transmitter; four-level pulse amplitude modulation (PAM-4); impedance matching; level separation mismatch ratio (RLM); memory interface
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MDPI and ACS Style

Hyun, C.; Jeong, Y.-U.; Kim, S.; Chae, J.-H. An 18-Gb/s/pin Single-Ended PAM-4 Transmitter for Memory Interfaces with Adaptive Impedance Matching and Output Level Compensation. Electronics 2021, 10, 1768. https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10151768

AMA Style

Hyun C, Jeong Y-U, Kim S, Chae J-H. An 18-Gb/s/pin Single-Ended PAM-4 Transmitter for Memory Interfaces with Adaptive Impedance Matching and Output Level Compensation. Electronics. 2021; 10(15):1768. https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10151768

Chicago/Turabian Style

Hyun, Changho, Yong-Un Jeong, Suhwan Kim, and Joo-Hyung Chae. 2021. "An 18-Gb/s/pin Single-Ended PAM-4 Transmitter for Memory Interfaces with Adaptive Impedance Matching and Output Level Compensation" Electronics 10, no. 15: 1768. https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10151768

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