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Applied Sciences
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Advanced Computer Architecture
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Advanced Computer Architecture

A special issue of Applied Sciences (ISSN 2076-3417). This special issue belongs to the section "Computing and Artificial Intelligence".

Deadline for manuscript submissions: closed (20 April 2023) | Viewed by 3649

Special Issue Editors

Prof. Dr. Mladen Berekovic

E-Mail Website
Guest Editor
Institute of Computer Engineering, University of Lübeck, 23569 Lübeck, Germany
Interests: embedded systems; digital signal processing; embedded electronics
Dr. Saleh Mulhem

E-Mail Website
Guest Editor
Institute of Computer Engineering, University of Lübeck, 23569 Lübeck, Germany
Interests: secure processor design; reliable computing; RISC-V and its security applications

Special Issue Information

Dear Colleagues,

We invite researchers, scholars, research engineers, and authors to submit their manuscripts on topics related to "Advanced Computer Architecture", with a particular emphasis on the following topics:

  • Data-level parallelism architectures: Vector, SIMD, SIMT, etc. 
  • Superpipelined and Superscalar processors/multicores: design, implementation, and performance evaluation.
  • Multiprocessor systems: performance or/and security evaluation.
  • Efficient design of digital signal processors (DSP): design and implementation.
  • Processor Pipeline: instruction pipelines, pipeline hazards and their resolutions, pipeline analysis, etc.  
  • Cache architecture and its optimization: coherence, consistency, and secure cache design.
  • Memory hierarchy and its optimization: low latency, high throughput, energy dissipation, and/or security.
  • Secure single-core/ multicore processor design.  
  • Fault tolerance mechanisms in processor architectures. 
  • Cryptographic and Artificial intelligence Engine: design and implementation.
  • High-performance embedded applications: edge and fog computing.
  • RISC-V: Benchmarks, Tools, Compiler, etc. 
  • High-Performance RISC-V and its emulator.
  • RISC-V-based Accelerator: Cryptographic or Artificial intelligence.

This Special Issue is not limited to the above list. Any research papers targeting the future trends in computer architecture research will be considered. Papers will be published in an open-access form after peer review.

Prof. Dr. Mladen Berekovic
Dr. Saleh Mulhem
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Applied Sciences is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • data-level parallelism
  • cache architecture
  • memory hierarchy
  • RISC-V
  • secure processor design

Published Papers (2 papers)

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Research

14 pages, 569 KiB  
Article
uDMA: An Efficient User-Level DMA for NVMe SSDs
by Jinbin Zhu, Liang Wang, Limin Xiao and Guangjun Qin
Appl. Sci. 2023, 13(2), 960; https://0-doi-org.brum.beds.ac.uk/10.3390/app13020960 - 10 Jan 2023
Viewed by 1809
Abstract
The Non-Volatile Memory Express (NVMe) SSD provides high I/O performance for current computer systems, and direct memory access (DMA) is the critical enabling mechanism for direct I/O. However, the lengthy I/O stack becomes a new bottleneck that degrades the potential of NVMe SSD. [...] Read more.
The Non-Volatile Memory Express (NVMe) SSD provides high I/O performance for current computer systems, and direct memory access (DMA) is the critical enabling mechanism for direct I/O. However, the lengthy I/O stack becomes a new bottleneck that degrades the potential of NVMe SSD. This paper reveals that existing user-level DMA introduces additional overhead for pinning memory used by DMA from the user space. Moreover, it cannot adapt to I/O requests of different data sizes. This paper proposes an efficient and dynamically adaptive user-level DMA (uDMA) mechanism that can adapt to I/O requests for different data sizes and lighten the I/O software stack by amortizing per-request latency. The critical component of uDMA is the pinned memory pool, which avoids frequently pinning new memory blocks by reusing allocated and pinned memory blocks. In addition, it effectively connects the discrete pinned memory blocks by the scatter/gather lists, improving the utilization of the pinned memory pool. Compared with the latest user-level DMA method, uDMA has an improvement of at least 17% under various data sizes. Full article
(This article belongs to the Special Issue Advanced Computer Architecture)
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14 pages, 1145 KiB  
Article
Acceleration of Nuclear Reactor Simulation and Uncertainty Quantification Using Low-Precision Arithmetic
by Alexey Cherezov, Alexander Vasiliev and Hakim Ferroukhi
Appl. Sci. 2023, 13(2), 896; https://0-doi-org.brum.beds.ac.uk/10.3390/app13020896 - 09 Jan 2023
Viewed by 1241
Abstract
In recent years, interest in approximate computing has been increasing significantly in many disciplines in the context of saving energy and computation cost by trading off on the quality of numerical simulation. The hardware acceleration based on the low-precision floating-point arithmetic is anticipated [...] Read more.
In recent years, interest in approximate computing has been increasing significantly in many disciplines in the context of saving energy and computation cost by trading off on the quality of numerical simulation. The hardware acceleration based on the low-precision floating-point arithmetic is anticipated by the upcoming generation of microprocessors and code compilers and has already proven to be beneficial for weather and climate modelling and neural network training. The present work illustrates the application of low-precision arithmetic for the nuclear reactor core uncertainty analysis. We studied the performance of an elementary transient reactor core model for the arbitrary precision of the floating-point multiplication in a direct linear system solver. Using this model, we calculated the reactor core transients initiated by the control rod ejection taking into account the uncertainty of the model input parameters. Then, we evaluated the round-off errors of the model outputs for different precision levels. The comparison of the round-off errors and the model uncertainty showed the model could be run using a 15-bit floating-point number precision with an acceptable degradation of the result’s accuracy. This precision corresponds to a gain of about 6× in the bit complexity of the linear system solution algorithm, which can be actualized in terms of reduced energy costs on low-precision hardware. Full article
(This article belongs to the Special Issue Advanced Computer Architecture)
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