Advances in Microelectronic Materials, Processes and Devices

A special issue of Applied Sciences (ISSN 2076-3417). This special issue belongs to the section "Electrical, Electronics and Communications Engineering".

Deadline for manuscript submissions: closed (31 March 2022) | Viewed by 20316

Special Issue Editor

IMEP-LAHC, UGA, Minatec-INPG, 38000 Grenoble, France
Interests: microelectronics; semiconductor devices; electrical characterization; device modelling; reliability
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

Silicon microelectronics is at the heart of modern electronics, finding applications in computing, data processing, data storage, communications or internet-of-things field. Its development has been guided by Moore’s law since the 70’s and is nowadays reaching its physical limits related to device dimension,  integration density and complexity both in CMOS and memory technologies. To overcome these limits, new challenges have been addressed regarding new material integration for FEOL and BEOL purpose, new processes for material growth, deposition, doping, etching and patterning, new device architectures for better scalability, improved physical characterization techniques for CD metrology, advanced device and interconnect electrical characterization methodologies.

We invite researcher to contribute works on the “Advances in Microelectronic Materials, Processes and Devices” topic. Potential subjects include, but are not limited to: 

  • New material;
  • Integration processes;
  • Device architectures;
  • Physical characterization and metrology;
  • Electrical characterization and reliability;

Prof. Gerard Ghibaudo
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Applied Sciences is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • new materials (FEOL, BEOL…)
  • integration processes (growth, deposition, doping, etching, patterning, lithography…)
  • device architectures (bulk, thin film, nanoribbon, nanowire, 2D…)
  • physical characterization and metrology
  • electrical characterization and reliability
  • memories (SRAM, DRAM, NVM, MRAM, ReRAM…)
  • cryogenic CMOS
  • beyond CMOS
  • 3D VLSI

Published Papers (3 papers)

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Research

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10 pages, 3124 KiB  
Article
Efficacy of Transistor Interleaving in DICE Flip-Flops at a 22 nm FD SOI Technology Node
by Christopher J. Elash, Zongru Li, Chen Jin, Li Chen, Jiesi Xing, Zhiwu Yang and Shuting Shi
Appl. Sci. 2022, 12(9), 4229; https://0-doi-org.brum.beds.ac.uk/10.3390/app12094229 - 22 Apr 2022
Cited by 4 | Viewed by 1864
Abstract
Fully Depleted Silicon on Insulator (FD SOI) technology nodes provide better resistance to single event upsets than comparable bulk technologies, but upsets are still likely to occur at nano-scale feature sizes, and additional hardening techniques should be explored. Three flip-flop designs were implemented [...] Read more.
Fully Depleted Silicon on Insulator (FD SOI) technology nodes provide better resistance to single event upsets than comparable bulk technologies, but upsets are still likely to occur at nano-scale feature sizes, and additional hardening techniques should be explored. Three flip-flop designs were implemented using Dual Interlocked Cell (DICE) latches in a 22 m FD SOI technology node. Additional hardening was implemented in the layout of each design by using transistor spacing and interleaving. Comparisons were made between a standard DICE design and two other designs making use of the new Continuous Active (CnRx) Diffusion construct and guard-gate transistor stacking through alpha particle and heavy ion irradiation. Designs making use of the CnRx construct for performance improvements were more likely to experience upsets due to higher collected charges in the increased diffusion regions. Conversely, transistor stacking showed strong soft error rate resilience because of the natural isolation between transistors in the FD SOI technology. Overall, the efficacy of transistor interleaving in flip-flops using DICE latches was found to be extremely robust in the 22 nm FD SOI technology node. Full article
(This article belongs to the Special Issue Advances in Microelectronic Materials, Processes and Devices)
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Review

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20 pages, 7080 KiB  
Review
Roadmapping of Nanoelectronics for the New Electronics Industry
by Paolo Gargini, Francis Balestra and Yoshihiro Hayashi
Appl. Sci. 2022, 12(1), 308; https://0-doi-org.brum.beds.ac.uk/10.3390/app12010308 - 29 Dec 2021
Cited by 4 | Viewed by 4452
Abstract
This paper is dedicated to a review of the international effort to map the future of nanoelectronics from materials to systems for the new electronics industry. The following sections are highlighted: the Roadmap structure with the international teams, the methodology and historical evolution, [...] Read more.
This paper is dedicated to a review of the international effort to map the future of nanoelectronics from materials to systems for the new electronics industry. The following sections are highlighted: the Roadmap structure with the international teams, the methodology and historical evolution, the various eras of scaling, the new ecosystems and computer industry, the evolving supply chain, the development of SoC and SiP, the advent of the Internet of Everything and the 5G communications, the dramatic increase of data centers, the power challenge, the technology fusion, heterogeneous and system integration, the emerging technologies, devices and computing architectures, and the main challenges for future applications. Full article
(This article belongs to the Special Issue Advances in Microelectronic Materials, Processes and Devices)
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25 pages, 3294 KiB  
Review
Advances in Emerging Memory Technologies: From Data Storage to Artificial Intelligence
by Gabriel Molas and Etienne Nowak
Appl. Sci. 2021, 11(23), 11254; https://0-doi-org.brum.beds.ac.uk/10.3390/app112311254 - 27 Nov 2021
Cited by 27 | Viewed by 12946
Abstract
This paper presents an overview of emerging memory technologies. It begins with the presentation of stand-alone and embedded memory technology evolution, since the appearance of Flash memory in the 1980s. Then, the progress of emerging memory technologies (based on filamentary, phase change, magnetic, [...] Read more.
This paper presents an overview of emerging memory technologies. It begins with the presentation of stand-alone and embedded memory technology evolution, since the appearance of Flash memory in the 1980s. Then, the progress of emerging memory technologies (based on filamentary, phase change, magnetic, and ferroelectric mechanisms) is presented with a review of the major demonstrations in the literature. The potential of these technologies for storage applications addressing various markets and products is discussed. Finally, we discuss how the rise of artificial intelligence and bio-inspired circuits offers an opportunity for emerging memory technology and shifts the application from pure data storage to storage and computing tasks, and also enlarges the range of required specifications at the device level due to the exponential number of new systems and architectures. Full article
(This article belongs to the Special Issue Advances in Microelectronic Materials, Processes and Devices)
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