Operating System Issues in Emerging Systems and Applications

A special issue of Applied Sciences (ISSN 2076-3417). This special issue belongs to the section "Computing and Artificial Intelligence".

Deadline for manuscript submissions: closed (10 April 2021) | Viewed by 13647

Special Issue Editors

Department of Computer Engineering, Ewha University, Seoul 03760, Republic of Korea
Interests: operating system; real-time system; memory & storage management; embedded systems; system optimizations
Special Issues, Collections and Topics in MDPI journals
School of Computer Science and Engineering, Pusan National University, Busan 46241, Republic of Korea
Interests: operating system; cloud platform; non-volatile memory storage; non-block based storage
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

The objective of this Special Issue is in the design and performance analysis of system software for future computing systems and their applications. In particular, we focus on the operating system issues (e.g., caching, scheduling, allocation, optimization) with special emphasis on new hardware environments (e.g., persistent /nonvolatile memory, many-cores) and emerging systems/applications (e.g., IoT, cloud, mobile, real-time, embedded, CPS, health-care, automotive, smart factory).
Since emerging hardware media (e.g., many-core GPU, phase-change memory, ReRAM, STT-MRAM) have different performance characteristics from traditional system components (e.g., single-core CPU, SRAM cache, DRAM memory, HDD storage), we need to revisit data structures and algorithms for designing appropriate software layers.
Unlike general-purpose computer systems, future systems and their applications have a large variety of I/O devices (e.g., sensor, GPS) and special requirements (e.g., deadline, battery, memory limitations), which should be carefully considered in the design of future operating systems.

Potential topics include but are not limited to: 

  1. Memory/storage management for emerging hardware and applications;
  2. Workload characterization for future applications w.r.t OS design;
  3. Caching, scheduling, allocation, and optimization issues in emerging systems and applications;
  4. Operating system issues in various system environments (e.g., IoT, cloud, mobile, embedded, real-time, CPS, health-care, automotive, smart factory). 

In this Special Issue, the extension of major conference papers, review articles, development case studies, as well as original research articles is welcome. We also encourage the authors to open the source code or materials of their developed software to the research community.

Prof. Hyokyung Bahn
Prof. Sungyong Ahn
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Applied Sciences is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • Operating system
  • Memory and storage
  • Workload characterization
  • Caching
  • Scheduling…

Published Papers (4 papers)

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Research

24 pages, 6911 KiB  
Article
Empirical Performance Analysis of Collective Communication for Distributed Deep Learning in a Many-Core CPU Environment
by Junghoon Woo, Hyeonseong Choi and Jaehwan Lee
Appl. Sci. 2020, 10(19), 6717; https://0-doi-org.brum.beds.ac.uk/10.3390/app10196717 - 25 Sep 2020
Cited by 3 | Viewed by 2328
Abstract
To accommodate lots of training data and complex training models, “distributed” deep learning training has become employed more and more frequently. However, communication bottlenecks between distributed systems lead to poor performance of distributed deep learning training. In this study, we proposed a new [...] Read more.
To accommodate lots of training data and complex training models, “distributed” deep learning training has become employed more and more frequently. However, communication bottlenecks between distributed systems lead to poor performance of distributed deep learning training. In this study, we proposed a new collective communication method in a Python environment by utilizing Multi-Channel Dynamic Random Access Memory (MCDRAM) in Intel Xeon Phi Knights Landing processors. Major deep learning software platforms, such as TensorFlow and PyTorch, offer Python as a main development language, so we developed an efficient communication library by adapting Memkind library, which is a C-based library to utilize high-performance memory MCDRAM. For performance evaluation, we tested the popular collective communication methods in distributed deep learning, such as Broadcast, Gather, and AllReduce. We conducted experiments to analyze the effect of high-performance memory and processor location on communication performance. In addition, we analyze performance in a Docker environment for further relevance given the recent major trend of Cloud computing. By extensive experiments in our testbed, we confirmed that the communication in our proposed method showed performance improvement by up to 487%. Full article
(This article belongs to the Special Issue Operating System Issues in Emerging Systems and Applications)
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11 pages, 2277 KiB  
Article
Practical Enhancement of User Experience in NVMe SSDs
by Seongmin Kim, Kyusik Kim, Heeyoung Shin and Taeseok Kim
Appl. Sci. 2020, 10(14), 4765; https://0-doi-org.brum.beds.ac.uk/10.3390/app10144765 - 10 Jul 2020
Cited by 2 | Viewed by 2801
Abstract
When processing I/O requests, the current Linux kernel does not adequately consider the urgency of user-centric tasks closely related to user experience. To solve this critical problem, we developed a practical method in this study to enhance user experience in a computing environment [...] Read more.
When processing I/O requests, the current Linux kernel does not adequately consider the urgency of user-centric tasks closely related to user experience. To solve this critical problem, we developed a practical method in this study to enhance user experience in a computing environment wherein non-volatile memory express (NVMe) solid-state drives (SSDs) serve as storage devices. In our proposed scheme, I/O requests that originate from the user-centric tasks were preferentially served across various levels of queues by modifying the multi-queue block I/O layer of the Linux kernel, considering the dispatch method of NVMe SSDs. Our scheme tries to give as fast a path as possible for I/O requests from user-centric tasks among many queues with different levels. Especially, when the SSD is overburdened, it avoids the queues with many pending I/O requests and thus can significantly reduce the I/O latency of user-centric tasks. We implemented our proposed scheme in the Linux kernel and performed practical evaluations on a commercial SSD. The experimental results showed that the proposed scheme achieved significant enhancement in the launch time of five widely used applications by up to ~65%. Full article
(This article belongs to the Special Issue Operating System Issues in Emerging Systems and Applications)
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15 pages, 5200 KiB  
Article
HMB-I/O: Fast Track for Handling Urgent I/Os in Nonvolatile Memory Express Solid-State Drives
by Kyusik Kim, Seongmin Kim and Taeseok Kim
Appl. Sci. 2020, 10(12), 4341; https://0-doi-org.brum.beds.ac.uk/10.3390/app10124341 - 24 Jun 2020
Viewed by 2465
Abstract
Differentiated I/O services for applications with their own requirements are very important for user satisfaction. Nonvolatile memory express (NVMe) solid-state drive (SSD) architecture can improve the I/O bandwidth with its numerous submission queues, but the quality of service (QoS) of each I/O request [...] Read more.
Differentiated I/O services for applications with their own requirements are very important for user satisfaction. Nonvolatile memory express (NVMe) solid-state drive (SSD) architecture can improve the I/O bandwidth with its numerous submission queues, but the quality of service (QoS) of each I/O request is never guaranteed. In particular, if many I/O requests are pending in the submission queues due to a bursty I/O workload, urgent I/O requests can be delayed, and consequently, the QoS requirements of applications that need fast service cannot be met. This paper presents a scheme that handles urgent I/O requests without delay even if there are many pending I/O requests. Since the pending I/O requests in the submission queues cannot be controlled by the host, the host memory buffer (HMB), which is part of the DRAM of the host that can be accessed from the controller, is used to process urgent I/O requests. Instead of sending urgent I/O requests into the SSDs through legacy I/O paths, the latency is removed by directly inserting them into the HMB. Emulator experiments demonstrated that the proposed scheme could reduce the average and tail latencies by up to 99% and 86%, respectively. Full article
(This article belongs to the Special Issue Operating System Issues in Emerging Systems and Applications)
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20 pages, 553 KiB  
Article
Execution Model to Reduce the Interference of Shared Memory in ARINC 653 Compliant Multicore RTOS
by Sihyeong Park, Mi-Young Kwon, Hoon-Kyu Kim and Hyungshin Kim
Appl. Sci. 2020, 10(7), 2464; https://0-doi-org.brum.beds.ac.uk/10.3390/app10072464 - 03 Apr 2020
Cited by 4 | Viewed by 3133
Abstract
Multicore architecture is applied to contemporary avionics systems to deal with complex tasks. However, multicore architectures can cause interference by contention because the cores share hardware resources. This interference reduces the predictable execution time of safety-critical systems, such as avionics systems. To reduce [...] Read more.
Multicore architecture is applied to contemporary avionics systems to deal with complex tasks. However, multicore architectures can cause interference by contention because the cores share hardware resources. This interference reduces the predictable execution time of safety-critical systems, such as avionics systems. To reduce this interference, methods of separating hardware resources or limiting capacity by core have been proposed. Existing studies have modified kernels to control hardware resources. Additionally, an execution model has been proposed that can reduce interference by adjusting the execution order of tasks without software modification. Avionics systems require several rigorous software verification procedures. Therefore, modifying existing software can be costly and time-consuming. In this work, we propose a method to apply execution models proposed in existing studies without modifying commercial real-time operating systems. We implemented the time-division multiple access (TDMA) and acquisition execution restitution (AER) execution models with pseudo-partition and message queuing on VxWorks 653. Moreover, we propose a multi-TDMA model considering the characteristics of the target hardware. For the interference analysis, we measured the L1 and L2 cache misses and the number of main memory requests. We demonstrated that the interference caused by memory sharing was reduced by at least 60% in the execution model. In particular, multi-TDMA doubled utilization compared to TDMA and also reduced the execution time by 20% compared to the AER model. Full article
(This article belongs to the Special Issue Operating System Issues in Emerging Systems and Applications)
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