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Electronics
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Recent Advances in Silicon-Based RFIC Design
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Recent Advances in Silicon-Based RFIC Design

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: closed (1 November 2022) | Viewed by 9576

Special Issue Editor

Dr. Mattia Borgarino

E-Mail Website
Guest Editor
Dipartimento di Ingegneria Enzo Ferrari, University of Modena and Reggio Emilia, 41125 Modena, Italy
Interests: RFIC; low frequency noise; ADC; quantum engineering
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

From their first appearance on the market in the last decade of the 20th Century, RFICs have increased the operation frequency from a few to several hundred GHz. This impressive evolution made the RFIC pervasive in several high-tech application fields, where telecommunications and sensing are still key drivers today. Next transceivers for 5G or Internet-of-Things, radars for self-driving cars, millimetre-wave receivers for security, or distributed array radio-telescopes are just a few examples. In particular, during these first two decades of the 21st Century, microelectronics technology has demonstrated silicon to be a material of high interest to target RF applications of up to more than 100 GHz without giving up, as using III-V semiconductors has the benefit of a low size, low cost, and compatibility with the digital CMOS. In the last half-decade, silicon notably landed in the IMWP area (integrated microwave photonics), paving the way for the fabrication of a new class of silicon integrated circuits offering RF signal manipulation capabilities in the optical domain, out-of-the-way of pure electrical solutions. For the next decade, quantum computing will be another hot research area, where silicon-based RFICs appear as a promising candidate to control and read-out the qubit. Even if most of the actual quantum processors are transmonic, spintronic qubits are indeed very appealing for massive solid-state quantum supremacy processors, because of their smaller footprint and compatibility with the CMOS technology.

Aim of this Special Issue is to collect recent advances in the design of silicon-based RFIC’s and related systems covering, but not limited to, the following hot application fields:

  • Digital intensive RF transceiver architectures
  • High speed ADCs for direct sampling RF receiver architectures
  • Millimeter-wave SiGe BiCMOS front-ends and frequency synthesis
  • Cryogenic CMOS RFICs for quantum engineering
  • Silicon microwave-photonics integrated circuits

Dr. Mattia Borgarino
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • Millimeterwave SiGe BiCMOS integrated circuits
  • High speed ADC
  • 5G transceivers
  • Silicon microwave photonics
  • Quantum engineering RFICs
  • Millimeterwave imaging RFICs
  • Cryogenics CMOS RFICs
  • Automotive radar RFICs

Published Papers (4 papers)

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Research

24 pages, 4891 KiB  
Article
Multi-Static Multi-Band Synthetic Aperture Radar (SAR) Constellation Based on Integrated Photonic Circuits
by Manuel Reza, Malik Muhammad Haris Amir, Muhammad Imran, Gaurav Pandey, Federico Camponeschi, Salvatore Maresca, Filippo Scotti, Giovanni Serafino, Antonio Malacarne, Claudio Porzi, Paolo Ghelfi, Antonella Bogoni and Mirco Scaffardi
Electronics 2022, 11(24), 4151; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics11244151 - 12 Dec 2022
Cited by 6 | Viewed by 2546
Abstract
Multi-static SARs from LEO orbits allow the single-pass high-resolution imaging and detection of moving targets. A coherent MIMO approach requires the generation of multi-band, thus orthogonal, signals, the fusion of which increases the system resolution. Up to now the synchronization capability of SAR [...] Read more.
Multi-static SARs from LEO orbits allow the single-pass high-resolution imaging and detection of moving targets. A coherent MIMO approach requires the generation of multi-band, thus orthogonal, signals, the fusion of which increases the system resolution. Up to now the synchronization capability of SAR signals of different satellites is critical. Here, we propose the use of photonics to generate, receive and distribute the radar signals in a coherent multi-static SAR constellation. Photonics overcomes issues in the implementation of MIMO SAR, allowing for the flexible generation of multi-band signals and centralized generation in a primary satellite with coherent distribution to all the secondary satellites of the SAR signals over FSO links. The numerical analysis shows the proposed system has a NESZ < −29.6 dB, satisfying the SAR system requirements. An experimental proof of concept based on COTS, for both signal up- and down-conversion, is implemented to demonstrate the system functionality, showing performance similar to the simulations. The implementation of the proposed systems with integrated technologies could reduce the system SWaP and increase robustness to vibrations. A design based on the consolidated SOI platform with the transfer printing-based hybrid integration of InP semiconductor optical amplifiers is proposed. The amplifiers compensate for the losses of the passive SOI waveguides, decreasing the overall conversion loss. The polarization multiplexing of the modulated and unmodulated combs to be sent from (to) the primary to (from) the secondary satellite over the FSO links avoids complex space-consuming optical filters requiring several control signals. Full article
(This article belongs to the Special Issue Recent Advances in Silicon-Based RFIC Design)
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13 pages, 7265 KiB  
Article
A 3.2 GHz Injection-Locked Ring Oscillator-Based Phase-Locked-Loop for Clock Recovery
by Dorian Vert, Michel Pignol, Vincent Lebre, Emmanuel Moutaye, Florence Malou and Jean-Baptiste Begueret
Electronics 2022, 11(21), 3590; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics11213590 - 03 Nov 2022
Cited by 1 | Viewed by 1902
Abstract
An injection-locked ring oscillator-based phase-locked-loop targeting clock recovery for space application at 3.2 GHz is presented here. Most clock recovery circuits need a very low phase noise and jitter performance and are thus based on LC-type oscillators. These excellent performances come at the [...] Read more.
An injection-locked ring oscillator-based phase-locked-loop targeting clock recovery for space application at 3.2 GHz is presented here. Most clock recovery circuits need a very low phase noise and jitter performance and are thus based on LC-type oscillators. These excellent performances come at the expense of a very poor integration density. To alleviate this issue, this work introduces an injection-locked ring oscillator-based PLL circuit. The combination of the injection-locking process with the use of ring oscillators allows for the benefit of excellent jitter performance while presenting an extremely low surface area due to an architecture without any inductor. The injection locking principle is addressed, and evidence of its phase noise and jitter improvements are confirmed through measurement results. Indeed, phase noise and jitter enhancements up to 43 dB and 23.3 mUI, respectively, were measured. As intended, this work shows the best integration density compared to recent similar state-of-the-art studies. The whole architecture measures 0.1 mm2 while consuming 34.6 mW in a low-cost 180 nm CMOS technology. Full article
(This article belongs to the Special Issue Recent Advances in Silicon-Based RFIC Design)
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31 pages, 2157 KiB  
Article
Evolution Trends and Paradigms of Low Noise Frequency Synthesis and Signal Conversion Using Silicon Technologies
by Jean-Guy Tartarin, Éric Tournier and Christophe Viallon
Electronics 2022, 11(5), 684; https://doi.org/10.3390/electronics11050684 - 23 Feb 2022
Viewed by 2079
Abstract
Silicon technologies for HF applications have been proven for more than two decades, and technologies have greatly evolved. Whether CMOS or BiCMOS technologies, the unique combination of radio frequency, baseband, and digital functions allow a very high level of integration. While it is [...] Read more.
Silicon technologies for HF applications have been proven for more than two decades, and technologies have greatly evolved. Whether CMOS or BiCMOS technologies, the unique combination of radio frequency, baseband, and digital functions allow a very high level of integration. While it is possible to achieve fully integrated transceivers, the major advantages of these silicon technologies lie mainly in their unparalleled performance in the field of frequency synthesis and frequency conversion. We propose in this paper a review of the major results obtained on these RF components since the beginning of the 2000s, also considering the impact of the technology node. The back-end of line (BEOL) process on which depends the quality of microwave monolithic integrated circuits (MMICs) is briefly presented in the introductory part. If circuit performances are tightly bound to the active devices (i.e., the heterojunction bipolar transistor SiGe HBT or CMOS transistor), passive elements (i.e., quality factor of inductors and varactors, losses of transmission, or interconnection lines) as well as the definition of the substrate also play a major role. The core of the article is oriented toward the noise of synthesized signals and frequency conversion. Frequency synthesis is presented through the analog design of a voltage-controlled oscillator (VCO) or through the direct digital frequency synthesis (DDFS), for which respective figures of merit are presented and discussed in a second section. The spectral purity of the oscillators being decisive in the definition of the throughput of a link is approached through the comparison of different figures of merit (FoM) for a set of circuits achievements over the selected period. If the realization of free oscillators is closely bound to the phase-locked loop (PLL)-type control loop for VCOs, the DDFS solution provides more direct and more flexible alternative at first sight. Therefore, these two solutions are analyzed collectively. Finally, the oscillator integrated in the transmitter or receiver supplies the needed LO (local oscillator) power to the frequency mixer in the frequency conversion module: henceforth, the third part of this study focuses on high-frequency mixer realizations. We thus consider this LO power in some advanced figure of merit mentioned in the second section. The design trade-off of the mixer is presented in an approach combining LO (conversion gain, channel isolation, and phase noise) and RF (HF noise figure and channel isolation) constraints. The final section provides a summary of the results and trends mentioned in the paper. Full article
(This article belongs to the Special Issue Recent Advances in Silicon-Based RFIC Design)
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14 pages, 3133 KiB  
Article
Circuit-Based Compact Model of Electron Spin Qubit
by Mattia Borgarino
Electronics 2022, 11(4), 526; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics11040526 - 10 Feb 2022
Cited by 1 | Viewed by 2006
Abstract
Today, an electron spin qubit on silicon appears to be a very promising physical platform for the fabrication of future quantum microprocessors. Thousands of these qubits should be packed together into one single silicon die in order to break the quantum supremacy barrier. [...] Read more.
Today, an electron spin qubit on silicon appears to be a very promising physical platform for the fabrication of future quantum microprocessors. Thousands of these qubits should be packed together into one single silicon die in order to break the quantum supremacy barrier. Microelectronics engineers are currently leveraging on the current CMOS technology to design the manipulation and read-out electronics as cryogenic integrated circuits. Several of these circuits are RFICs, as VCO, LNA, and mixers. Therefore, the availability of a qubit CAD model plays a central role in the proper design of these cryogenic RFICs. The present paper reports on a circuit-based compact model of an electron spin qubit for CAD applications. The proposed model is described and tested, and the limitations faced are highlighted and discussed. Full article
(This article belongs to the Special Issue Recent Advances in Silicon-Based RFIC Design)
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