Diagnosis in Analog Electronic Circuits, Electrical Power Systems and Smart Grids

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: closed (30 March 2022) | Viewed by 10884

Special Issue Editors


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Guest Editor
Department of Information Engineering, University of Florence, Florence, Italy
Interests: circuit theory; analog filters; fault diagnosis of electronic circuits; neural networks; symbolic analysis of analog circuits

E-Mail Website
Guest Editor
Department of Information Engineering, University of Florence, Florence, Italy
Interests: circuit theory; neural networks and machine learning; symbolic analysis; simulation of analog circuits
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

Fault diagnosis is extremely important for ensuring the correct behavior of any kind of system. As the complexity increases, fault identification gets more and more difficult, up to the point where the experience and ability of the designer are no longer sufficient to fulfill this task. In other words, very complex systems need automatic tools for fault localization. An approach of this kind is common in the digital microelectronics world. On the contrary, in the analog field, dominated by more complex phenomena, the same level of automation has not yet been reached and the development of tools for the automatic fault diagnosis is still an open research subject.

In electronic systems, fault diagnosis is required in the product development phase. In fact, once the design is transformed into a real product, a number of unexpected or hardly predictable faults typically affect the first prototypes. The localization of these faults and the identification of their causes are fundamental steps in design optimization. A totally different situation happens in electric power systems, whose completely different dimensions drastically change the perspective. Whereas a fault within an integrated circuit can only be fixed by replacing the device itself, a fault in an electrical line must be directly repaired. In this case, the problems are caused by a need to use non-intrusive techniques and the complexity of the modern systems, where producers and users co-habit in the prosumer concept, causing increased difficulty in fault location and its management in real-time. Not surprisingly, the answer to this need relies on preventive maintenance, to identify and localize faults before they happen, by recognizing the symptoms that precede the fault. This is the situation in smart grids, a typical example of an electric power system.

This Special Issue will promote advancement in the following topics related to the diagnosis of analog electronic circuits, electrical power systems, and smart grids:

  • Parametric fault diagnosis in analog circuits;
  • Catastrophic fault diagnosis in analog circuits;
  • Testability, solvability, and ambiguity group determination in lumped circuits;
  • Smart metering and soft computing techniques applied to the fault diagnosis;
  • Diagnosis and prognosis techniques in electrical power systems;
  • Smart grids: maintenance, fault prevention, fault resolution, fault-tolerant approach;
  • Smart grids: non-intrusive monitoring techniques;
  • CAD and simulation techniques oriented to analog circuits fault diagnosis

Prof. Dr. Maria Cristina Piccirilli
Prof. Dr. Antonio Luchetta
Guest Editors

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Keywords

  • Simulation after-test
  • Simulation before-test
  • Testability
  • Fault diagnosis
  • Fault prognosis
  • Machine learning techniques for diagnosis
  • CAD and simulation for diagnosis

Published Papers (6 papers)

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Editorial

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2 pages, 159 KiB  
Editorial
Diagnosis in Analog Electronic Circuits, Electrical Power Systems and Smart Grids
by Maria Cristina Piccirilli and Antonio Luchetta
Electronics 2022, 11(13), 2008; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics11132008 - 27 Jun 2022
Viewed by 803
Abstract
Diagnosis, in its most general meaning, is the process aimed at identifying the causes that have produced a behavior, normally anomalous, in a system of either biological or artificial nature [...] Full article

Research

Jump to: Editorial

25 pages, 7441 KiB  
Article
Testability Evaluation in Time-Variant Circuits: A New Graphical Method
by Marco Bindi, Maria Cristina Piccirilli, Antonio Luchetta, Francesco Grasso and Stefano Manetti
Electronics 2022, 11(10), 1589; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics11101589 - 16 May 2022
Cited by 5 | Viewed by 1439
Abstract
DC–DC converter fault diagnosis, executed via neural networks built by exploiting the information deriving from testability analysis, is the subject of this paper. The networks under consideration are complex valued neural networks (CVNNs), whose fundamental feature is the proper treatment of the phase [...] Read more.
DC–DC converter fault diagnosis, executed via neural networks built by exploiting the information deriving from testability analysis, is the subject of this paper. The networks under consideration are complex valued neural networks (CVNNs), whose fundamental feature is the proper treatment of the phase and the information contained in it. In particular, a multilayer neural network based on multi-valued neurons (MLMVN) is considered. In order to effectively design the network, testability analysis is exploited. Two possible ways for executing this analysis on DC–DC converters are proposed, taking into account the single-fault hypothesis. The theoretical foundations and some applicative examples are presented. Computer programs, based on symbolic analysis techniques, are used for both the testability analysis and the neural network training phase. The obtained results are very satisfactory and demonstrate the optimal performances of the method. Full article
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12 pages, 2180 KiB  
Article
Diagnosis of Faults Induced by Radiation and Circuit-Level Design Mitigation Techniques: Experience from VCO and High-Speed Driver CMOS ICs Case Studies
by Danilo Monda, Gabriele Ciarpi and Sergio Saponara
Electronics 2021, 10(17), 2144; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10172144 - 03 Sep 2021
Cited by 2 | Viewed by 2169
Abstract
In this paper, we discuss the diagnosis of particle-induced failures in harsh environments such as space and high-energy physics. To address these effects, simulation-before-test and simulation-after-test can be the key points in choosing which radiation hardening by design (RHBD) techniques can be implemented [...] Read more.
In this paper, we discuss the diagnosis of particle-induced failures in harsh environments such as space and high-energy physics. To address these effects, simulation-before-test and simulation-after-test can be the key points in choosing which radiation hardening by design (RHBD) techniques can be implemented to mitigate or prevent failures. Despite the fact that total ionising dose (TID) has slow but destructive effects overtime on silicon devices, single-event effect (SEE) impulsively disrupts the typical operation of a circuit with temporary or permanent effects. The recently released SpaceFibre protocol drives the current requirements for space applications, and the future upgrade of the LHC experiment scheduled by CERN will require a redesign of the electronic front-end to sustain a radiation level up to the 1 Grad TID level. The effects that these two environments have on two different architectures for high-radiation and high-frequency data transmission are reported, and the efficiency of the mitigation techniques implemented, based on simulations and measurement tests, in the commercial 65 nm technology, are exploited. Full article
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14 pages, 567 KiB  
Article
Parametric Fault Diagnosis of Very High-Frequency Circuits Containing Distributed Parameter Transmission Lines
by Michał Tadeusiewicz and Stanisław Hałgas
Electronics 2021, 10(5), 550; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10050550 - 26 Feb 2021
Cited by 4 | Viewed by 1323
Abstract
Parametric fault diagnosis of analog very high-frequency circuits consisting of a distributed parameter transmission line (DPTL) terminated at both ends by lumped one-ports is considered in this paper. The one-ports may include linear passive and active components. The DPTL is a uniform two-conductor [...] Read more.
Parametric fault diagnosis of analog very high-frequency circuits consisting of a distributed parameter transmission line (DPTL) terminated at both ends by lumped one-ports is considered in this paper. The one-ports may include linear passive and active components. The DPTL is a uniform two-conductor line immersed in a homogenous medium, specified by the per-unit-length (p-u-l) parameters. The proposed method encompasses all aspects of parametric fault diagnosis: detection of the faulty area, location of the fault inside this area, and estimation of its value. It is assumed that only one fault can occur in the circuit. The diagnostic method is based on a measurement test arranged in the AC state. Different approaches are proposed depending on whether the faulty is DPTL or one of the one-ports. An iterative method is modified to solve various systems of nonlinear equations that arise in the course of the diagnostic process. The diagnostic method can be extended to a broader class of circuits containing several transmission lines. Three numerical examples reveal that the proposed diagnostic method is fast and gives quite accurate findings. Full article
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18 pages, 1605 KiB  
Article
A Neural Network Classifier with Multi-Valued Neurons for Analog Circuit Fault Diagnosis
by Igor Aizenberg, Riccardo Belardi, Marco Bindi, Francesco Grasso, Stefano Manetti, Antonio Luchetta and Maria Cristina Piccirilli
Electronics 2021, 10(3), 349; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10030349 - 02 Feb 2021
Cited by 15 | Viewed by 2440
Abstract
In this paper, we present a new method designed to recognize single parametric faults in analog circuits. The technique follows a rigorous approach constituted by three sequential steps: calculating the testability and extracting the ambiguity groups of the circuit under test (CUT); localizing [...] Read more.
In this paper, we present a new method designed to recognize single parametric faults in analog circuits. The technique follows a rigorous approach constituted by three sequential steps: calculating the testability and extracting the ambiguity groups of the circuit under test (CUT); localizing the failure and putting it in the correct fault class (FC) via multi-frequency measurements or simulations; and (optional) estimating the value of the faulty component. The fabrication tolerances of the healthy components are taken into account in every step of the procedure. The work combines machine learning techniques, used for classification and approximation, with testability analysis procedures for analog circuits. Full article
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17 pages, 1716 KiB  
Article
A Method for Diagnosing Soft Short and Open Faults in Distributed Parameter Multiconductor Transmission Lines
by Michał Tadeusiewicz and Stanisław Hałgas
Electronics 2021, 10(1), 35; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10010035 - 28 Dec 2020
Cited by 4 | Viewed by 1677
Abstract
This paper aims to develop a method for diagnosing soft short and open faults occurring in a distributed parameter multiconductor transmission line (DPMTL) terminated at both ends by linear circuits of very high frequency, including lumped elements, which can be passive and active. [...] Read more.
This paper aims to develop a method for diagnosing soft short and open faults occurring in a distributed parameter multiconductor transmission line (DPMTL) terminated at both ends by linear circuits of very high frequency, including lumped elements, which can be passive and active. The diagnostic method proposed in this paper is based on a measurement test performed in the AC state. To write the diagnostic equations, the DPMTL is described by the chain equations in the frequency domain. For each considered fault, the line is divided into a cascade-connection of two lines, and a set of the diagnostic equations is written, taking into account basic circuit laws and the DPMTL description. This set includes nonlinear complex equations in two unknown real variables consisting of the distance from the beginning of the line to the point where it occurs and the fault value. To solve these equations, a numerical method has been developed. The procedure is applied to the possible soft shorts that can occur between all pairs of the line conductors, and the actual fault is selected. The method has also been adapted to the detection and location of open faults in DPMTL. Numerical examples, including three-conductor and five-conductor transmission lines, show that the diagnostic method is effective and very fast, and the CPU time does not exceed one second. Full article
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