Dear Colleagues,

Next-generation computing systems (from IoT to Cloud to Exascale) are expected to embrace more sophisticated computing solutions to yield a leap in terms of performance. However, power consumption still represents the most limiting factor for chip designers. Indeed, with the end of Dennard scaling, innovative approaches must be realized to stack together ever more and more functions in a single chip. Overcoming these limitations leads to an ever-growing adoption of specialized computing systems, which provide a better tradeoff between performance per Watt ratio along with large flexibility. As such, in the last years, we have witnessed the enlargement of the specialized architecture landscape, which includes GPUs, FPGAs, APUs, and chips for AI models training and inference (Neural Network Processors, TPUs, etc.). Architectural specialization also demands flexible and productive programming and designing environments that can tune the underlying computing units, memory blocks, and interconnects to meet the desired level of performance and power consumption. Last but not least, progress in the manufacturing processes makes such a system more prone to faults. Thus, robustness and fault tolerance are key features that need to be addressed in the design phase without negatively affecting the performance or the power budget.

This Special Issue is focused on novel energy-aware heterogeneous computing systems. Novel architectures, algorithms, tools, and programming models to address the design of such power-constrained computing systems are welcome. Researchers, academics, and engineers are encouraged to submit original research contributions in all major areas of power-constrained computing for large-scale systems (HPC, Cloud, Edge, and IoT), which include, but are not limited to the following:

• Novel energy-efficient architectures and HW/SW co-design approaches for accelerating AI/ML applications.
• Designs for transprecision computing and approximated computing solutions (targeting from IoT to HPC)
• Innovative reconfigurable architectures (FPGAs, CGRA, overlay architectures) and applications
• Accelerator designs for specific domains and emerging applications (ad-hoc HPC simulations, annealers, data analytics, etc.) improving efficiency (FLOPS/Watt)
• Neuromorphic designs for HPC, AI/ML, and emerging applications
• Embedded systems with hard power constraints (e.g., designs for next-generation ultra-low-power IoT)
• Programming tools and models for improving efficiency (FLOPS/Watt) of accelerators (FPGAs, GPUs, Tensor Units, etc.)
• Tools supporting the design space exploration of future systems (IoT, Cloud, Exascale)
• Rapid prototyping of energy-efficient computing systems and accelerators
• New software stack optimizations adopted for energy-efficient hardware exploitation (CPUs, GPUs, FPGAs, etc.).
• Hardware designs with posit arithmetics vs IEEE floats
• Exotic computing approaches (including quantum computing, post-FPGAs, post-GPUs, analog computing)
• Fault-tolerant and resilient designs for power-constrained computing systems
• Tools supporting power consumption optimization (including AI/ML-based approaches)
• Reducing power consumption of interconnects in next-generation computing systems (novel NoC topologies, switches/routers NoC architectures, NoC traffic management, etc.)

Dr. Antoni Portero
Dr. Somnath Mazumdar
Dr. Olivier Terzo
Dr. Alberto Scionti
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Journal of Low Power Electronics and Applications is an international peer-reviewed open access quarterly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 1800 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.