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Thin-Film Transistors
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Thin-Film Transistors

A special issue of Membranes (ISSN 2077-0375). This special issue belongs to the section "Inorganic Membranes".

Deadline for manuscript submissions: closed (31 October 2021) | Viewed by 36081

Special Issue Editor

Prof. Dr. Feng-Tso Chien

E-Mail Website
Guest Editor
Faculty of Department of Electronic Engineering, Feng Chia University, Taichung 407, Taiwan
Interests: thin-film transistors; power MOSFETs; power devices; wide bandgap semiconductor; TCAD for semiconductor process and semiconductor devices; III–V compound semiconductor/high speed electronic devices

Special Issue Information

Dear Colleagues,

This Special Issue is dedicated to original research articles and critical reviews on “Thin-Film Transistors”. The main aim is to present new studies and research on this subject by publishing the latest investigations in all materials and device structures.

A thin-film transistor (TFT) is a key component for display manufacturing, such as AMLCD and AMOLED displays. TFT technologies based on different materials, structures, and fabrication processes have been widely discussed in the past two decades. This Special Issue of Membranes on “Thin-Film Transistors” will closely follow the research in this topic to highlight the most important and significant device/material structures and experimental and theoretical developments in all kinds of materials, structures, TCAD simulations, device characteristics, and applications from leading groups around the world.

In particular, the topics of interest include, but are not limited to:

  • A-Si and poly-Si thin-film transistors;
  • Organic thin-film transistors;
  • Oxide semiconductor materials for thin-film transistors;
  • High k, high bandgap, or other materials for thin-film transistors;
  • Advanced device structure/process;
  • TCAD simulation;
  • Physics, characteristics, and reliability;
  • Device application.

Prof. Dr. Feng-Tso Chien
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Membranes is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2700 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • A-Si and poly-Si thin-film transistors
  • Organic thin-film transistors
  • Oxide semiconductor materials for thin-film transistors
  • High k, high bandgap, or other materials for thin-film transistors
  • Advanced device structure/process
  • TCAD simulation
  • Physics, characteristics, and reliability
  • Device application

Published Papers (13 papers)

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Editorial

Jump to: Research, Review

3 pages, 183 KiB  
Editorial
Thin-Film Transistors
by Feng-Tso Chien, Yu-Wei Chang and Jo-Chin Liu
Membranes 2022, 12(4), 411; https://0-doi-org.brum.beds.ac.uk/10.3390/membranes12040411 - 09 Apr 2022
Viewed by 1636
Abstract
Thin film transistors (TFTs) are key components used in a variety of fields such as solar cell, active-matrix liquid crystal displays (AM-LCDs), pixel switches, peripheral driver circuit and flexible electronics [...] Full article
(This article belongs to the Special Issue Thin-Film Transistors)

Research

Jump to: Editorial, Review

15 pages, 3836 KiB  
Article
Improving Device Characteristics of Dual-Gate IGZO Thin-Film Transistors with Ar–O2 Mixed Plasma Treatment and Rapid Thermal Annealing
by Wei-Sheng Liu, Chih-Hao Hsu, Yu Jiang, Yi-Chun Lai and Hsing-Chun Kuo
Membranes 2022, 12(1), 49; https://0-doi-org.brum.beds.ac.uk/10.3390/membranes12010049 - 30 Dec 2021
Cited by 15 | Viewed by 5506
Abstract
In this study, high-performance indium–gallium–zinc oxide thin-film transistors (IGZO TFTs) with a dual-gate (DG) structure were manufactured using plasma treatment and rapid thermal annealing (RTA). Atomic force microscopy measurements showed that the surface roughness decreased upon increasing the O2 ratio from 16% [...] Read more.
In this study, high-performance indium–gallium–zinc oxide thin-film transistors (IGZO TFTs) with a dual-gate (DG) structure were manufactured using plasma treatment and rapid thermal annealing (RTA). Atomic force microscopy measurements showed that the surface roughness decreased upon increasing the O2 ratio from 16% to 33% in the argon–oxygen plasma treatment mixture. Hall measurement results showed that both the thin-film resistivity and carrier Hall mobility of the Ar–O2 plasma–treated IGZO thin films increased with the reduction of the carrier concentration caused by the decrease in the oxygen vacancy density; this was also verified using X-ray photoelectron spectroscopy measurements. IGZO thin films treated with Ar–O2 plasma were used as channel layers for fabricating DG TFT devices. These DG IGZO TFT devices were subjected to RTA at 100 °C–300 °C for improving the device characteristics; the field-effect mobility, subthreshold swing, and ION/IOFF current ratio of the 33% O2 plasma–treated DG TFT devices improved to 58.8 cm2/V·s, 0.12 V/decade, and 5.46 × 108, respectively. Long-term device stability reliability tests of the DG IGZO TFTs revealed that the threshold voltage was highly stable. Full article
(This article belongs to the Special Issue Thin-Film Transistors)
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12 pages, 5436 KiB  
Article
Understanding the Origin of the Hysteresis of High-Performance Solution Processed Polycrystalline SnO2 Thin-Film Transistors and Applications to Circuits
by Christophe Avis and Jin Jang
Membranes 2022, 12(1), 7; https://0-doi-org.brum.beds.ac.uk/10.3390/membranes12010007 - 22 Dec 2021
Cited by 8 | Viewed by 2828
Abstract
Crystalline tin oxide has been investigated for industrial applications since the 1970s. Recently, the amorphous phase of tin oxide has been used in thin film transistors (TFTs) and has demonstrated high performance. For large area electronics, TFTs are well suited, but they are [...] Read more.
Crystalline tin oxide has been investigated for industrial applications since the 1970s. Recently, the amorphous phase of tin oxide has been used in thin film transistors (TFTs) and has demonstrated high performance. For large area electronics, TFTs are well suited, but they are subject to various instabilities due to operating conditions, such as positive or negative bias stress PBS (NBS). Another instability is hysteresis, which can be detrimental in operating circuits. Understanding its origin can help fabricating more reliable TFTs. Here, we report an investigation on the origin of the hysteresis of solution-processed polycrystalline SnO2 TFTs. We examined the effect of the carrier concentration in the SnO2 channel region on the hysteresis by varying the curing temperature of the thin film from 200 to 350 °C. Stressing the TFTs characterized further the origin of the hysteresis, and holes trapped in the dielectric are understood to be the main source of the hysteresis. With TFTs showing the smallest hysteresis, we could fabricate inverters and ring oscillators. Full article
(This article belongs to the Special Issue Thin-Film Transistors)
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8 pages, 19723 KiB  
Article
An Empirical Modeling of Gate Voltage-Dependent Behaviors of Amorphous Oxide Semiconductor Thin-Film Transistors including Consideration of Contact Resistance and Disorder Effects at Room Temperature
by Sungsik Lee
Membranes 2021, 11(12), 954; https://0-doi-org.brum.beds.ac.uk/10.3390/membranes11120954 - 01 Dec 2021
Cited by 3 | Viewed by 2467
Abstract
In this paper, we present an empirical modeling procedure to capture gate bias dependency of amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) while considering contact resistance and disorder effects at room temperature. From the measured transfer characteristics of a pair of TFTs where [...] Read more.
In this paper, we present an empirical modeling procedure to capture gate bias dependency of amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) while considering contact resistance and disorder effects at room temperature. From the measured transfer characteristics of a pair of TFTs where the channel layer is an amorphous In-Ga-Zn-O (IGZO) AOS, the gate voltage-dependent contact resistance is retrieved with a respective expression derived from the current–voltage relation, which follows a power law as a function of a gate voltage. This additionally allows the accurate extraction of intrinsic channel conductance, in which a disorder effect in the IGZO channel layer is embedded. From the intrinsic channel conductance, the characteristic energy of the band tail states, which represents the degree of channel disorder, can be deduced using the proposed modeling. Finally, the obtained results are also useful for development of an accurate compact TFT model, for which a gate bias-dependent contact resistance and disorder effects are essential. Full article
(This article belongs to the Special Issue Thin-Film Transistors)
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8 pages, 1528 KiB  
Article
High Photoresponse Black Phosphorus TFTs Capping with Transparent Hexagonal Boron Nitride
by Dewu Yue, Ximing Rong, Shun Han, Peijiang Cao, Yuxiang Zeng, Wangying Xu, Ming Fang, Wenjun Liu, Deliang Zhu and Youming Lu
Membranes 2021, 11(12), 952; https://0-doi-org.brum.beds.ac.uk/10.3390/membranes11120952 - 01 Dec 2021
Cited by 4 | Viewed by 2463
Abstract
Black phosphorus (BP), a single elemental two-dimensional (2D) material with a sizable band gap, meets several critical material requirements in the development of future nanoelectronic applications. This work reports the ambipolar characteristics of few-layer BP, induced using 2D transparent hexagonal boron nitride (h-BN) [...] Read more.
Black phosphorus (BP), a single elemental two-dimensional (2D) material with a sizable band gap, meets several critical material requirements in the development of future nanoelectronic applications. This work reports the ambipolar characteristics of few-layer BP, induced using 2D transparent hexagonal boron nitride (h-BN) capping. The 2D h-BN capping have several advantages over conventional Al2O3 capping in flexible and transparent 2D device applications. The h-BN capping technique was used to achieve an electron mobility in the BP devices of 73 cm2V−1s−1, thereby demonstrating n-type behavior. The ambipolar BP devices exhibited ultrafast photodetector behavior with a very high photoresponsivity of 1980 mA/W over the ultraviolet (UV), visible, and infrared (IR) spectral ranges. The h-BN capping process offers a feasible approach to fabricating n-type behavior BP semiconductors and high photoresponse BP photodetectors. Full article
(This article belongs to the Special Issue Thin-Film Transistors)
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10 pages, 12405 KiB  
Article
Effects of Channel Thickness on Electrical Performance and Stability of High-Performance InSnO Thin-Film Transistors
by Qi Li, Junchen Dong, Dedong Han and Yi Wang
Membranes 2021, 11(12), 929; https://0-doi-org.brum.beds.ac.uk/10.3390/membranes11120929 - 26 Nov 2021
Cited by 15 | Viewed by 1949
Abstract
InSnO (ITO) thin-film transistors (TFTs) attract much attention in fields of displays and low-cost integrated circuits (IC). In the present work, we demonstrate the high-performance, robust ITO TFTs that fabricated at process temperature no higher than 100 °C. The influences of channel thickness [...] Read more.
InSnO (ITO) thin-film transistors (TFTs) attract much attention in fields of displays and low-cost integrated circuits (IC). In the present work, we demonstrate the high-performance, robust ITO TFTs that fabricated at process temperature no higher than 100 °C. The influences of channel thickness (tITO, respectively, 6, 9, 12, and 15 nm) on device performance and positive bias stress (PBS) stability of the ITO TFTs are examined. We found that content of oxygen defects positively correlates with tITO, leading to increases of both trap states as well as carrier concentration and synthetically determining electrical properties of the ITO TFTs. Interestingly, the ITO TFTs with a tITO of 9 nm exhibit the best performance and PBS stability, and typical electrical properties include a field-effect mobility (µFE) of 37.69 cm2/Vs, a Von of −2.3 V, a SS of 167.49 mV/decade, and an on–off current ratio over 107. This work paves the way for practical application of the ITO TFTs. Full article
(This article belongs to the Special Issue Thin-Film Transistors)
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8 pages, 2297 KiB  
Article
Steep Subthreshold Swing and Enhanced Illumination Stability InGaZnO Thin-Film Transistor by Plasma Oxidation on Silicon Nitride Gate Dielectric
by Yiming Liu, Chang Liu, Houyun Qin, Chong Peng, Mingxin Lu, Zhanguo Chen and Yi Zhao
Membranes 2021, 11(11), 902; https://0-doi-org.brum.beds.ac.uk/10.3390/membranes11110902 - 22 Nov 2021
Cited by 4 | Viewed by 1931
Abstract
In this paper, an InGaZnO thin-film transistor (TFT) based on plasma oxidation of silicon nitride (SiNx) gate dielectric with small subthreshold swing (SS) and enhanced stability under negative bias illumination stress (NBIS) have been investigated in detail. The mechanism of the [...] Read more.
In this paper, an InGaZnO thin-film transistor (TFT) based on plasma oxidation of silicon nitride (SiNx) gate dielectric with small subthreshold swing (SS) and enhanced stability under negative bias illumination stress (NBIS) have been investigated in detail. The mechanism of the high-performance InGaZnO TFT with plasma-oxidized SiNx gate dielectric was also explored. The X-ray photoelectron spectroscopy (XPS) results confirmed that an oxygen-rich layer formed on the surface of the SiNx layer and the amount of oxygen vacancy near the interface between SiNx and InGaZnO layer was suppressed via pre-implanted oxygen on SiNx gate dielectric before deposition of the InGaZnO channel layer. Moreover, the conductance method was employed to directly extract the density of the interface trap (Dit) in InGaZnO TFT to verify the reduction in oxygen vacancy after plasma oxidation. The proposed InGaZnO TFT with plasma oxidation exhibited a field-effect mobility of 16.46 cm2/V·s, threshold voltage (Vth) of −0.10 V, Ion/Ioff over 108, SS of 97 mV/decade, and Vth shift of −0.37 V after NBIS. The plasma oxidation on SiNx gate dielectric provides a novel approach for suppressing the interface trap for high-performance InGaZnO TFT. Full article
(This article belongs to the Special Issue Thin-Film Transistors)
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11 pages, 2779 KiB  
Article
A Novel Nitrogen Ion Implantation Technique for Turning Thin Film “Normally On” AlGaN/GaN Transistor into “Normally Off” Using TCAD Simulation
by Gene Sheu, Yu-Lin Song, Dupati Susmitha, Kutagulla Issac and Ramyasri Mogarala
Membranes 2021, 11(11), 899; https://0-doi-org.brum.beds.ac.uk/10.3390/membranes11110899 - 20 Nov 2021
Cited by 2 | Viewed by 3431
Abstract
This study presents an innovative, low-cost, mass-manufacturable ion implantation technique for converting thin film normally on AlGaN/GaN devices into normally off ones. Through TCAD (Technology Computer-Aided Design) simulations, we converted a calibrated normally on transistor into a normally off AlGaN/GaN transistor grown on [...] Read more.
This study presents an innovative, low-cost, mass-manufacturable ion implantation technique for converting thin film normally on AlGaN/GaN devices into normally off ones. Through TCAD (Technology Computer-Aided Design) simulations, we converted a calibrated normally on transistor into a normally off AlGaN/GaN transistor grown on a silicon <111> substrate using a nitrogen ion implantation energy of 300 keV, which shifted the bandgap from below to above the Fermi level. In addition, the threshold voltage (Vth) was adjusted by altering the nitrogen ion implantation dose. The normally off AlGaN/GaN device exhibited a breakdown voltage of 127.4 V at room temperature because of impact ionization, which showed a positive temperature coefficient of 3 × 10−3 K−1. In this study, the normally off AlGaN/GaN device exhibited an average drain current gain of 45.3%, which was confirmed through an analysis of transfer characteristics by changing the gate-to-source ramping. Accordingly, the proposed technique enabled the successful simulation of a 100-µm-wide device that can generate a saturation drain current of 1.4 A/mm at a gate-to-source voltage of 4 V, with a mobility of 1487 cm2V−1s−1. The advantages of the proposed technique are summarized herein in terms of processing and performance. Full article
(This article belongs to the Special Issue Thin-Film Transistors)
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8 pages, 2891 KiB  
Communication
Improvements of Electrical Characteristics in Poly-Si Nanowires Thin-Film Transistors with External Connection of a BiFeO3 Capacitor
by Tsung-Kuei Kang, Yu-Yu Lin, Han-Wen Liu, Che-Li Lin, Po-Jui Chang, Ming-Cheng Kao and Hone-Zern Chen
Membranes 2021, 11(10), 758; https://0-doi-org.brum.beds.ac.uk/10.3390/membranes11100758 - 30 Sep 2021
Cited by 2 | Viewed by 1657
Abstract
By a sol–gel method, a BiFeO3 (BFO) capacitor is fabricated and connected with the control thin film transistor (TFT). Compared with a control thin-film transistor, the proposed BFO TFT achieves 56% drive current enhancement and 7–28% subthreshold swing (SS) reduction. Moreover, the [...] Read more.
By a sol–gel method, a BiFeO3 (BFO) capacitor is fabricated and connected with the control thin film transistor (TFT). Compared with a control thin-film transistor, the proposed BFO TFT achieves 56% drive current enhancement and 7–28% subthreshold swing (SS) reduction. Moreover, the effect of the proposed BiFeO3 capacitor on IDS-VGS hysteresis in the BFO TFT is 0.1–0.2 V. Because dVint/dVGS > 1 is obtained at a wide range of VGS, it reveals that the incomplete dipole flipping is a major mechanism to obtain improved SS and a small hysteresis effect in the BFO TFT. Experimental results indicate that sol-gel BFO TFT is a potential candidate for digital application. Full article
(This article belongs to the Special Issue Thin-Film Transistors)
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14 pages, 3991 KiB  
Article
Application of Amorphous Zirconium-Yttrium-Aluminum-Magnesium-Oxide Thin Film with a High Relative Dielectric Constant Prepared by Spin-Coating
by Huiyun Yang, Zhihao Liang, Xiao Fu, Zhuohui Xu, Honglong Ning, Xianzhe Liu, Jiajing Lin, Yaru Pan, Rihui Yao and Junbiao Peng
Membranes 2021, 11(8), 608; https://0-doi-org.brum.beds.ac.uk/10.3390/membranes11080608 - 10 Aug 2021
Cited by 5 | Viewed by 2532
Abstract
Amorphous metal oxide has been a popular choice for thin film material in recent years due to its high uniformity. The dielectric layer is one of the core materials of the thin film transistor (TFT), and it affects the ability of charges storage [...] Read more.
Amorphous metal oxide has been a popular choice for thin film material in recent years due to its high uniformity. The dielectric layer is one of the core materials of the thin film transistor (TFT), and it affects the ability of charges storage in TFT. There is a conflict between a high relative dielectric constant and a wide band gap, so we solved this problem by using multiple metals to increase the entropy of the system. In this paper, we prepared zirconium-yttrium-aluminum-magnesium-oxide (ZYAMO) dielectric layers with a high relative dielectric constant using the solution method. The basic properties of ZYAMO films were measured by an atomic force microscope (AFM), an ultraviolet-visible spectrophotometer (UV-VIS), etc. It was observed that ZYAMO thin films had a larger optical band when the annealing temperature increased. Then, metal-insulator-metal (MIM) devices were fabricated to measure the electrical properties. We found that the leakage current density of the device is relatively lower and the ZYAMO thin film had a higher relative dielectric constant as the concentration went up. Finally, it reached a high relative dielectric constant of 56.09, while the leakage current density was no higher than 1.63 × 10−6 A/cm2@ 0.5 MV/cm at 1.0 M and 400 °C. Therefore, the amorphous ZYAMO thin films has a great application in the field of high permittivity request devices in the future. Full article
(This article belongs to the Special Issue Thin-Film Transistors)
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8 pages, 835 KiB  
Article
Effects of Thermal Annealing on the Properties of Zirconium-Doped MgxZn1−XO Films Obtained through Radio-Frequency Magnetron Sputtering
by Wen-Yen Lin, Feng-Tsun Chien, Hsien-Chin Chiu, Jinn-Kong Sheu and Kuang-Po Hsueh
Membranes 2021, 11(5), 373; https://0-doi-org.brum.beds.ac.uk/10.3390/membranes11050373 - 20 May 2021
Cited by 4 | Viewed by 2391
Abstract
Zirconium-doped MgxZn1−xO (Zr-doped MZO) mixed-oxide films were investigated, and the temperature sensitivity of their electric and optical properties was characterized. Zr-doped MZO films were deposited through radio-frequency magnetron sputtering using a 4-inch ZnO/MgO/ZrO2 (75/20/5 wt%) target. Hall measurement, [...] Read more.
Zirconium-doped MgxZn1−xO (Zr-doped MZO) mixed-oxide films were investigated, and the temperature sensitivity of their electric and optical properties was characterized. Zr-doped MZO films were deposited through radio-frequency magnetron sputtering using a 4-inch ZnO/MgO/ZrO2 (75/20/5 wt%) target. Hall measurement, X-ray diffraction (XRD), transmittance, and X-ray photoelectron spectroscopy (XPS) data were obtained. The lowest sheet resistance, highest mobility, and highest concentration were 1.30 × 103 Ω/sq, 4.46 cm2/Vs, and 7.28 × 1019 cm−3, respectively. The XRD spectra of the as-grown and annealed Zr-doped MZO films contained MgxZn1−xO(002) and ZrO2(200) coupled with Mg(OH)2(101) at 34.49°, 34.88°, and 38.017°, respectively. The intensity of the XRD peak near 34.88° decreased with temperature because the films that segregated Zr4+ from ZrO2(200) increased. The absorption edges of the films were at approximately 348 nm under 80% transmittance because of the Mg content. XPS revealed that the amount of Zr4+ increased with the annealing temperature. Zr is a potentially promising double donor, providing up to two extra free electrons per ion when used in place of Zn2+. Full article
(This article belongs to the Special Issue Thin-Film Transistors)
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11 pages, 4477 KiB  
Article
Raised Source/Drain (RSD) and Vertical Lightly Doped Drain (LDD) Poly-Si Thin-Film Transistor
by Feng-Tso Chien, Jing Ye, Wei-Cheng Yen, Chii-Wen Chen, Cheng-Li Lin and Yao-Tsung Tsai
Membranes 2021, 11(2), 103; https://0-doi-org.brum.beds.ac.uk/10.3390/membranes11020103 - 01 Feb 2021
Cited by 5 | Viewed by 3311
Abstract
The raised source/drain (RSD) structure is one of thin film transistor designs that is often used to improve device characteristics. Many studies have mentioned that the high impact ionization rate occurring at a drain side can be reduced, owing to a raised source/drain [...] Read more.
The raised source/drain (RSD) structure is one of thin film transistor designs that is often used to improve device characteristics. Many studies have mentioned that the high impact ionization rate occurring at a drain side can be reduced, owing to a raised source/drain area that can disperse the drain electric field. In this study, we will discuss how the electric field at the drain side of an RSD device is reduced by a vertical lightly doped drain (LDD) scheme rather than a RSD structure. We used different raised source/drain forms to simulate the drain side electric field for each device, as well as their output characteristics, using Integrated Systems Engineering (ISE-TCAD) simulators. Different source and drain thicknesses and doping profiles were applied to verify the RSD mechanism. We found that the electric fields of a traditional device and uniform doping RSD structures are almost the same (~2.9 × 105 V/cm). The maximum drain electric field could be reduced to ~2 × 105 V/cm if a vertical lightly doped drain RSD scheme was adopted. A pure raised source/drain structure did not benefit the device characteristics if a vertical lightly doped drain design was not included in the raised source/drain areas. Full article
(This article belongs to the Special Issue Thin-Film Transistors)
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Review

Jump to: Editorial, Research

20 pages, 4430 KiB  
Review
Hybrid Thin-Film Materials Combinations for Complementary Integration Circuit Implementation
by Gunhoo Woo, Hocheon Yoo and Taesung Kim
Membranes 2021, 11(12), 931; https://0-doi-org.brum.beds.ac.uk/10.3390/membranes11120931 - 26 Nov 2021
Cited by 3 | Viewed by 2701
Abstract
Beyond conventional silicon, emerging semiconductor materials have been actively investigated for the development of integrated circuits (ICs). Considerable effort has been put into implementing complementary circuits using non-silicon emerging materials, such as organic semiconductors, carbon nanotubes, metal oxides, transition metal dichalcogenides, and perovskites. [...] Read more.
Beyond conventional silicon, emerging semiconductor materials have been actively investigated for the development of integrated circuits (ICs). Considerable effort has been put into implementing complementary circuits using non-silicon emerging materials, such as organic semiconductors, carbon nanotubes, metal oxides, transition metal dichalcogenides, and perovskites. Whereas shortcomings of each candidate semiconductor limit the development of complementary ICs, an approach of hybrid materials is considered as a new solution to the complementary integration process. This article revisits recent advances in hybrid-material combination-based complementary circuits. This review summarizes the strong and weak points of the respective candidates, focusing on their complementary circuit integrations. We also discuss the opportunities and challenges presented by the prospect of hybrid integration. Full article
(This article belongs to the Special Issue Thin-Film Transistors)
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