Etching for Semiconductor Nanofabrication

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "D1: Semiconductor Devices".

Deadline for manuscript submissions: closed (15 September 2021) | Viewed by 11846

Special Issue Editor

Interuniversity Micro-Electronics Center (IMEC), Kapeldreef 75, 3001 Leuven, Belgium
Interests: electrochemistry; surface chemistry; wet-chemical etching; metal deposition

Special Issue Information

Dear Colleagues,

Over the recent decades, the semiconductor industry has managed to increase chip performance at an impressive and steady rate by scaling the dimensions of all parts of the integrated devices (transistors, metallization, dielectrics). To enable this, the controlled and selective removal of a wide range of materials (e.g., metals, semiconductors, high and low-k, polymers) is essential. Depending on the application, requirements, and specifications of the electronic device process integration flow, either ‘dry’ or ‘wet’ processes are used, both of which have their strengths (e.g., (tunable) selectivity of removal, circumventing corrosion issues, compatibility with other materials, surface roughness control, impact surface (electro)chemistry). In many cases, material properties are (becoming) a bottleneck for the manufacturing of more performant chips. Therefore, the control, reproducibility, and understanding of etching processes at the nanometer scale is of paramount importance. This Special Issue aims to provide an overview of the state-of-the-art in etching process development and research to enable future advanced technologies.    

We look forward to receiving your submissions!

Dr. Harold Philipsen
Guest Editor

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Keywords

  • metals
  • semiconductors
  • etching
  • surface (electro)chemistry

Published Papers (5 papers)

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Research

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9 pages, 4879 KiB  
Article
Design and Fabrication of Double-Layer Crossed Si Microchannel Structure
by Yipeng Wang, Weijian Zhou and Tieying Ma
Micromachines 2021, 12(12), 1557; https://0-doi-org.brum.beds.ac.uk/10.3390/mi12121557 - 14 Dec 2021
Viewed by 1708
Abstract
A four-step etching method is used to prepare the double-layer cross Si microchannel structure. In the first etching step, a <100> V-groove structure is etched on (100) silicon, and the top channel is formed after thermal oxidation with the depth of the channel [...] Read more.
A four-step etching method is used to prepare the double-layer cross Si microchannel structure. In the first etching step, a <100> V-groove structure is etched on (100) silicon, and the top channel is formed after thermal oxidation with the depth of the channel and the slope of its sidewall being modulated by the etching time. The second etching step is to form a sinking substrate, and then the third step is to etch the bottom channel at 90° (<100> direction) and 45° (<110> direction) with the top channel, respectively. Hence, the bottom channel on the sink substrate is half-buried into the top channel. Undercut characteristic of 25% TMAH is used to perform the fourth step, etching through the overlapping part of the two layers of channels to form a double-layer microchannel structure. Different from the traditional single-layer microchannels, the double-layer crossed microchannels are prepared by the four-step etching method intersect in space but are not connected, which has structural advantages. Finally, when the angle between the top and bottom is 90°, the root cutting time at the intersection is up to 6 h, making the width of the bottom channel 4–5 times that of the top channel. When the angle between the top and bottom is 45°, the root cutting time at the intersection is only 4 h, and due to the corrosion along (111), the corrosion speed of the sidewall is very slow and the consistency of the width of the upper and lower channels is better than 90° after the end. Compared with the same-plane cross channel structure, the semiburied microchannel structure avoids the V-shaped path at the intersection, and the fluid can pass through the bottom channel in a straight line and cross with the top channel without overlapping, which has a structural advantage. If applied to microfluidic technology, high-efficiency delivery of two substances can be carried out independently in the same area; if applied to microchannel heat dissipation technology, the heat conduction area of the fluid can be doubled under the same heat dissipation area, thereby increasing the heat dissipation efficiency. Full article
(This article belongs to the Special Issue Etching for Semiconductor Nanofabrication)
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16 pages, 14135 KiB  
Article
Embedding of Ultrathin Chips in Highly Flexible, Photosensitive Solder Mask Resist
by Florian Janek, Nadine Eichhorn, Sascha Weser, Kerstin Gläser, Wolfgang Eberhardt and André Zimmermann
Micromachines 2021, 12(8), 856; https://0-doi-org.brum.beds.ac.uk/10.3390/mi12080856 - 21 Jul 2021
Viewed by 1777
Abstract
This work presents an embedding process for ultrathin silicon chips in mechanically flexible solder mask resist and their electrical contacting by inkjet printing. Photosensitive solder mask resist is applied by conformal spray coating onto epoxy bonded ultrathin chips with a daisy chain layout. [...] Read more.
This work presents an embedding process for ultrathin silicon chips in mechanically flexible solder mask resist and their electrical contacting by inkjet printing. Photosensitive solder mask resist is applied by conformal spray coating onto epoxy bonded ultrathin chips with a daisy chain layout. The contact pads are opened by photolithography using UV direct light exposure. Circular and rectangular openings of 90 µm and 130 µm diameter, respectively, edge length are realized. Commercial inks containing nanoparticular silver and gold are inkjet printed to form conductive tracks between daisy chain structures. Different numbers of ink layers are applied. The track resistances are characterized by needle probing. Silver ink shows low resistances only for multiple layers and 90 µm openings, while gold ink exhibits low resistances in the single-digit Ω-range for minimum two printed layers. Full article
(This article belongs to the Special Issue Etching for Semiconductor Nanofabrication)
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9 pages, 32672 KiB  
Article
Liquid-Infused Microgrooved Slippery Surface Ablated by One-Step Laser Irradiation for Underwater Bubble Directional Manipulation and Anisotropic Spreading
by Wei Liu, Xuehui Chen and Yunlong Jiao
Micromachines 2021, 12(5), 555; https://0-doi-org.brum.beds.ac.uk/10.3390/mi12050555 - 13 May 2021
Cited by 2 | Viewed by 2411
Abstract
A pitcher plant is a kind of liquid-infused porous surface that imparts an excellent directional manipulation ability to in-air droplets or underwater bubbles, so it has attracted researchers’ attention in both academic and industrial issues. In this work, a kind of liquid-infused anisotropic [...] Read more.
A pitcher plant is a kind of liquid-infused porous surface that imparts an excellent directional manipulation ability to in-air droplets or underwater bubbles, so it has attracted researchers’ attention in both academic and industrial issues. In this work, a kind of liquid-infused anisotropic microgrooved slippery surface (LIAMSS) was fabricated through one-step femtosecond laser irradiation and lubricant coating technology. On the inclined LIAMSS, the underwater bubbles show great directional motion and anisotropic spreading ability under the effect of buoyancy. It should be noted that the interaction between the air and the lubricant layer plays a dominant role in determining the attachment and the movement of the underwater bubble, which could be ascribed to the competition between the adhesion resistance induced by contact angle hysteresis and the drive force induced by buoyancy. Additionally, the bubble shows obvious anisotropy on the LIAMSS with the increase in volume because of the restriction of the slippery area, and the bubble contact angle perpendicular to the grooved region is about 88 when the bubble volume is 5 μL. We believe that the present findings would accelerate the application of this kind of bubble slippery surface in underwater gas collection and tail gas treatment. Full article
(This article belongs to the Special Issue Etching for Semiconductor Nanofabrication)
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14 pages, 3732 KiB  
Article
Doped or Quantum-Dot Layers as In Situ Etch-Stop Indicators for III/V Semiconductor Reactive Ion Etching (RIE) Using Reflectance Anisotropy Spectroscopy (RAS)
by Guilherme Sombrio, Emerson Oliveira, Johannes Strassner, Johannes Richter, Christoph Doering and Henning Fouckhardt
Micromachines 2021, 12(5), 502; https://0-doi-org.brum.beds.ac.uk/10.3390/mi12050502 - 29 Apr 2021
Cited by 6 | Viewed by 1552
Abstract
Reflectance anisotropy spectroscopy (RAS), which was originally invented to monitor epitaxial growth, can—as we have previously shown—also be used to monitor the reactive ion etching of III/V semiconductor samples in situ and in real time, as long as the etching rate is not [...] Read more.
Reflectance anisotropy spectroscopy (RAS), which was originally invented to monitor epitaxial growth, can—as we have previously shown—also be used to monitor the reactive ion etching of III/V semiconductor samples in situ and in real time, as long as the etching rate is not too high and the abrasion at the etch front is not totally chaotic. Moreover, we have proven that—using RAS equipment and optical Fabry‒Perot oscillations due to the ever-shrinking thickness of the uppermost etched layer—the in situ etch-depth resolution can be as good as ±0.8 nm, employing a Vernier-scale type measurement and evaluation procedure. Nominally, this amounts to ±1.3 lattice constants in our exemplary material system, AlGaAsSb, on a GaAs or GaSb substrate. In this contribution, we show that resolutions of about ±5.6 nm can be reliably achieved without a Vernier scale protocol by employing thin doped layers or sharp interfaces between differently doped layers or quantum-dot (QD) layers as etch-stop indicators. These indicator layers can either be added to the device layer design on purpose or be part of it incidentally due to the functionality of the device. For typical etch rates in the range of 0.7 to 1.3 nm/s (that is, about 40 to 80 nm/min), the RAS spectrum will show a distinct change even for very thin indicator layers, which allows for the precise termination of the etch run. Full article
(This article belongs to the Special Issue Etching for Semiconductor Nanofabrication)
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Review

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18 pages, 3363 KiB  
Review
Metal-Assisted Catalytic Etching (MACE) for Nanofabrication of Semiconductor Powders
by Kurt W. Kolasinski
Micromachines 2021, 12(7), 776; https://0-doi-org.brum.beds.ac.uk/10.3390/mi12070776 - 30 Jun 2021
Cited by 3 | Viewed by 3346
Abstract
Electroless etching of semiconductors has been elevated to an advanced micromachining process by the addition of a structured metal catalyst. Patterning of the catalyst by lithographic techniques facilitated the patterning of crystalline and polycrystalline wafer substrates. Galvanic deposition of metals on semiconductors has [...] Read more.
Electroless etching of semiconductors has been elevated to an advanced micromachining process by the addition of a structured metal catalyst. Patterning of the catalyst by lithographic techniques facilitated the patterning of crystalline and polycrystalline wafer substrates. Galvanic deposition of metals on semiconductors has a natural tendency to produce nanoparticles rather than flat uniform films. This characteristic makes possible the etching of wafers and particles with arbitrary shape and size. While it has been widely recognized that spontaneous deposition of metal nanoparticles can be used in connection with etching to porosify wafers, it is also possible to produced nanostructured powders. Metal-assisted catalytic etching (MACE) can be controlled to produce (1) etch track pores with shapes and sizes closely related to the shape and size of the metal nanoparticle, (2) hierarchically porosified substrates exhibiting combinations of large etch track pores and mesopores, and (3) nanowires with either solid or mesoporous cores. This review discussed the mechanisms of porosification, processing advances, and the properties of the etch product with special emphasis on the etching of silicon powders. Full article
(This article belongs to the Special Issue Etching for Semiconductor Nanofabrication)
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