Transport and Noise Behavior of Nanoelectronic Devices

A special issue of Nanomaterials (ISSN 2079-4991). This special issue belongs to the section "Nanoelectronics, Nanosensors and Devices".

Deadline for manuscript submissions: closed (30 April 2023) | Viewed by 12308

Special Issue Editor


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Guest Editor
Dipartimento di Ingegneria dell’Informazione, Università di Pisa, Via G. Caruso 16, 56122 Pisa, Italy
Interests: nanoelectronic devices; electronic systems

Special Issue Information

Dear Colleagues,

With the drive to fabricate smaller and more powerful circuits, the size of electronic devices has been progressively scaled down, following Moore's law. Modern nanoelectronic devices have a size in the order of tens of nanometers and present very peculiar characteristics: transport has become close to ballistic and quantum mechanical effects play a significant role.

Since characteristic device sizes are approaching the atomic scale, the physical properties of materials differ from those of the bulk, and they must be properly taken into account. Moreover, the reduction of the volume of the active region enhances the effects of impurities and material defects. Noise is the main source of signal degradation and it is often closely related to the material properties, which makes the choice of material a key issue.

A very large design and technological effort has been devoted to pushing to the limits of the present device concepts (More Moore approach), with the introduction of new materials for the active region of the devices (e.g., silicon on insulator) and of geometries such as the gate-all-around and the finfet transistors.

From a different perspective, radically new materials and principles of operation have also been proposed (More than Moore approach), in order to overcome the limitations in further scaling. Alternative ways to store, elaborate and transmit information, such as spintronics and valleytronics, and new principles of operation, such as adiabatic computing and quantum computing, are being actively explored.

This Special Issue aims to collect significant research articles reporting on theoretical and/or experimental advancements in the transport and/or noise behavior of nanoelectronic devices and in the related material, technological, synthesis and characterization issues.

Accepted papers are published in the joint Special Issue in Nanomanufacturing or Nanomaterials (https://0-www-mdpi-com.brum.beds.ac.uk/journal/nanomanufacturing/special_issues/Transport_Noise_Nanoelectronic_Devices)

Prof. Dr. Paolo Marconcini
Guest Editor

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Keywords

  • Electronic devices
  • Electronic transport
  • Conductance
  • Electronic noise
  • 2D materials
  • Spintronics
  • Topological insulators
  • Semiconductor heterostructures
  • Scaled transistors
  • Semiconductors

Published Papers (5 papers)

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Research

9 pages, 32377 KiB  
Article
Analysis of Low-Frequency 1/f Noise Characteristics for MoTe2 Ambipolar Field-Effect Transistors
by Bing Zhang, Congzhen Hu, Youze Xin, Yaoxin Li, Yiyun Xie, Qian Xing, Zhuoqi Guo, Zhongming Xue, Dan Li, Guohe Zhang, Li Geng, Zungui Ke and Chi Wang
Nanomaterials 2022, 12(8), 1325; https://0-doi-org.brum.beds.ac.uk/10.3390/nano12081325 - 12 Apr 2022
Cited by 7 | Viewed by 1874
Abstract
Low-frequency electronic noise is an important parameter used for the electronic and sensing applications of transistors. Here, we performed a systematic study on the low-frequency noise mechanism for both p-channel and n-channel MoTe2 field-effect transistors (FET) at different temperatures, finding that low-frequency [...] Read more.
Low-frequency electronic noise is an important parameter used for the electronic and sensing applications of transistors. Here, we performed a systematic study on the low-frequency noise mechanism for both p-channel and n-channel MoTe2 field-effect transistors (FET) at different temperatures, finding that low-frequency noise for both p-type and n-type conduction in MoTe2 devices come from the variable range hopping (VRH) transport process where carrier number fluctuations (CNF) occur. This process results in the broad distribution of the waiting time of the carriers between successive hops, causing the noise to increase as the temperature decreases. Moreover, we found the noise magnitude for p-type MoTe2 FET hardly changed after exposure to the ambient conditions, whereas for n-FET, the magnitude increased by nearly one order. These noise characteristics may provide useful guidelines for developing high-performance electronics based on the emerging transition metal dichalcogenides. Full article
(This article belongs to the Special Issue Transport and Noise Behavior of Nanoelectronic Devices)
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25 pages, 1010 KiB  
Article
Transport Simulation of Graphene Devices with a Generic Potential in the Presence of an Orthogonal Magnetic Field
by Paolo Marconcini and Massimo Macucci
Nanomaterials 2022, 12(7), 1087; https://0-doi-org.brum.beds.ac.uk/10.3390/nano12071087 - 26 Mar 2022
Cited by 9 | Viewed by 1755
Abstract
The effect of an orthogonal magnetic field is introduced into a numerical simulator, based on the solution of the Dirac equation in the reciprocal space, for the study of transport in graphene devices consisting of armchair ribbons with a generic potential. Different approaches [...] Read more.
The effect of an orthogonal magnetic field is introduced into a numerical simulator, based on the solution of the Dirac equation in the reciprocal space, for the study of transport in graphene devices consisting of armchair ribbons with a generic potential. Different approaches are proposed to reach this aim. Their efficiency and range of applicability are compared, with particular focus on the requirements in terms of model setup and on the possible numerical issues that may arise. Then, the extended code is successfully validated, simulating several interesting magnetic-related phenomena in graphene devices, including magnetic-field-induced energy-gap modulation, coherent electron focusing, and Aharonov–Bohm interference effects. Full article
(This article belongs to the Special Issue Transport and Noise Behavior of Nanoelectronic Devices)
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13 pages, 5753 KiB  
Article
Design and Micro-Nano Fabrication of a GaAs-Based On-Chip Miniaturized Bandpass Filter with Intertwined Inductors and Circinate Capacitor Using Integrated Passive Device Technology
by Jian Chen, Bao-Hua Zhu, Shan Yang, Wei Yue, Dong-Min Lee, Eun-Seong Kim and Nam-Young Kim
Nanomaterials 2022, 12(3), 347; https://0-doi-org.brum.beds.ac.uk/10.3390/nano12030347 - 21 Jan 2022
Cited by 4 | Viewed by 2211
Abstract
In this study, we propose a miniaturized bandpass filter (BPF) developed by combining an approximate circular (36-gon) winding inductor, a circinate capacitor, and five air-bridge structures fabricated on a gallium arsenide (GaAs) substrate using an integrated passive device (IPD) technology. We introduced air-bridge [...] Read more.
In this study, we propose a miniaturized bandpass filter (BPF) developed by combining an approximate circular (36-gon) winding inductor, a circinate capacitor, and five air-bridge structures fabricated on a gallium arsenide (GaAs) substrate using an integrated passive device (IPD) technology. We introduced air-bridge structures into the outer metal wire to improve the capacitance per unit volume while utilizing a miniaturized chip with dimensions 1538 μm × 800 μm (0.029 λ0 × 0.015 λ0) for the BPF. The pattern was designed and optimized by simulating different dimensional parameters, and the group delay and current density are presented. The equivalent circuit was modeled to analysis various parasitic effect. Additionally, we described the GaAs-based micro-nano scale fabrication process to elucidate the proposed IPD technology and the physical structure of the BPF. Measurements were conducted with a center frequency of 1.53 GHz (insertion loss of 0.53 dB) and a 3-dB fractional bandwidth (FBW) of 70.59%. The transmission zero was located at 4.16 GHz with restraint of 35.86 dB. Owing to the benefits from its miniaturized chip size and high performance, the proposed GaAs-based IPD BPF was verified as an excellent device for various S-band applications, such as satellite communication, keyless vehicle locks, wireless headphones, and radar. Full article
(This article belongs to the Special Issue Transport and Noise Behavior of Nanoelectronic Devices)
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8 pages, 1032 KiB  
Article
Unified Model of Shot Noise in the Tunneling Current in Sub-10 nm MOSFETs
by Jonghwan Lee
Nanomaterials 2021, 11(10), 2759; https://0-doi-org.brum.beds.ac.uk/10.3390/nano11102759 - 18 Oct 2021
Cited by 3 | Viewed by 1912
Abstract
A single unified analytical model is presented to predict the shot noise for both the source-to-drain (SD) and the gate tunneling current in sub-10 nm MOSFETs with ultrathin oxide. Based on the Landauer formula, the model is constructed from the sequential tunneling flows [...] Read more.
A single unified analytical model is presented to predict the shot noise for both the source-to-drain (SD) and the gate tunneling current in sub-10 nm MOSFETs with ultrathin oxide. Based on the Landauer formula, the model is constructed from the sequential tunneling flows associated with number fluctuations. This approach provides the analytical formulation of the shot noise as a function of the applied voltages. The model performs well in predicting the Fano factor for shot noise in the SD and gate tunneling currents. Full article
(This article belongs to the Special Issue Transport and Noise Behavior of Nanoelectronic Devices)
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10 pages, 3130 KiB  
Article
Interface Trap-Induced Temperature Dependent Hysteresis and Mobility in β-Ga2O3 Field-Effect Transistors
by Youngseo Park, Jiyeon Ma, Geonwook Yoo and Junseok Heo
Nanomaterials 2021, 11(2), 494; https://0-doi-org.brum.beds.ac.uk/10.3390/nano11020494 - 16 Feb 2021
Cited by 7 | Viewed by 3518
Abstract
Interface traps between a gate insulator and beta-gallium oxide (β-Ga2O3) channel are extensively studied because of the interface trap charge-induced instability and hysteresis. In this work, their effects on mobility degradation at low temperature and hysteresis at [...] Read more.
Interface traps between a gate insulator and beta-gallium oxide (β-Ga2O3) channel are extensively studied because of the interface trap charge-induced instability and hysteresis. In this work, their effects on mobility degradation at low temperature and hysteresis at high temperature are investigated by characterizing electrical properties of the device in a temperature range of 20–300 K. As acceptor-like traps at the interface are frozen below 230 K, the hysteresis becomes negligible but simultaneously the channel mobility significantly degrades because the inactive neutral traps allow additional collisions of electrons at the interface. This is confirmed by the fact that a gate bias adversely affects the channel mobility. An activation energy of such traps is estimated as 170 meV. The activated trap charges’ trapping and de-trapping processes in response to the gate pulse bias reveal that the time constants for the slow and fast processes decrease due to additionally activated traps as the temperature increases. Full article
(This article belongs to the Special Issue Transport and Noise Behavior of Nanoelectronic Devices)
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