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Nanomaterials
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Nanoscale Thin Film Transistors and Application Exploration
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Nanoscale Thin Film Transistors and Application Exploration

A special issue of Nanomaterials (ISSN 2079-4991).

Deadline for manuscript submissions: closed (31 March 2023) | Viewed by 9839

Special Issue Editor

Dr. Gang He

E-Mail Website
Guest Editor
School of Materials Sciences and Engineering, Anhui University, Hefei 230601, China
Interests: thin film deposition; field effect transistors; logic circuits; interface chemistry; high-k gate dielectrics; III–V compound semiconductor/high speed electronic devices
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

This Special Issue has focused on original research articles and critical reviews on “Nanoscale Thin Film Transistors and Application Exploration". The main aim is to focus on related topics by publishing the current developments in booming TFTs and device applications.

Currently, thin film transistors (TFTs) have been explored and are widely used in integrated circuits, flat-panel displays, and portable and wearable electronics as switching elements to amplify or convert electrical signals. TFT technologies have become mainstream for realizing low-cost and low-power consumption electronic devices in the past two decades.

This Special Issue of Nanomaterials on “Nanoscale Thin Film Transistors and Application Exploration” will closely follow the research in this topic to highlight the recent achievements of TFTs and their potential applications from leading groups around the world. Experimental and theoretical developments in materials, device structures, simulations, and applications are appreciated.

In particular, the topics of interest include but are not limited to:
•    C-based thin film transistors;
•    Organic thin film transistors;
•    Flexible thin film transistors;
•    Oxide-based thin film transistors;
•    High-k gate dielectrics for thin film transistors;
•    Device simulation;
•    Device characteristics and performance optimization;
•    Potential device applications.

Dr. Gang He
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Nanomaterials is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2900 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • thin film transistors
  • high-k gate dielectrics
  • novel device structure
  • device application
  • low-power consumption
  • device characteristics and performance optimization
  • oxide-based semiconductors

Published Papers (6 papers)

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Research

11 pages, 2946 KiB  
Article
Experimental Formation and Mechanism Study for Super-High Dielectric Constant AlOx/TiOy Nanolaminates
by Jiangwei Liu, Masayuki Okamura, Hisanori Mashiko, Masataka Imura, Meiyong Liao, Ryosuke Kikuchi, Michio Suzuka and Yasuo Koide
Nanomaterials 2023, 13(7), 1256; https://0-doi-org.brum.beds.ac.uk/10.3390/nano13071256 - 02 Apr 2023
Viewed by 1169
Abstract
Super-high dielectric constant (k) AlOx/TiOy nanolaminates (ATO NLs) are deposited by an atomic layer deposition technique for application in next-generation electronics. Individual multilayers with uniform thicknesses are formed for the ATO NLs. With an increase in AlOx [...] Read more.
Super-high dielectric constant (k) AlOx/TiOy nanolaminates (ATO NLs) are deposited by an atomic layer deposition technique for application in next-generation electronics. Individual multilayers with uniform thicknesses are formed for the ATO NLs. With an increase in AlOx content in each ATO sublayer, the shape of the Raman spectrum has a tendency to approach that of a single AlOx layer. The effects of ATO NL deposition conditions on the electrical properties of the metal/ATO NL/metal capacitors were investigated. A lower deposition temperature, thicker ATO NL, and lower TiOy content in each ATO sublayer can lead to a lower leakage current and smaller loss tangent at 1 kHz for the capacitors. A higher deposition temperature, larger number of ATO interfaces, and higher TiOy content in each ATO sublayer are important for obtaining higher k values for the ATO NLs. With an increase in resistance in the capacitors, the ATO NLs vary from semiconductors to insulators and their k values have a tendency to decrease. For most of the capacitors, the capacitances reduce with increments in absolute measurement voltage. There are semi-circular shapes for the impedance spectra of the capacitors. By fitting them with the equivalent circuit, it is observed that with the increase in absolute voltage, both parallel resistance and capacitance decrease. The variation in the capacitance is explained well by a novel double-Schottky electrode contact model. The formation of super-high k values for the semiconducting ATO NLs is possibly attributed to the accumulation of charges. Full article
(This article belongs to the Special Issue Nanoscale Thin Film Transistors and Application Exploration)
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9 pages, 5270 KiB  
Article
Critical Effect of Oxygen Pressure in Pulsed Laser Deposition for Room Temperature and High Performance Amorphous In-Ga-Zn-O Thin Film Transistors
by Yue Zhou, Dao Wang, Yushan Li, Lixin Jing, Shuangjie Li, Xiaodan Chen, Beijing Zhang, Wentao Shuai, Ruiqiang Tao, Xubing Lu and Junming Liu
Nanomaterials 2022, 12(24), 4358; https://0-doi-org.brum.beds.ac.uk/10.3390/nano12244358 - 07 Dec 2022
Cited by 2 | Viewed by 1630
Abstract
The aspects of low processing temperature and easy running in oxygen atmosphere contribute to the potential of pulsed laser deposition (PLD) in developing a-IGZO TFTs for flexible applications. However, the realization of low-temperature and high-performance devices with determined strategies requires further exploration. In [...] Read more.
The aspects of low processing temperature and easy running in oxygen atmosphere contribute to the potential of pulsed laser deposition (PLD) in developing a-IGZO TFTs for flexible applications. However, the realization of low-temperature and high-performance devices with determined strategies requires further exploration. In this work, the effect of oxygen pressure and post-annealing processes and their mechanisms on the performance evolution of a-IGZO TFTs by PLD were systematically studied. A room-temperature a-IGZO TFT with no hysteresis and excellent performances, including a μ of 17.19 cm2/V·s, an Ion/Ioff of 1.7 × 106, and a SS of 403.23 mV/decade, was prepared at the oxygen pressure of 0.5 Pa. Moreover, an O2 annealing atmosphere was confirmed effective for high-quality a-IGZO films deposited at high oxygen pressure (10 Pa), which demonstrates the critical effect of oxygen vacancies, rather than weak bonds, on the device’s performance. Full article
(This article belongs to the Special Issue Nanoscale Thin Film Transistors and Application Exploration)
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7 pages, 1685 KiB  
Article
A Simple Doping Process Achieved by Modifying the Passivation Layer for Self-Aligned Top-Gate In-Ga-Zn-O Thin-Film Transistors at 200 °C
by Cong Peng, Huixue Huang, Meng Xu, Longlong Chen, Xifeng Li and Jianhua Zhang
Nanomaterials 2022, 12(22), 4021; https://0-doi-org.brum.beds.ac.uk/10.3390/nano12224021 - 16 Nov 2022
Cited by 3 | Viewed by 1262
Abstract
In this paper, a facile modifying technique of source/drain regions conductivity was proposed for self-aligned top-gate In-Ga-Zn-O (IGZO) thin-film transistors (TFTs) by controlling the process parameter of the passivation layer at relatively low temperatures. The sheet resistance of the source and drain regions [...] Read more.
In this paper, a facile modifying technique of source/drain regions conductivity was proposed for self-aligned top-gate In-Ga-Zn-O (IGZO) thin-film transistors (TFTs) by controlling the process parameter of the passivation layer at relatively low temperatures. The sheet resistance of the source and drain regions of IGZO was approximately 365 Ω/□, and there was no significant change within a month. The device parameters of mobility, threshold voltage, subthreshold swing, and current switching ratio of the fabricated device were 15.15 cm2V−1s−1, 0.09 V, 0.15 V/dec, and higher than 109, respectively. The threshold voltage drift under negative bias illumination stress was −0.34 V. In addition, a lower channel width-normalized contact resistance of 9.86 Ω·cm was obtained. Full article
(This article belongs to the Special Issue Nanoscale Thin Film Transistors and Application Exploration)
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12 pages, 3070 KiB  
Article
The Mechanism of the Photostability Enhancement of Thin-Film Transistors Based on Solution-Processed Oxide Semiconductors Doped with Tetravalent Lanthanides
by Linfeng Lan, Chunchun Ding, Penghui He, Huimin Su, Bo Huang, Jintao Xu, Shuguang Zhang and Junbiao Peng
Nanomaterials 2022, 12(21), 3902; https://0-doi-org.brum.beds.ac.uk/10.3390/nano12213902 - 04 Nov 2022
Cited by 2 | Viewed by 1311
Abstract
The applications of thin-film transistors (TFTs) based on oxide semiconductors are limited due to instability under negative bias illumination stress (NBIS). Here, we report TFTs based on solution-processed In2O3 semiconductors doped with Pr4+ or Tb4+, which can [...] Read more.
The applications of thin-film transistors (TFTs) based on oxide semiconductors are limited due to instability under negative bias illumination stress (NBIS). Here, we report TFTs based on solution-processed In2O3 semiconductors doped with Pr4+ or Tb4+, which can effectively improve the NBIS stability. The differences between the Pr4+-doped In2O3 (Pr:In2O3) and Tb4+-doped In2O3 (Tb:In2O3) are investigated in detail. The undoped In2O3 TFTs with different annealing temperatures exhibit poor NBIS stability with serious turn-on voltage shift (ΔVon). After doping with Pr4+/Tb4+, the TFTs show greatly improved NBIS stability. As the annealing temperature increases, the Pr:In2O3 TFTs have poorer NBIS stability (ΔVon are −3.2, −4.8, and −4.8 V for annealing temperature of 300, 350, and 400 °C, respectively), while the Tb:In2O3 TFTs have better NBIS stability (ΔVon are −3.6, −3.6, and −1.2 V for annealing temperature of 300, 350, and 400 ℃, respectively). Further studies reveal that the improvement of the NBIS stability of the Pr4+/Tb4+:In2O3 TFTs is attributed to the absorption of the illuminated light by the Pr/Tb4fn—O2p6 to Pr/Tb 4fn+1—O2p5 charge transfer (CT) transition and downconversion of the light to nonradiative transition with a relatively short relaxation time compared to the ionization process of the oxygen vacancies. The higher NBIS stability of Tb:In2O3 TFTs compared to Pr:In2O3 TFTs is ascribed to the smaller ion radius of Tb4+ and the lower energy level of Tb 4f7 with a isotropic half-full configuration compared to that of Pr 4f1, which would make it easier for the Tb4+ to absorb the visible light than the Pr4+. Full article
(This article belongs to the Special Issue Nanoscale Thin Film Transistors and Application Exploration)
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10 pages, 2252 KiB  
Article
Ultralow-Thermal-Budget-Driven IWO-Based Thin-Film Transistors and Application Explorations
by Shanshan Jiang, Gang He, Wenhao Wang, Minmin Zhu, Zhengquan Chen, Qian Gao and Yanmei Liu
Nanomaterials 2022, 12(18), 3243; https://0-doi-org.brum.beds.ac.uk/10.3390/nano12183243 - 19 Sep 2022
Viewed by 1678
Abstract
Exploiting multifunctional thin film transistors (TFTs) by low-temperature manufacturing strategy is a crucial step toward flexible electronics. Herein, a multifunctional indium–tungsten-oxide (IWO)-based TFT, gated by solid-state chitosan electrolyte membrane, is fabricated on paper substrate at room temperature. The chitosan exhibits a high specific [...] Read more.
Exploiting multifunctional thin film transistors (TFTs) by low-temperature manufacturing strategy is a crucial step toward flexible electronics. Herein, a multifunctional indium–tungsten-oxide (IWO)-based TFT, gated by solid-state chitosan electrolyte membrane, is fabricated on paper substrate at room temperature. The chitosan exhibits a high specific electric-double-layer capacitance of 2.0 µF cm−2 due to the existence of mobile protons. The IWO-based TFT possesses excellent electrical properties, including a low threshold voltage of 0.2 V, larger current switching ratio of 1.3 × 106, high field effect mobility of 15.0 cm2 V−1s−1, and small subthreshold swing of 117 mV/decade, respectively. Multifunctional operations including inverter, Schmitt triggers, and NAND gate are successfully demonstrated. As an example of information processing, the essential signal transmission functions of biological synapses also be emulated in the fabricated IWO-based TFTs. The experimental results indicate that such flexible IWO-based TFTs on low-cost and biodegradable paper provide the new-concept building blocks for flexible electronics. Full article
(This article belongs to the Special Issue Nanoscale Thin Film Transistors and Application Exploration)
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9 pages, 4818 KiB  
Article
Multi-Segment TFT Compact Model for THz Applications
by Xueqing Liu, Trond Ytterdal and Michael Shur
Nanomaterials 2022, 12(5), 765; https://0-doi-org.brum.beds.ac.uk/10.3390/nano12050765 - 24 Feb 2022
Cited by 3 | Viewed by 1610
Abstract
We present an update of the Rensselaer Polytechnic Institute (RPI) thin-film transistor (TFT) compact model. The updated model implemented in Simulation Program with Integrated Circuit Emphasis (SPICE) accounts for the gate voltage-dependent channel layer thickness, enables the accurate description of the direct current [...] Read more.
We present an update of the Rensselaer Polytechnic Institute (RPI) thin-film transistor (TFT) compact model. The updated model implemented in Simulation Program with Integrated Circuit Emphasis (SPICE) accounts for the gate voltage-dependent channel layer thickness, enables the accurate description of the direct current (DC) characteristics, and uses channel segmentation to allow for terahertz (THz) frequency simulations. The model introduces two subthreshold ideality factors to describe the control of the gate voltage on the channel layer and its effect on the drain-to-source current and the channel capacitance. The calculated field distribution in the channel is used to evaluate the channel segment parameters including the segment impedance, kinetic inductance, and gate-to-segment capacitances. Our approach reproduces the conventional RPI TFT model at low frequencies, fits the measured current–voltage characteristics with sufficient accuracy, and extends the RPI TFT model applications into the THz frequency range. Our calculations show that a single TFT or complementary TFTs could efficiently detect the sub-terahertz and terahertz radiation. Full article
(This article belongs to the Special Issue Nanoscale Thin Film Transistors and Application Exploration)
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