Design of the Threshold-Controllable Memristor Emulator Based on NDR Characteristics

Abstract

Due to the high manufacturing cost of memristors, an equivalent emulator has been employed as one of the mainstream approaches of memristor research. A threshold-type memristor emulator based on negative differential resistance (NDR) characteristics is proposed, with the core part being the R-HBT network composed of transistors. The advantage of the NDR-based memristor emulator is the controllable threshold, where the state of the memristor can be changed by setting the control voltage, which makes the memristor circuit design more flexible. The operation frequency of the memristor emulator is about 250 kHz. The experimental results prove the feasibility and correctness of the threshold-controllable memristor emulator circuit.

1. Introduction

Memristors have received widespread attention in the world since HP Labs successfully manufactured TiO₂ memristors in 2008 [1,2]. A memristor is a non-linear resistor with memory characteristics, and its i-v characteristic curve is related to the frequency. Its proven good performance implies significant potential in the fields of chaotic circuits [3,4,5], non-volatile memory [6,7], digital logic [8,9], artificial neural networks [10,11,12], and non-linear circuits. In general, the research of memristors includes physical implementation [2,13,14], applications in electronic circuits [15,16], and memristor emulators [17,18,19,20,21,22,23,24,25,26].

The studies on memristor emulators have achieved many results, and a variety of different memristor emulator circuit structures have been proposed, which can be divided into two categories: grounded memristor emulator circuits [18,19] and floating memristor emulator circuits [20,21,22,23,24,25,26]. To design a grounded memristor emulator is easier than a floating memristor emulator. However, due to the fact that one terminal is grounded, the grounded memristor emulator has limited features in circuit designs and applications, and is not suitable for use as a two-terminal device in more complicated circuits [20]. Compared with grounded memristor emulators, the application of floating memristor emulators is more flexible, which can be realized by various active elements, such as second-generation current conveyor (CCII) [21], operational transconductance amplifier (OTA) [22], multi outputs OTA [23], current voltage differencing transconductance amplifier (VDTA) [24], and voltage differencing current conveyor (VDCC) [25] with accompanying passive elements and possibly analog multipliers (AD633) [26]. Although some commercial memristor chips are already available on the market, e.g., Knowm.com (accessed on 9 May 2019) [27], memristor emulators have yet to be widely studied and adopted due to their lower cost.

This article proposes a novel floating threshold-type memristor emulator devised based on the negative differential resistance (NDR) characteristic. Not only does the proposed memristor emulator have a high operating frequency, but it also possesses the controllable threshold voltage, an attribute that makes it more suited for digital logic circuit applications.

The rest of this paper is organized as follows: in Section 2, the NDR hysteresis unit is introduced and improved on the basis of the R-HBT-NDR unit, and its simulation and hardware experiments are carried out. Section 3 presents the circuit diagram of the threshold-controllable memristor based on NDR characteristics. Section 4 provides the specific circuit implementation and the detailed analysis of its operating principle. In Section 5, the simulation experimental results are presented. Section 6 summarizes the paper.

2. Improvement and Design of NDR Hysteresis Unit

Kwang-Jow Gan proposed an R-HBT-NDR unit [28,29,30] with negative resistance characteristics, as shown in Figure 1.

When a sinusoidal signal V_AB is applied to the R-HBT-NDR unit, its i-v characteristic curve has a certain hysteresis, as shown in Figure 2 [31].

With the increase in V_AB, transistor Q₂ turns on first, and then transistor Q₁; the current flowing through the R-HBT-NDR unit increases. When V_AB continues to increase, Q₁ reaches the saturated state, which triggers Q₂ to turn off. The current flowing through the R-HBT-NDR unit then decreases considerably from I_P to I_V, where negative resistance appears. With the further increase of V_AB, Q₂ remains off, while Q₁ enters into the deep saturation state, and the current flowing through the R-HBT-NDR unit increases slowly with the change of the input signal V_AB.

When V_AB starts to decrease, Q₁ enters the cut-off state; Q₂ turns on, and then the current flowing through the R-HBT-NDR unit will increase. As the input signal continues to decrease, Q₂ turns off to end.

Therefore, the movement path of the operation points differs with the increase and decrease of V_AB, resulting in a hysteresis loop.

Figure 2 only presents the forward part of the curve because of the feature of the NPN transistor. If an extra R-HBT-NDR unit is implemented in the circuit, which consists of PNP bipolar transistors, shown as Figure 3a, under the excitation of the sinusoidal signal, the bidirectional hysteresis curve can be obtained, as shown in Figure 3b.

It can be seen from Figure 3b that the characteristic curve of the bidirectional NDR hysteresis unit shows two hysteresis loops. Meanwhile, the curve has a slope of 0 near the origin, indicating that the change of V_AB will not affect the resistance, which can be attributed to the influence of the transistor turn-on voltage. Therefore, an improved NDR hysteresis unit is realized, as shown in Figure 4a, and its simplified symbol can be expressed as Figure 4b.

The improved NDR hysteresis unit differentiates its structure from Figure 3a in its two terminals of V₊ and V₋, which have the same voltage magnitude and opposite signs. With the change of V₊ and V₋, the bias voltage of each device in the NDR hysteresis unit will change accordingly, resulting in the different shape of the output curve, as shown in Figure 5.

In Figure 5a, V₊ = − V₋ = 2 V, it can be seen that when V_AB = −4.8 V or 4.6 V, the state of the hysteresis curve is changed. In Figure 5b, V₊ = − V₋ = 6 V, when V_AB = −5.4 V or 5.3 V, the state of the hysteresis curve is changed.

A hardware circuit of the improved NDR hysteresis unit is completed, as shown in Figure 6a. A resistor is connected in series as a load, and the current can be observed by measuring the voltage on the load resistor. Under the excitation of a sinusoidal signal with an amplitude of 6 V and a frequency of 5 kHz, V₊ = V₁ = 6 V, V₋ = V₂ = −6 V, R₁ = R₇ = 10 Ω, R₂ = 240 Ω, R₃ = R₅ = R₉ = R₁₁ = 2 kΩ, R₄ = R₁₀ = 8.8 kΩ, R₆ = R₁₂ = 50 Ω, R₈ = 280 Ω. The experimental results are coincident with the simulation results.

By analyzing the curve in Figure 6, it can be found that it is very similar to the i-v curve of the TEAM threshold memristor proposed in 2013 [32], shown in Figure 7.

The definition of the threshold type memristor can be expressed as follows [25]:

$$G=\left\{\begin{array}{l}{G}_{\mathrm{H}}\\ \mathrm{hold}\\ G_{\mathrm{L}}\end{array}\right.\begin{array}{c}\\ \\ \end{array}\begin{array}{c}{V}_{\mathrm{th}}{}_1<V_{\mathrm{X}}\\ V_{\mathrm{th}}{}_2\le V_{\mathrm{X}}\le V_{\mathrm{th}}{}_1\\ V_{\mathrm{X}}<V_{\mathrm{th}}{}_1\end{array}$$

(1)

G is the memductance of the threshold memristor, with G_H and G_L corresponding to the two resistance states of the memristor: low resistance (L_RS) and high resistance (H_RS), respectively. V_th1 and V_th2 represent the threshold voltages of the memristor. When the voltage V_X applied to the memristor is greater than V_th1, the memristor switches to G_H; when the voltage V_X is less than V_th2, the memristor is switched to G_L; if the voltage applied to the memristor is between V_th1 and V_th2, the state of the memristor remains unchanged.

The hysteresis characteristic curve of the improved NDR hysteresis unit is so similar to the threshold-type memristor that we can utilize this unit to design a novel NDR memristor emulator. This is where the inspiration of this paper originates.

3. Circuit Structure Analysis of Threshold-Controllable Memristor Based on NDR Unit

A diagram of the threshold-controllable memristor based on the NDR unit is shown in Figure 8, with an improved bidirectional NDR hysteresis module as the core. It also includes the memductance conversion module, multiplier module, and current transmission module.

The improved NDR hysteresis module U₁ realizes the hysteresis characteristics; the memductance conversion module U₂ realizes the non-volatile and high and low resistance conversion characteristics of the memristor; the multiplier module U₃ converts the current of the memristor into a proportional voltage; the current transmission module U₄ ensures the equal flow of the current at either end of the memristor.

V_ctr, represented by V₊ and V₋ in Figure 4, is the control voltage. According to the above analysis, by changing the voltage of V_ctr, the threshold of the memristor will also be changed to realize the change of the memristor resistance state. The symbol of the threshold-controllable memristor emulator can be expressed in a simplified form, as shown in Figure 9.

4. Circuit Design of Threshold-Controllable Memristor

The threshold-controllable memristor emulator circuit based on the improved NDR hysteresis unit is shown in Figure 10. The specific analysis of each module is as follows.

4.1. Improved NDR Hysteresis Module U₁

U₁ is the improved NDR hysteresis module. V_ctr is a threshold control terminal. When V_ctr changes, the change trajectories of output V_NDR are shown in Figure 11. The input voltage is a sinusoidal signal with an amplitude of 6 V and a frequency of 5 kHz.

A relationship is found between V_ctr and V_NDR: when V_ctr increases, V_NDR will increase accordingly, which can be expressed as:

$$V_{\mathrm{NDR}}=f(V_{\mathrm{ctr}})$$

(2)

4.2. Memductance Conversion Module U₂

U₂ is the memductance conversion module, composed of a four-channel operational amplifier TL084, a capacitor, and several resistors, which is used to achieve the non-volatile and high/low resistance characteristics of memristors. The output V_NDR of U₁ is the input signal of U₂.

Since the memristor has the non-volatile characteristic, its resistance must be related to the previous state. R_mc and C_mc form the integrator with the output V_nv of:

$$V_{\mathrm{nv}}=-\frac{1}{R_{\mathrm{mc}}{C}_{\mathrm{mc}}}{\displaystyle \int V_{\mathrm{NDR}}dt}=-\frac{1}{R_{\mathrm{mc}}{C}_{\mathrm{mc}}}{\displaystyle \int f(V_{\mathrm{ctr}})dt}$$

(3)

Figure 12 presents the characteristics of the bistable circuit that is composed of part B of TL084.

In Figure 12, when V_nv is greater than V_TH, the output is −V_CC; when V_nv is less than V_TL, the output is V_CC; when V_nv is between V_TL and V_TH, the state will not change. −V_CC and V_CC represent the power supply voltages of TL084. Therefore, the output voltage V_BC of the bistable circuit is expressed as follows:

$$V_{\mathrm{BC}}=\left\{\begin{array}{l}-V_{\mathrm{CC}}\\ \mathrm{hold}\\ V_{\mathrm{CC}}\end{array}\right.\begin{array}{c}\\ \\ \end{array}\begin{array}{c}{V}_{\mathrm{TH}}<V_{\mathrm{nv}}\\ V_{\mathrm{TL}}\le V_{\mathrm{nv}}\le V_{\mathrm{TH}}\\ V_{\mathrm{nv}}<V_{\mathrm{TL}}\end{array}$$

(4)

and the threshold voltages of V_TH and V_TL are expressed as follows:

$$V_{\mathrm{TH}}=-V_{\mathrm{TL}}=\frac{R_{\mathrm{A}}}{R_{\mathrm{B}}+R_{\mathrm{A}}}{V}_{\mathrm{CC}}$$

(5)

In addition, in order to achieve the single polarity for the output voltage of V_mc, a summing circuit is constructed, which consists of part C of TL084, V₃, R₁₄, R₁₅, R₁₆, R₁₇, and R₁₈. The corresponding output V_mc is expressed as follows:

$$\begin{array}{l}{V}_{\mathrm{mc}}=\left\{\begin{array}{l}-(b{V}_3-a{V}_{\mathrm{CC}})\\ \mathrm{hold}\\ -(a{V}_{\mathrm{CC}}+b{V}_3)\end{array}\right.\begin{array}{c}\\ \\ \end{array}\begin{array}{c}{V}_{\mathrm{TH}}<V_{\mathrm{nv}}\\ V_{\mathrm{TL}}\le V_{\mathrm{nv}}\le V_{\mathrm{TH}}\\ V_{\mathrm{nv}}<V_{\mathrm{TL}}\end{array}\\ \begin{array}{c}\\ \\ \end{array}\begin{array}{c}\\ \\ \end{array}\begin{array}{c}\\ \\ \end{array}\mathrm{ }=\left\{\begin{array}{l}-(b{V}_3-a{V}_{\mathrm{CC}})\begin{array}{cc}& \end{array}{V}_{\mathrm{TH}}<-\frac{1}{R_{\mathrm{mc}}{C}_{\mathrm{mc}}}{\displaystyle \int f(V_{\mathrm{ctr}})dt}\\ \mathrm{hold}\begin{array}{ccc}& & \begin{array}{cc}& \end{array}\end{array}{V}_{\mathrm{TL}}\le -\frac{1}{R_{\mathrm{mc}}{C}_{\mathrm{mc}}}{\displaystyle \int f(V_{\mathrm{ctr}})dt}\le V_{\mathrm{TH}}\\ -(a{V}_{\mathrm{CC}}+b{V}_3)\begin{array}{cc}& \end{array}-\frac{1}{R_{\mathrm{mc}}{C}_{\mathrm{mc}}}{\displaystyle \int f(V_{\mathrm{ctr}})dt}<V_{\mathrm{TL}}\end{array}\right.\end{array}$$

(6)

where a = R₁₆/R₁₄, b = R₁₆/R₁₅; compared to the definition of the threshold-type memristor in (1), (aV_CC + bV₃) can be seen as a voltage representation of the high-memductance state of memristor; (bV₃ − aV_CC) can be seen as a voltage representation of the low-memductance state of the memristor.

4.3. Multiplier Module U₃

U₃ is the multiplier module and it is composed of a multiplier AD633, which converts the current of the memristor into a proportional voltage. The output of U₃ can be expressed as follows:

$$V_{\mathrm{mul}}=\frac{R_{19}+R_{20}}{10R_{19}}{V}_{\mathrm{NDR}}{V}_{\mathrm{mc}}=\frac{R_{19}+R_{20}}{10R_{19}}f(V_{\mathrm{ctr}})V_{\mathrm{mc}}$$

(7)

where V_NDR is the output of U₁ and V_mc is the output of U₂. R₁₉ and R₂₀ adjust the multiplication coefficient.

4.4. Current Transmission Module U₄

U₄ is the current transmission module and composed of two AD844 operational amplifiers. This module converts the voltage V_mul into the corresponding current and ensures equal currents flowing through A and B terminals. The current through the memristor is expressed as follows:

$$i=\frac{V_{\mathrm{mul}}}{R_{\mathrm{AB}}}$$

(8)

and the current flowing through R_AB is i₁ = V_AB/R_AB; therefore, the memductance G can be represented by the voltage V_mc, as follows:

$$G=\frac{i}{V_{\mathrm{AB}}}=\frac{(R_{19}+R_{20})}{10R_{19}{i}_1{R}_{\mathrm{AB}}^2}{V}_{\mathrm{NDR}}{V}_{\mathrm{mc}}=\frac{(R_{19}+R_{20})}{10R_{19}{i}_1{R}_{\mathrm{AB}}^2}f(V_{\mathrm{ctr}})V_{\mathrm{mc}}$$

(9)

Assuming k_G = (R₁₉ + R₂₀)/(10R₁₉i₁$R_{\mathrm{A}\mathrm{B}}^2$) = (R₁₉ + R₂₀)/(10R₁₉i₁$R_{\mathrm{A}\mathrm{B}}^2$), G can also be expressed as:

$$G=\frac{i}{V_{\mathrm{AB}}}=k_{\mathrm{G}}{V}_{\mathrm{NDR}}{V}_{\mathrm{mc}}=k_{\mathrm{G}}f(V_{\mathrm{ctr}})V_{\mathrm{mc}}$$

(10)

Therefore, the mathematical emulator of the memristor emulator circuit can be expressed as follows:

$$\begin{array}{l}G=\left\{\begin{array}{l}-k_{\mathrm{G}} f(V_{\mathrm{ctr}})(a{V}_{\mathrm{CC}}+b{V}_3)\\ \mathrm{hold}\\ -k_{\mathrm{G}} f(V_{\mathrm{ctr}})(b{V}_3-a{V}_{\mathrm{CC}})\end{array}\right.\begin{array}{c}-R_{\mathrm{mc}}{C}_{\mathrm{mc}}{V}_{\mathrm{TL}}<V_{\mathrm{nv}}\\ -R_{\mathrm{mc}}{C}_{\mathrm{mc}}{V}_{\mathrm{TH}}\le V_{\mathrm{nv}}\le -R_{\mathrm{mc}}{C}_{\mathrm{mc}}{V}_{\mathrm{TL}}\\ V_{\mathrm{nv}}<-R_{\mathrm{mc}}{C}_{\mathrm{mc}}{V}_{\mathrm{TH}}\end{array}\\ \begin{array}{c}\\ \\ \end{array}\begin{array}{c}\\ \\ \end{array} =\left\{\begin{array}{l}-k_{\mathrm{G}} f(V_{\mathrm{ctr}})(a{V}_{\mathrm{CC}}+b{V}_3)\begin{array}{cc}& \end{array}-R_{\mathrm{mc}}{C}_{\mathrm{mc}}{V}_{\mathrm{TL}}<-\frac{1}{R_{\mathrm{mc}}{C}_{\mathrm{mc}}}{\displaystyle \int f(V_{\mathrm{ctr}})dt}\\ \mathrm{hold} \begin{array}{cc}& \begin{array}{cc}& \begin{array}{cc}& \end{array}\end{array}\end{array}-R_{\mathrm{mc}}{C}_{\mathrm{mc}}{V}_{\mathrm{TH}}\le -\frac{1}{R_{\mathrm{mc}}{C}_{\mathrm{mc}}}{\displaystyle \int f(V_{\mathrm{ctr}})dt}\le -R_{\mathrm{mc}}{C}_{\mathrm{mc}}{V}_{\mathrm{TL}}\\ -k_{\mathrm{G}} f(V_{\mathrm{ctr}})(b{V}_3-a{V}_{\mathrm{CC}})\begin{array}{cc}& \end{array}-\frac{1}{R_{\mathrm{mc}}{C}_{\mathrm{mc}}}{\displaystyle \int f(V_{\mathrm{ctr}})dt}<-R_{\mathrm{mc}}{C}_{\mathrm{mc}}{V}_{\mathrm{TH}}\end{array}\right.\end{array}$$

(11)

Compared with Equation (1), G in Equation (11) satisfies the definition of threshold memristors. In addition, when the value of V_ctr changes, G changes, with the threshold-controllable function thereby being achieved.

5. Verification of Threshold-Controllable Memristor

5.1. Simulation Results

The simulation results of the threshold-controllable memristor are shown in Figure 13: R₁ = R₇ = 19 Ω, R₂ = 7.5 Ω, R₃ = R₅ = R₉ = R₁₁ = 2 kΩ, R₄ = R₁₀ = 8 kΩ, R₆ = R₁₂ = 51 Ω, R₈ = 29 Ω, R₁₃ = 1 Ω, R₁₄ = 9.1 kΩ, R₁₅ = 1 kΩ, R₁₆ = 10 kΩ, R₁₇ = R₁₈ = 1 kΩ, R₁₉ = 10 kΩ, R₂₀ = 5.6 kΩ, R_mc = 10 kΩ, C_mc = 1 nF, R_A = 0.5 kΩ, R_B = 2.5 kΩ, R_AB = 100 kΩ. The excitation signal is a sinusoidal signal with a 5 V amplitude 30 kHz frequency.

When V_ctr = 6 V, the threshold voltage of the memristor is about ±2.9 V; when V_ctr = 2 V, the threshold voltage is −2.6 V and 2.7 V. Therefore, when V_ctr changes, the memristor threshold voltage changes accordingly. This feature can be applied to digital logic circuits design where the state of the memristor can switch to high or low in order for varied logic states by only changing V_ctr, and different functions will be achieved without modifying the circuit structure and input signals.

5.2. Experimental Results

The hardware circuit of the threshold-controllable memristor emulator based on NDR characteristics and its experimental results is shown in Figure 14.

Under the excitation of a sinusoidal signal with an amplitude of 6 V and a frequency of 72 kHz, when V_ctr = 2 V, its threshold voltages are −2 V and 2.1 V, as shown in Figure 14b. When V_ctr = 6 V, its threshold is about −2.2 V and 2.8 V, as in Figure 14c. If the frequency keeps increasing until 345 kHz, the hysteresis loop will be missing and the non-volatile characteristic disappears, as in Figure 14e.

6. Conclusions

A threshold-controllable memristor emulator based on NDR characteristics is proposed, which is composed of an improved NDR hysteresis unit, multipliers, and operational amplifiers. In addition to the basic characteristics of memristors such as being non-volatile and non-linear, this emulator circuit also has the advantage of threshold controllability and high operating frequency. Compared to the two-terminal structure of the traditional memristor, the threshold-controllable memristor emulator is more suitable for digital circuit design thanks to its additional control terminal structure, where the memristor threshold switches under different control voltages, indicating more flexible and convenient memristor-based circuit designs. Our follow-up effort will be committed to continuously optimizing the performance of the emulator, and the attempt to apply it to the design of memristive digital logic circuits.