Luenberger Disturbance Observer-Based Deadbeat Predictive Control for Interleaved Boost Converter

Abstract

A cascaded deadbeat predictive control strategy with online disturbance compensation is proposed for a three-phase interleaved boost converter in this paper. The topology of the three-phase interleaved converter is symmetric, so the inner loop controller is also designed symmetrically. For the purpose of realizing the error-free tracking of reference value, the deadbeat predictive control method is adopted for inner and outer loops with Luenberger observers, which are designed to estimate and compensate the disturbances of load variation in the power model as well as the unknown resistor of inductance in the current model. To eliminate the influence of a time delay, a two-step predictive control method is adopted in the predictive model. In the aspect of parameter design, the pole placement method is adopted to determine the gain of the observer. A series of simulations and experiments are carried out to test the proposed strategy under steady and dynamic conditions. It is shown that the proposed control strategy has faster dynamic response and stronger robustness against disturbance than the conventional model predictive control.

1. Introduction

Boost converters, relying on their energy conversion, regulation, and other functions, have been widely used in fuel cell vehicle power systems [1], photovoltaic cells [2,3], UPS, energy storage systems, etc. In recent years, since the rapid development of the above fields, the performance of boost converter is increasingly required to have better power density, dynamic response capability, stability, reliability and so on.

Because of the increasing demand for equipment capacity and power levels, the reliability of power devices in traditional DC–DC converters faces great challenges. When the input current ripple of the converter is large, the service life of the battery system will be affected. Meanwhile, in order to solve the problem of device stress when the converters are applied in high-power occasions, scholars have improved the topology by introducing interleaved [4], multi-level technology [5], etc. For high-power situations with a high current requirement, such as grid-connected inverters [6], power factor correction (PFC) [7,8], and voltage regulator modules [9], interleaved technology is currently the most popular solution. When boost converters are working under continuous current mode (CCM), there is a right half-plane zero (RHP zero) in the open-loop transfer function. This proves that the boost converter belongs to the non-minimum phase system, which therefore reduces the dynamic performance of the converter [10]. Current-mode control, a widely used method, contains faster response and a larger bandwidth compared with the conventional voltage-mode control [11]. Although the classical proportional-integral (PI) controller has been widely used in most control systems, the gain of the PI controller is difficult to determine. In addition, the fixed gain coefficient is not suitable for all operating conditions.

Since the 21st century, model predictive control (MPC), as a typical representative of the advanced process control algorithm, has achieved all-round development and rapidly extended its application field. MPC is famous for its simple principle, fast response speed, and its ability to deal with non-linear systems as well as multivariable constraints. It has been widely studied by scholars as a promising control strategy and used in the control of power electronics and electric drive in recent years [12,13]. However, the effectiveness of MPC is largely dependent on the accuracy of system modeling. Due to the various and unpredictable working conditions of the converter, both disturbances and uncertainties will result in adverse influences on the conventional MPC performance of the systems, such as waveform distortion and slower dynamic response, as well as poor system stability. In regard to boost converters, the most relevant elements are parameter mismatches, unknown changes of the load and input voltage, as well as the existence of equivalent series resistance (ESR) in the inductance [2,14]. In order to ensure that the converter can obtain the desired dynamic response and stability, a lot of research related to enhancing the anti-interference ability of the system has been proposed in the literature [15,16,17,18,19,20,21,22,23,24].

Observer adoption is one of the most direct and effective methods to estimate disturbance and compensate for it online in control systems [15,25]. In [16], the robust controller based on the extended state observer is compared with the conventional PI controller in the aspect of compensation. The study shows that the integral could act as an observer to compensate for the effect of disturbance as well as the proportional, which could strengthen the accuracy of tracking accuracy in steady state and accelerate the transient response. Overall, the robust controller has superior performance.

The finite control set MPC (FCS-MPC), is adopted in [17,18,19]. It is a four-order sliding mode observer based on an extended state model that was introduced in [18] to observe the output current and the input voltage. In [19], an observer-based modified model is used to replace the original model to overcome the model mismatches. However, the FCS-MPC is a variable frequency control, which increases the difficulty of the design of the filter.

The continuous control set MPC (CCS-MPC) strategy is adopted in [20,21,22,23,24]. In [21], it is indicated that the steady-state error of the boost converter still exists in spite of using a PI controller to correct the voltage in current sensorless predictive control. By analyzing the small-signal model with parasitic parameters, a self-correction differential current observer is introduced to eliminate the steady-state error. But the process of small signal analysis and the design of the compensation net are complicated. In [22], to improve the accuracy, a sensorless explicit MPC scheme is introduced by using an extended Kalman filter to estimate the noise of measurement. However, the heavy calculation burden results in the need for an offline process to tune the parameters. Furthermore, the PI controller is still required for the voltage-loop control to compensate for the effects of the parasitic parameters and the existence of integrator; this, therefore, reduces the dynamic response.

In this paper, the model predictive control strategy of three-phase interleaved boost converter (IBC) is studied. A cascaded deadbeat predictive control strategy based on online disturbance compensation is designed. The strategy adopts deadbeat predictive control in both inner and outer loops. Considering the symmetry of the topology, the inner loop controller can be designed symmetrically from a single phase. The load of the power model and the lumped disturbance of the current model are estimated in real time by a Luenberger disturbance observer. Then it is compensated to the prediction model online by designing a Luenberger disturbance observer (LDO). A two-step predictive control method is adopted in the predictive model to eliminate the effect of the time delay. For the configuration of the observer gain coefficient, the closed-loop pole distribution trajectory of the current observer was analyzed and the self-correcting gain under various working conditions was designed to accelerate the dynamic convergence rate of the observation error. The proposed method improves the robustness of the system and has faster dynamic response. Simulation and experimental results prove the effectiveness of the proposed strategy.

This article is organized as follows. In Section 2, a mathematical model of IBC is presented. In Section 3, the proposed control method is designed based on the Luenberger observer as well as a two-step predictive model with the analysis of parameters tuning. In Section 4, the simulation and experiment results of conventional method and proposed method are given and analyzed. Finally, Section 5 concludes this article.

2. Model of the Interleaved Boost Converter

The topology of the main circuit is shown in Figure 1 to increase the power level. The three-phase IBC has three identical boost converters in parallel, where $V_{in}$ stands for input source voltage, $V_o$ for output voltage, $R_o$ for equivalent load resistance and $C_f$ for output capacitor. Each branch is composed of a controllable switch $S_i(i=1,2,3)$, a diode $D_i(i=1,2,3)$ and an inductance $L_i(i=1,2,3)$ with ESR $R_{Li}(i=1,2,3)$.

Because the proposed scheme is based on the CCS-MPC method, both the continuous and discrete time models need to be built to present the dynamic of the systems. Assuming that the converter is operating under CCM. on the basis of the Kirchhoff’s Law and the state-space averaging method [26], continuous-time model is expressed as follows:

$$\left\{\begin{array}{c}\frac{d{i}_{Li}\left(t\right)}{dt}=\frac{V_{in}-i_{Li}\left(t\right)R_{Li}}{L_i}-\frac{V_o\left(t\right)}{L_i}\left[1-u_i\left(t\right)\right]\hfill \\ \frac{d{V}_o\left(t\right)}{dt}=\sum _{i=1}^3\frac{i_{Li}\left(t\right)}{C_f}[1-u_i\left(t\right)]-\frac{V_o\left(t\right)}{C_f{R}_o}\hfill \end{array}\right.(i=1,2,3),$$

(1)

where $u_i\left(t\right)$ is the input of the system which stands for the duty cycle of the switch $S_i(i=1,2,3)$ respectively, and $i_{Li}$ is the inductance current.

A four-order system model, which is comprised of the state vectors, is applied on the converter. The states variable is defined as $\mathit{x}\left(t\right)={\left[\begin{array}{cccc}{x}_1& x_2& x_3& x_4\end{array}\right]}^T={\left[\begin{array}{cccc}{i}_{LI}& i_{L2}& i_{L3}& V_o\end{array}\right]}^T$. Thus the discrete time model of the converter is presented as:

$$\left\{\begin{array}{c}\mathit{x}(k+1)=\mathit{A}\mathit{x}\left(k\right)+\mathit{B}\left[\mathit{x}\left(k\right)\right]\mathit{U}+\mathit{E}v\hfill \\ \mathit{y}\left(k\right)=\mathit{C}\mathit{x}\left(k\right)\hfill \end{array}\right.,$$

(2)

where $T_s$ is the sampling time, $v=V_{in}$, A = $\left[\begin{array}{cccc}1-\frac{T_s{R}_{L1}}{L_1}& 0& 0& -\frac{T_s}{L_1}\\ 0& 1-\frac{T_s{R}_{L2}}{L_2}& 0& -\frac{T_s}{L_2}\\ 0& 0& 1-\frac{T_s{R}_{L3}}{L_3}& -\frac{T_s}{L_3}\\ \frac{T_s}{C_f}& \frac{T_s}{C_f}& \frac{T_s}{C_f}& 1-\frac{T_s}{C_f{R}_o}\end{array}\right],$ E = $\left[\begin{array}{c}\frac{T_s}{L_1}\\ \frac{T_s}{L_2}\\ \frac{T_s}{L_3}\\ 0\end{array}\right],$ C = $\left[\begin{array}{cccc}1& 0& 0& 0\\ 0& 1& 0& 0\\ 0& 0& 1& 0\\ 0& 0& 0& 1\end{array}\right]$, B = $\left[\begin{array}{ccc}\frac{T_s}{L_1}{V}_o\left(k\right)& 0& 0\\ 0& \frac{T_s}{L_2}{V}_o\left(k\right)& 0\\ 0& 0& \frac{T_s}{L_3}{V}_o\left(k\right)\\ -\frac{T_s}{C_f}{i}_{L1}\left(k\right)& -\frac{T_s}{C_f}{i}_{L2}\left(k\right)& -\frac{T_s}{C_f}{i}_{L3}\left(k\right)\end{array}\right],$ and U = $\left[\begin{array}{c}{u}_1\left(k\right)\\ u_2\left(k\right)\\ u_3\left(k\right)\end{array}\right]$.

3. Controller Design

A cascaded deadbeat predictive control strategy with online disturbance compensation for IBC is designed in this section. Because the boost converter belongs to a non-minimum phase system, to control the output voltage in a one-step prediction, controlling the inductance current should be placed in the first place. The control block diagram of the proposed control strategy is presented in Figure 2.

For the conventional deadbeat predictive control method, the load resistance $R_o$ and the input source voltage $V_{in}$ are generally regarded as time-invariant and known, and the equivalent series resistance $R_{Li}(i=1,2,3)$ is neglected. However, in most application areas, the $R_o$ and $V_{in}$ always vary in an unknown manner and the existence of $R_{Li}(i=1,2,3)$ makes the modeling imprecise. As a result, it leads to model mismatches, a steady-state error of output voltage and the deterioration of robustness and dynamic performance. Therefore, LDOs are designed to solve the above problem respectively in this work.

3.1. Design of the Voltage Loop

3.1.1. Steady-State Inductance Current Reference

In the outer loop, it is supposed that the switching loss is ignored. Then the reference value of the inductance current was calculated based on the theory of power equilibrium, which is expressed as

$$v_{in}{i}_{in}=C_f\frac{d{V}_o}{dt}{V}_o\left(t\right)+\frac{V_o^2\left(t\right)}{R_o},$$

(3)

where the value on the left side of the equal sign represents the input power of the converter, the first term on the right side of the equal sign represents the power absorbed by capacitor storage, and the second term represents the power consumed on the load.

Equation (3) is discretized to obtain a discrete power state equation. By appointing the output voltage at $k+1$ equal to the reference output $V_o^{*}$, the input current reference $i_{in}^{*}$ of the converter is obtained:

$$i_{in}^{*}=\frac{C_f{V}_o\left(t\right)}{T_s{V}_{in}}[V_o^{*}-V_o\left(k\right)]+\frac{V_o^2\left(k\right)}{V_{in}{R}_o}.$$

(4)

The digital controlled current-sharing method is adopted. In order to ensure three-phase branch currents are equal, the reference current value $i_{Li}^{*}$ of each phase is defined as one-third of the reference value $i_{in}^{*}$ as follows:

$$i_{Li}^{*}=\frac{1}{3}{i}_{in}^{*}=\frac{C_f{V}_o\left(k\right)}{3T_s{V}_{in}}[V_o^{*}-V_o\left(k\right)]+\frac{V_o^2\left(k\right)}{3V_{in}{R}_o}(i=1,2,3).$$

(5)

3.1.2. Observation of the Load Resistance $R_o$

According to (5), the load resistance $R_o$ is needed when calculating the reference $i_{Li}^{*}$, so the observer is designed to observe the load without using the current sensor. As mentioned above, $V_o\left(t\right)$ is measurable whereas $R_o\left(t\right)$ is unmeasurable, and the model of the system (1) can be written as

$$\left\{\begin{array}{c}{V}_o(k+1)=(1-\frac{T_s}{R_o{C}_f})V_o\left(k\right)+\frac{T_s}{C_f}\frac{V_{in}}{V_o\left(k\right)}{i}_{in}\left(k\right)\hfill \\ R_o(k+1)=R_o\left(k\right).\hfill \end{array}\right.$$

(6)

Set output voltage $V_o$ and load resistance as state variables, and the discrete Luenberger observer can be designed in the following form:

$$\left\{\begin{array}{c}{\widehat{V}}_o(k+1)=(1-\frac{T_s}{{\widehat{R}}_o{C}_f}){\widehat{V}}_o\left(k\right)+\frac{T_s}{C_f}\frac{V_{in}}{{\widehat{V}}_o\left(k\right)}{i}_{in}\left(k\right)+L_2[V_o\left(k\right)-{\widehat{V}}_o\left(k\right)]\hfill \\ {\widehat{R}}_o(k+1)={\widehat{R}}_o\left(k\right)+L_1[V_o\left(k\right)-{\widehat{V}}_o\left(k\right)],\hfill \end{array}\right.$$

(7)

where $L_1$ and $L_2$ stands for the observer gain.

3.2. Design of the Current Loop

3.2.1. Design of the MPC

Assuming that the input voltage $V_{in}$ and output voltage $V_o$ are kept unchanged during a sampling period, the inductance current is changing in a linear fashion. Based on Equation (1) and the forward Euler method, the inductance current $i_{Li}^p(k+1)(i=1,2,3)$ at $k+1$ step, which is deduced from time k, is calculated as follows:

$$i_{Li}^p(k+1)=(1-\frac{T_s{R}_{Li}}{L_i})i_{Li}\left(k\right)-\frac{T_s}{L_i}\left[1-u_i\left(k\right)\right]V_o\left(k\right)+\frac{T_s}{L_i}{V}_{in}\left(k\right)(i=1,2,3).$$

(8)

Based on the predictive model, the proposed dead-beat control is designed. The cost function can be designed as [27,28]:

$$g=\sum _{i=1}^3{\left[i_{Li}^{*}-i_{Li}^p(k+1)\right]}^2(i=1,2,3).$$

(9)

From (9), the optimal $i_{Li}^p(k+1)$ can be obtained by solving $\frac{\partial g}{\partial u_1\left(k\right)}=0$, $\frac{\partial g}{\partial u_2\left(k\right)}=0$ and $\frac{\partial g}{\partial u_3\left(k\right)}=0$ to minimize g based on the deadbeat predictive control theory. The duty cycle is calculated as

$$u_i\left(k\right)=1+\frac{L}{V_o\left(k\right)T_s}[i_{Li}^{*}-i_{Li}\left(k\right)]+\frac{R_{Li}{i}_{Li}\left(k\right)-V_{in}\left(k\right)}{V_o\left(k\right)}(i=1,2,3).$$

(10)

3.2.2. Observation of the Lumped Disturbance $D_i(i=1,2,3)$

According to (1), the lumped disturbance term can be expressed as

$$D_i\left(t\right)=\frac{V_{in}-i_{Li}\left(t\right)R_{Li}}{L_i}(i=1,2,3).$$

(11)

In this paper, the state variables $i_{Li}\left(t\right)(i=1,2,3)$ are measurable, whereas $D_i\left(t\right)(i=1,2,3)$ is unknown. Assuming the value of $D_i\left(t\right)$ and $V_o\left(t\right)$ are constant in one sampling period, the equation of state can be written as

$$\left\{\begin{array}{c}{\mathit{X}}_{di}(k+1)={\mathit{A}}_d{\mathit{X}}_{di}\left(k\right)+{\mathit{B}}_{di}{u}_i\left(k\right)+{\mathit{E}}_{di}{v}_d\hfill \\ {\mathit{Y}}_{di}(k+1)={\mathit{C}}_d{\mathit{X}}_{di}(k+1),\hfill \end{array}\right.$$

(12)

where ${\mathit{X}}_{di}\left(k\right)={\left[\begin{array}{cc}{i}_{Li}& D_i\end{array}\right]}^T$, ${\mathit{C}}_d=\left[\begin{array}{cc}1& 0\end{array}\right]$, ${\mathit{A}}_d=\left[\begin{array}{cc}1& T_s\\ 0& 1\end{array}\right]$, ${\mathit{E}}_{di}={\left[\begin{array}{cc}-\frac{T_s}{L_i}& 0\end{array}\right]}^T$, ${\mathit{B}}_{di}={\left[\begin{array}{cc}\frac{T_s{V}_o\left(k\right)}{L_i}& 0\end{array}\right]}^T$ and $v_d=V_o$. So the LDO is described as follows:

$$\left\{\begin{array}{c}{\widehat{\mathit{X}}}_{di}(k+1)={\mathit{A}}_d{\widehat{\mathit{X}}}_{di}\left(k\right)+{\mathit{B}}_{di}{u}_i\left(k\right)+{\mathit{E}}_{di}{v}_d+\mathit{H}[{\mathit{Y}}_{di}\left(k\right)-{\widehat{\mathit{Y}}}_{di}\left(k\right)]\hfill \\ {\widehat{\mathit{Y}}}_{di}(k+1)={\mathit{C}}_d{\widehat{\mathit{X}}}_{di}(k+1),\hfill \end{array}\right.$$

(13)

where $H={\left[\begin{array}{cc}{h}_1& h_2\end{array}\right]}^T$ is a designed $2\times 1$ dimension constant matrix.

According to (12) and (13), the error of the state variable and the observed value at time $k+1$ is defined as

$${\tilde{\mathit{X}}}_{di}(k+1)={\mathit{X}}_{di}(k+1)-{\widehat{\mathit{X}}}_{di}(k+1)=({\mathit{A}}_d-{\mathit{HC}}_d)[{\mathit{X}}_{di}\left(k\right)-{\widehat{\mathit{X}}}_{di}\left(k\right)].$$

(14)

3.3. Time Delay

The system has inertial elements such as inductance and low-pass filters, as well as the sampling and modulation processes. These will result in an inherent delay for two cycles. When the duty cycle D acted on the system at $k-1$, the corresponding current was sampled at k by ADC module. Then the duty cycle D at k only can be output by CPS-PWM at $k+1$. If the time delay problem is not considered when designing the controller, the control performance of the system may deteriorate, such as the increase of the ripple. In order to avoid the inherent delay, this affects the accurate prediction of voltage and current. In this paper, a two-step prediction is used to compensate the inherent delay, and the time-sequence between the system state variable $x\left(t\right)$ and the input $u\left(t\right)$ after the time-delay compensation is shown in Figure 3.

The following delay compensator is designed to improve the predictive model:

$$\left\{\begin{array}{c}\mathit{x}(k+1)=\mathbf{A}\mathit{x}\left(k\right)+\mathbf{B}\left[\mathit{x}\left(k\right)\right]\mathbf{U}\left(k\right)+\mathbf{E}v\hfill \\ \mathit{x}(k+2)=\mathbf{A}\mathit{x}(k+1)+\mathbf{B}\left[\mathit{x}(k+1)\right]\mathbf{U}(k+1)+\mathbf{E}v\hfill \end{array}\right.,$$

(15)

where $x\left(k\right),x(k+1),x(k+2)$ stand for the system state variables at $k,k+1,k+2$ respectively, and the cost function (9) is rewritten as follows:

$$J={[i_{L1}^{*}-i_{L1}^p(k+2)]}^2+{[i_{L2}^{*}-i_{L2}^p(k+2)]}^2+{[i_{L3}^{*}-i_{L3}^p(k+2)]}^2.$$

(16)

3.4. Observer Stability Analysis and Parameters Tuning

In the above sections, a cascade deadbeat predictive control strategy based on an on-line compensation of disturbance is proposed. The observer gain coefficient is usually designed as a fixed value, which only needs to satisfy that the matrix $({\mathbf{A}}_d-{\mathbf{HC}}_d)$ is a Hurwitz matrix to ensure the stability of the observer. The fixed value is given according to engineering practice. It relies heavily on experience and cannot be compatible with all working conditions. An optimal design of the observer gain coefficient of the inner loop is given in this section so that it can update the value of the parameters according to the real-time feedback data.

According to Equation (14), the characteristic equation can be written as follows:

$$D\left(z\right)=\left|z\mathbf{I}-({\mathbf{A}}_d-{\mathbf{HC}}_d)\right|=p_2{z}^2+p_{1}z+p_0,$$

(17)

where $p_2=1$, $p_1=h_1-2$, $p_0=1-h_1+h_2{T}_s$.

According to Jury stability criterion in the discrete domain, the roots of the characteristic equation must be located in the unit circle to ensure asymptotic stability of the observer. Therefore, the following requirements must be satisfied:

$$\left\{\begin{array}{c}D\left(1\right)>0\hfill \\ {(-1)}^{n}D(-1)>0\hfill \\ \left|p_0\right|<p_n\hfill \end{array}\right.,$$

(18)

where $n=2$ according to (17).

On the basis of (18), a feasible range of the gain coefficient $h_1$ and $h_2$ is calculated as

$$\left\{\begin{array}{c}{h}_2{T}_s<h_1<2+\frac{h_2{T}_s}{2}\hfill \\ 0<h_1<\frac{4}{T_s}\hfill \end{array}\right.$$

(19)

The gain coefficients can be further adjusted by plotting and analyzing the trajectories of the closed-loop pole distributions. As shown in Figure 4, there are 4 groups in total, and the values of $h_1$ are $0.2$, $0.3$, $0.4$, $0.5$ respectively, and $h_2$ increases from 100 to 1000 with 100 as the step length.

When $h_1$ is fixed and $h_2$ increases, the poles move away from the real axis at first. This means that the dynamic response of the system slows down, the damping coefficient decreases, and the overshoot increases. When $h_2$ continues to increase until the poles become conjugate poles, that is, moving away from the real axis to both sides, the dynamic response continues to slow down. Then oscillations occurred as the poles gradually approach the boundary of the unit circle.

When $h_2$ is fixed as a small value and $h_1$ increases, the poles first move to the negative direction of the real axis, the dynamic response of the system becomes faster, the damping coefficient increases, and the overshoot decreases. When $h_2$ is large and $h_1$ increases, the poles move to both sides of the real axis, and the dynamic response slows down.

When the dynamic response is fast, the system is more sensitive to noise and has weaker robustness. When the dynamic response is slow, the settling time is long, which makes it difficult to meet the reference rapidly. Therefore, a parameter setting method that can be adjusted adaptively is proposed to make the observer have a higher convergence speed and ensure the self-tuning under multiple conditions. Considering the dynamic response and robustness of the system comprehensively, the coefficient can be defined as

$$\left\{\begin{array}{c}{h}_1=\frac{{\gamma }_1}{{ϵ}_1+{\rho }_1^{-\left|e\right|}}\hfill \\ h_2=\frac{{\gamma }_2}{{ϵ}_2+\frac{{\rho }_2^{-\left|e\right|}}{1+\left|e\right|}}\hfill \end{array}\right.,$$

(20)

where $e=x\left(t\right)-\widehat{x}\left(t\right)$ is the observation error, ${\gamma }_1>0$, ${ϵ}_1>0$, ${\gamma }_2>0$, ${ϵ}_2>0$.

In (20), when $e\to \infty$, then $h_1\to \frac{{\gamma }_1}{{ϵ}_1}$, $h_2\to \frac{{\gamma }_2}{{ϵ}_2}$; when $e\to 0$, then $h_1\to \frac{{\gamma }_1}{1+{ϵ}_1}$, $h_2\to \frac{{\gamma }_2}{1+{ϵ}_2}$. Therefore, it can ensure that the gain coefficient of the converter is bounded in the whole dynamic process. By choosing the appropriate ${\gamma }_1$, ${\rho }_1$, ${ϵ}_1$, ${\gamma }_2$, ${\rho }_2$, ${ϵ}_2$, the change rate and amplitude of the gain coefficient can be dynamically adjusted, which can improve the convergence speed and guarantee the anti-disturbance ability.

3.5. Modulation Method and Analyses of the Input Current Ripple

The Carrier phase shifting PWM (CPS-PWM) method is used in this paper as shown in Figure 5. Considering the structure of IBC, the interleaving technique has the application in power supply modules connected in parallel, then the modules are paralleled in topology and staggered in time [4]. By interleaving each branch in turn with a phase difference of $2\pi /3$, the frequency $f_s$ of $\Delta i_L$ (the current ripple in $i_L$) can be 3 times the frequency $f_i(i=1,2,3)$ of $\Delta i_{Li}$ (the current ripple in $i_{Li}$). Therefore, for a fixed $f_s$, the switch frequency $f_i(i=1,2,3)$ of each branch is reduced by $2f_s/3$, which greatly reduces the loss of each switch and the size of filter. Meanwhile, by dividing the overall power into three paralleled modules, the inductance current and the current ripple of each branch can be reduced correspondingly.

Normalized ripple amplitude of the traditional boost converter and the IBC is calculated in this section. It is noted that the inductance ESR is neglected under the following analysis.

(1) Traditional boost converter:

Inductance current changing meets the volt-second principle [29] when the converter works under a steady state. This means that the incremental of inductance current is 0 in a switching period, which is described as follows:

$$\left\{\begin{array}{c}\Delta i_{L+}=\Delta i_{L-}\hfill \\ \Delta i_{L+}=\frac{V_{in}}{L}D{T}_s\hfill \\ \Delta i_{L-}=\frac{V_o-V_{in}}{L}(1-D)T_s\hfill \end{array}\right.,$$

(21)

where $T_s$ is the switching period and D is duty cycle.

The ripple amplitude of the traditional boost converter is obtained as

$$\Delta i_L=\frac{V_o}{L{f}_s}D\left(1-D\right).$$

(22)

(2) Multi-phase IBC:

For multiphase IBCs, the more modules were paralleled, the smaller the input current ripple will be. The ripple amplitude of IBC is expressed by the following formula [4]:

$$\Delta i_L{|}_n=\frac{V_o}{L{f}_s}\sum _{i=1}^n[(2i-1)D-n{D}^2-\frac{1}{n}i(i-1)]D\in [\frac{i-1}{n},\frac{i}{n}],$$

(23)

where n stands for the number of paralleling modules.

According to (22) and (23), the waveform of the relationship between input ripple amplitude and the duty cycle D with n-phase interleaved modules is plotted in Figure 6. By comparing the amplitude of the ripple in Figure 6, it is seen that when $n>3$, the input current ripple only decreases slightly compared with that at $n=3$. It raises the cost and difficulty of current-sharing because of the increase of interleaved modules. Therefore, to balance the ripple reduction ability and cost, a three-phase IBC is adopted in this paper, which has a better ripple reduction effect in the duty cycle range from 0.2 to 0.8.

4. Simulation and Experiment Results

The simulations and experiments are carried out in this section. To evaluate the correctness and effectiveness of the proposed control strategy, simulations and experiments are implemented for LDO-MPC and PI-MPC under several operating conditions. The corresponding main circuit parameters are listed in

Table 1. Nominal Simulation Parameter of the Circuit.

Descriptions	Symbol	Values
Output voltage	$V_o$	400 V
Input voltage	$V_{in}$	200 V
Inductance	$L_1,L_2,L_3$	1 mH
Inductance resistor	$R_{L1},R_{L2},R_{L3}$	$0.3\Omega$
Load resistor	$R_o$	$10\Omega$
Input capacitor	$C_{in}$	$2000\mathsf{\mu }$F
Output capacitor	$C_f$	$4000\mathsf{\mu }$F
Switching frequency	$f_s$	10 kHz

.

4.1. Simulation Results

4.1.1. Step Changes in the Output Voltage Reference

Figure 7 presents the simulation results when the reference value $V_o^{*}$ varies as 400 V-440 V-400 V-360 V-400 V. Both the traditional PI-MPC and the LDO-MPC methods are able to track the changes of the reference value without voltage overshoot and steady-state error. LDO-MPC presents a faster recovery time (5 ms) compared with PI-MPC (13.5 ms). From the zoom-in figure of the inductance current waveforms, it is visible that the three-phase inductance current is balanced and the phase difference between each signals is 120${}^{\circ }$.

4.1.2. Load Disturbance Performance

The converter works with dynamic step load resistance from full load ($20\Omega$) to half load ($40\Omega$) at 0.3 s and from half load to full load at 0.4 s. As shown in the first channel of Figure 8, compared with PI-MPC, LDO-MPC presents faster recovery time and lower overshoot of a voltage of 1.78 V, whereas PI-MPC is 2.52 V. From the second channel of Figure 8, the observed value ${\widehat{R}}_o$ tracks the actual changes value $R_o$ accurately and quickly.

4.1.3. Parameter Sensitivity Evaluation

In this simulation, only the control effect of inner-loop is compared. The current reference value from the outer loop is calculated by converter’s power balance expression. The steady-state error resulted from the inductance mismatch in the inner-loop is contrasted between the conventional MPC and the LDO-MPC. Figure 9 shows the steady-state performance when the inductance parameter decreased and increased to $1/3$ and $300\%$ of nominal value. According to the simulation waveforms, the conventional MPC method cannot track the reference output voltage accurately because of the inner-loop tracking error. By contrast, the LDO-MPC method is able to track more accurately.

4.1.4. Step Changes in the Input Voltage

The performance comparison of conventional PI-MPC and LDO-MPC is shown in Figure 10 when the input voltage varies as 200 V-180 V-200 V-220 V and the ESR exists in series with the inductance.

From the results of output voltage shown in Figure 10a,b, when the converter operating under the condition of step changes in input voltage, both the conventional PI-MPC and the observer-based MPC methods are able to reach the steady-state and track the reference output voltage. Furthermore, it is visible that the LDO-MPC method proposed in this work has a faster recovery time.

On the other hand, from the inductance current waveforms shown in Figure 10a,b, the method of conventional PI-MPC cannot track the reference value. It indicates that the reference current, given by the PI controller in the outer loop, needs to be raised to compensate the steady-state error between the output current and the reference value, which comes from the parameter mismatch in inner loop. As a result, the output voltage is able to track the reference. It is proved that the observer can estimate the lumped disturbance accurately synchronously.

4.2. Experiment Results

The experiment platform of the three-phase IBC is shown in Figure 11. The system takes DSP and FPGA as the core and CPLD as the auxiliary processing. The EA-ELR 9750-66 programmable electronic load is adopted as a load resistor, and the EA-PS 9750-60 as the DC power supply. The total power of the converter is 8 kW. The experimental waveform is captured by oscilloscope (Tektronix TBS2000 series).

Both proposed and traditional methods are compared in DSP TMS320F28377D. All methods can be executed in one sampling period of 6000 Ticks (33.33 kHz, i.e., T = 30 us). The execution time of PI-MPC is 551 Ticks (the outer loop PI takes 188 Ticks and the inner loop MPC takes 363 Ticks), whereas that of LDO-MPC is 1288 Ticks (the outer loop MPC takes 169 Ticks, the inner loop MPC takes 258 Ticks, and the observers take 821 Ticks). Although the LDO-MPC algorithm takes longer than the traditional method, the calculation time only accounts for about 1/5 of the whole sampling cycle. It does not affect the overall control effect of the algorithm.

4.2.1. Steady State

Figure 12 and Figure 13 show the waveforms of the IBC working at steady state, the input voltage $V_{in}=200$ V, the output voltage $V_o=400$ V, the switching frequency $f_s=10$ kHz, and the load resistance is $R_o=20\Omega$. Figure 12a shows the output voltage and the inductance current of each phase controlled by LDO-MPC. It can be seen that the inductance current can accurately track the current reference. Figure 12b shows the output voltage and inductance current waveform controlled by traditional PI-MPC. In steady state, the two control methods can realize the no-error tracking of voltage and achieve ideal current-sharing effect.

Figure 13 shows the waveform of the input current and inductance current of each phase. The average value of input current ${\overline{i}}_{in}=42.6$ A, the ripple of input current $\Delta i_{in}=4.4$ A, the average value of inductance current ${\overline{i}}_{Li}=14.12$ A, and the ripple is $\Delta i_{Li}=12$ A, which is consistent with the analysis in Figure 6 and Equation (23). The inductance current ripple frequency of each phase $f_s=10$ kHz, and the input current ripple frequency $f=30$ kHz.

4.2.2. Step Changes in the Output Voltage Reference

This section presents the comparison experiments of PI-MPC and LDO-MPC with step output voltage reference value. Figure 14 shows the experimental waveform. Figure 14a,b shows traditional PI-MPC experiments. Figure 14c,d shows the proposed LDO-MPC experiments. When the reference value $V_o^{*}$ raises from 400 V to 440 V, the settling time of PI-MPC needs 42 ms, whereas LDO-MPC needs just $25.2$ ms. When $V_o^{*}$ decreases from 400 V to 360 V, it takes $25.6$ ms for PI-MPC to settle whereas the LDO-MPC takes 14 ms. The experiment results show that both methods can track the reference when step changes appear on the reference voltage. In terms of dynamic recovery time, the proposed algorithm shows better transient performance and has no voltage overshoot.

4.2.3. Load Disturbance Performance

In this section, the load disturbance performances of PI-MPC and LDO-MPC are evaluated and compared in Figure 15. Figure 15a,b is the traditional PI-MPC control, and Figure 15c,d is the proposed control method. The left figure shows a step from full load ($20\Omega$) to half load ($40\Omega$), and the right figure shows a step from half load to full load. The waveform shows that both methods have robustness against load disturbance. The difference lies in the dynamic process of these two methods. When the load step from half load to full load, the PI-MPC control takes 50.4 ms, whereas LDO-MPC control only takes 21.6 ms to track the reference. In addition, the voltage sag of PI-MPC ($18.6$ V) is relatively larger than that of LDO-MPC ($12.76$ V). It can be verified that LDO-MPC control is more robust to load disturbance.

4.2.4. Step Changes in the Input Voltage

Input voltage disturbance performances of LDO-MPC and PI-MPC are compared in Figure 16. Figure 16a,b is the traditional PI-MPC control, Figure 16c,d is the proposed control method. The left and right figures show the input voltage rising by 25% and falling by 25%, respectively. The input voltage drops or rises by 50 V, the traditional output voltage of PI-MPC has a corresponding voltage jump first, 0.95 V and 0.8 V respectively, and then returns to steady state (400 V) after a period of recovery time. The LDO-MPC control can keep the voltage stable at 400 V. This shows that the proposed method has better control effect against input voltage disturbance.

4.2.5. Inductance Parameter Mismatch

Figure 17 compares the tracking effect of conventional MPC and LDO-MPC methods with inductance mismatch in inner-loop control. The given current reference value for the two methods are the same. When the inductance parameter is mismatched to 1/3 of the nominal value, two kinds of control methods are able to operate steadily. However, as the traditional MPC control strategy shown in Figure 17a, the static errors, which are caused by the influence of the inductance parameters in the inner loop, occur both in the output voltage and inductance current of the system. As shown in Figure 17b, the proposed control method has a better tracking effect on current in the case of inductance mismatches. This indicates that the inner loop observer can estimate the disturbance accurately and achieve no-error tracking, which is the same as the simulation results.

5. Conclusions

In this paper, the mathematical model of an interleaved boost converter is analyzed, and a cascaded deadbeat predictive control strategy with online disturbance compensation is proposed. The strategy realizes no steady-state error of voltage and current tracking with disturbance compensation, which estimated the load of power model and the lumped disturbance of current model in real time. The tuning of observer gain coefficient is optimized based on the pole placement method. At the same time, it overcomes the overshoot problem and has faster adjustment speed when the system is disturbed, which improves the anti-disturbance ability of the traditional method.