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Article

Modeling and Performance Assessment of the Split-Pi Used as a Storage Converter in All the Possible DC Microgrid Scenarios. Part I: Theoretical Analysis

by
Massimiliano Luna
1,
Antonino Sferlazza
2,*,
Angelo Accetta
1,
Maria Carmela Di Piazza
1,
Giuseppe La Tona
1 and
Marcello Pucci
1
1
Istituto di Ingegneria del Mare (INM), Consiglio Nazionale delle Ricerche (CNR), Via Ugo La Malfa 153, 90146 Palermo, Italy
2
Dipartimento di Ingegneria (DI), Università degli Studi di Palermo, Viale delle Scienze ed.10, 90128 Palermo, Italy
*
Author to whom correspondence should be addressed.
Submission received: 12 July 2021 / Revised: 3 August 2021 / Accepted: 7 August 2021 / Published: 11 August 2021

Abstract

:
The integration of an electrical storage system (ESS) into a DC microgrid using a bidirectional DC/DC converter provides substantial benefits but requires careful design. Among such converter topologies, the Split-pi converter presents several merits at the cost of non-isolated operation. However, the few works in the literature on the Split-pi presented only closed-loop control with a single control loop; furthermore, they neglected the reactive components’ parasitic resistances and did not perform any experimental validation. This work aimed at investigating the use of the Split-pi converter as a power interface between an ESS and a DC microgrid. Five typical microgrid scenarios are presented, where each of which requires a specific state-space model and a suitable control scheme for the converter to obtain high performance. In this study, two different state-space models of the converter that consider the parasitic elements are presented, the control schemes are discussed, and criteria for designing the controllers are also given. Several simulations, as well as experimental tests on a prototype realized in the lab, were performed to validate the study. Both the simulation and experimental results will be presented in part II of this work. The proposed approach has general validity and can also be followed when other bidirectional DC/DC converter topologies are employed to interface an ESS with a DC microgrid.

Graphical Abstract

1. Introduction

Over the last few years, DC distribution in terrestrial and marine power systems has attracted a growing interest in view of the implementation of the smart microgrid paradigm due to its advantages in terms of simpler and more efficient electrical architectures. Consequently, power electronic converters that interface distributed generation units, loads, and above all, electrical storage systems (ESSs) with a common DC bus are the subject of renewed interest [1,2,3]. ESSs have manifold beneficial impacts on DC microgrids: they allow for improving stability and resiliency, compensate for the intermittency of renewable generation, provide ramping support to generators, and act as backup power sources. Furthermore, ESSs ensure a power buffer that can be leveraged to apply suitable energy management strategies to microgrids. In particular, energy management systems (EMSs) can be used to compute the optimal values of power flows among the microgrid devices, which allow for pursuing chosen objectives, such as a minimum electricity bill, maximum efficiency, minimum fuel consumption, or minimum greenhouse gas emissions [1,4,5,6].
Depending on the designer’s choice, the microgrid voltage can be controlled either stiffly using a single voltage generator or in a droop scheme using one or more voltage generators with a predefined power-sharing ratio, usually in proportion to their power rating (grid-forming generators). When an EMS is used, the other active devices of the microgrid must be controlled as current generators based on the optimal power flows that are computed by the EMS [1,5]. Therefore, depending on the specific configuration, the converter interfacing the ESS with the microgrid must be operated as a stiff voltage generator, a non-stiff voltage generator, or a current generator.
The scientific literature provides several contributions on bidirectional DC/DC converters (BDCs). Reference [7] presented an overview of BDCs, where, besides the review of both non-isolated and isolated configurations, the most relevant control schemes and switching strategies were analyzed. In some applications, galvanic isolation between the input and output side of the converter is required; in such cases, the most frequent choice is the dual active bridge converter (DAB) due to its many advantages [7,8,9]. However, isolation is mandatory only when very high voltage gain is needed. Non-isolated converters are thus more attractive when the goal is to improve the efficiency, size, weight, and cost of the system [7,10]. A review of non-isolated BDCs topologies was presented in [10]. The advantages and disadvantages of the considered converters were properly highlighted. For example, some converters provide an output voltage with opposite polarity than the input, some draw discontinuous current from the battery, while others require a tapped inductor or exhibit weak regulation capability or a high switch count. Overall, Tytelmaier et al. identified the half-bridge converter (HBC) and the related interleaving variants with coupled inductors as the most promising solutions from the efficiency and robustness standpoints [10]. Furthermore, Odo compared three non-isolated BDC topologies with the classical HBC in terms of their suitability for energy storage in a DC microgrid and identified the cascaded buck-boost HBC topology as the best compromise [11].
An interesting alternative is offered by the Split-pi converter, which is a non-isolated BDC that is based on two cascaded HBCs with a common bulk capacitor instead of a common inductor. As such, it is the dual topology of the cascaded buck-boost HBC that was analyzed in [7,10,11]. The Split-pi was initially developed for electric vehicles and patented in 2004 [12], and it is receiving increasing attention due to its distinct advantages [13,14,15,16,17,18,19,20]. It exhibits high efficiency, like the DAB, but with a reduced switch count (eight vs. four switches, of which, only two are actively commutated). Furthermore, LC filters at both ports of the Split-pi allow for small reactive components and reduce the switching noise. On the other hand, the additional phase delay introduced by such filters can slightly complicate this converter’s control with respect to simpler converters [17,18]. Nonetheless, the control of the Split-pi is less complicated than that of the DAB because it requires conventional duty cycle control of the pulse width modulator (PWM) instead of phase shift control. An additional advantage of the Split-pi is its suitability for multiphase systems, where a significant reduction in component size and cost can be attained. These features make it attractive when high power density is required, such as in hybrid electric vehicles, renewable energy systems, and aerospace/marine/military applications [16,17].
Only three papers in the technical literature proposed applications in which the Split-pi converter was not controlled using an open-loop [16,17,19]. The aim of [17] was to study a system in which the Split-pi interfaced a flywheel with a 12 V, 120 W DC bus connecting a photovoltaic generator with a passive load. However, in the related control scheme, only one control loop was active at a time (either for the output voltage or the input current) using a shared controller, and the choice was made using a rule-based approach. Singhai et al. did not focus on a specific application and presented a state-space model of the Split-pi converter and a transfer function to design a closed-loop controller for its output voltage [16]. However, they considered the converter connected to a passive load and neglected the parasitic resistances. Finally, Monteiro et al. considered a Split-pi converter with a multilevel structure and controlled current or voltage in any of the two ports in an open-loop, whereas the common DC-link voltage was controlled in a closed-loop [19]. Only a few details about the control systems were given because the study mainly focused on comparing the multilevel Split-pi topology and the interleaved topology of [20].
Apart from [17], all these works only presented simulation results without experimental validation. Furthermore, they all studied closed-loop control with a single control loop, neglecting the reactive components’ parasitic resistances. However, when the converter is used to interface an ESS with an active load, such as a DC microgrid, it is essential to control both the ESS current and the output voltage/current of the converter, as required by the microgrid designer. Furthermore, the parasitic elements cannot be neglected because they affect the losses and the maximum gain attainable using the converter.
To cover these aspects, in this work, the use of the Split-pi converter in such an application was investigated with particular attention to its model, the design of its control system, and the assessment of the expected performance in all the possible microgrid configurations. In this first part of the work, it was shown that the Split-pi must be modeled in two different ways depending on the microgrid scenario and that control schemes involving a different number of control loops are needed. In the case of the output voltage control, a feed-forward action was also required to obtain high performance. Furthermore, it was shown that conventional PI regulators alone were not sufficient to obtain the desired performance for output current control in stiff microgrids. The two state-space models considering the parasitic elements and the transfer functions of interest were given in the study, together with criteria to design the controllers. The chosen case study was a DC microgrid that was representative of both terrestrial and marine applications. In Part II of the work, a comprehensive performance assessment is presented based on simulations and experimental tests that validate the study. Finally, the proposed approach has general validity and can also be followed when other BDC topologies are used to interface a storage system with a DC microgrid.

2. Topology, Operation Modes, and Sizing of the Split-Pi Converter

The schematic of a symmetrical Split-pi converter is sketched in Figure 1, including its reactive components’ parasitic resistances. Such a converter can be viewed as the cascaded connection of a first HBC at port 1, a bulk capacitor, and another HBC at port 2. Since the two HBCs are bidirectional, the whole Split-pi converter is also a BDC. If the two HBCs have equal reactive components, the Split-pi is said to be symmetrical.
The four switches (S1–S4) were sketched in Figure 1 as ideal switches. In the original formulation of [12], they were implemented using MOSFETs to exploit the advantage of synchronous rectification. According to [12], the Split-pi has four operation modes, depending on the relationship between V1 and V2 and on the power direction, as summarized in the first four rows of Table 1, which is an extension of the table reported in [18]. In this work, the Split-pi converter was used to interface a storage system (connected to port 1) with a DC microgrid (connected to port 2). It is worth noting that, whenever possible, the storage system is chosen so that V1V2 for both technical and safety reasons. Hence, the present work considered the Split-pi converter operating in modes 1 and 2.
The Split-pi components can be sized according to the classical formulas used for buck and boost converters [17,21]. Specifically, the minimum inductance value is expressed by (1) for both boost and buck operations; on the other hand, the minimum capacitance of the input and output capacitors Ce can be computed using (2), which is valid for a buck converter, whereas the minimum value of the bulk capacitance C is expressed by (3), which is valid for a boost converter:
L m i n = 100   V 2 ( 1 d ) d 2 F s w r i % I 1 ,
C e ,   m i n = 100 ( 1 d ) 8 F s w 2 r v e % L ,
C m i n = 100   I 2 d F s w r v % V 2 .
In (1), (2), and (3), Fsw is the switching frequency; d is the duty cycle; V2 and I2 are the output voltage and current, respectively; I1 is the input current; ri% is the desired inductor current ripple; and rv% and rve% are the desired voltage ripple values on the bulk and external capacitors, respectively.

3. Possible DC Microgrid Scenarios, Load Models, and Required Control Schemes for the ESS Converter

In the present study, it was supposed that the Split-pi converter was used to interface an ESS with a DC microgrid. Under this hypothesis, several scenarios could be considered depending on the control mode chosen for both the storage-side converter and the grid-side converters interfacing other microgrid generators, if any. Depending on the combinations of the control modes of such converters, five scenarios were identified and, for each of them, a different type of load model and control scheme must be used. The different DC microgrid scenarios and the required load models and control schemes are discussed in the following subsections.

3.1. Possible DC Microgrid Scenarios

In general terms, one of the following situations can occur as a control mode for the microgrid converters:
  • All the generator converters are controlled in droop mode to regulate the microgrid voltage with a predefined power-sharing ratio. Thus, each generator behaves as an ideal voltage generator with a series-connected resistance. The droop scheme leads to a simple but very reliable microgrid and does not require a communication infrastructure. If a storage system is present, its droop characteristic is usually chosen so that no current is supplied at half the rated load of the microgrid, whereas charging/discharging occurs for load power below/above such a value. If there is only one active device in the microgrid (either a storage system or a generator), it could also be controlled with a null droop resistance (stiff microgrid) so that the microgrid voltage does not vary with load power
  • The microgrid follows a master–slave architecture: some converters for generators or storage systems (i.e., the masters) are controlled in droop mode (a null droop resistance is possible only with a single master); the others (i.e., the slaves) behave as current generators and are managed by an EMS to pursue one or more predefined goals.
Therefore, three control modes are possible for both the storage-side and grid-side converters: stiff droop control, non-stiff droop control, and current control. The five scenarios resulting from the combinations of the control modes of such converters are described in the first three columns of Table 2. For the sake of clarity, such scenarios are referred to also by means of an abbreviation in the form Sx-Gy, where x and y specify the control mode for the storage-side and the grid-side converters, respectively. The range of options for x is:
  • C for current control.
  • D for non-stiff droop control.
  • S for stiff droop control.
As for the options for y:
  • N if no grid-side generator is present or if none of the grid-side generators are operated with droop control.
  • D if at least one generator is droop controlled but not in a stiff way.
  • S if there is one generator operated with stiff droop control; in such a case, the other grid-side generators, if present, must be current controlled by the EMS.

3.2. Possible Load Models for the ESS Converter

The dynamic behavior of the storage converter is affected by the load that it must supply, which depends not only on the passive loads of the DC microgrid but also on the possible presence of grid-side generators. In the most general case, the load for the ESS converter can be modeled following these steps: (1) aggregating all the droop-controlled generators of the microgrid using Thevenin’s theorem, obtaining parameters Ed and Rd; (2) combining all the current-controlled generators managed by the EMS to compute the overall current I; (3) including an aggregated passive load Rload. The resulting circuit model is shown in Figure 2a. However, it is convenient to reduce such a model to a suitable equivalent form comprising only one generator. Toward this aim, it is necessary to distinguish between the five scenarios. In scenarios #3 (SD-GD) and #4 (SC-GD), using Norton’s theorem, the couple Ed, Rd can be substituted with an equivalent current generator Ed/Rd and a parallel-connected resistance Rd. Then, the load can be reduced to that of Figure 2b with the following assumptions: Ieq = I + Ed/Rd and R = Rload//Rd, where // denotes the parallel connection of circuit elements. In scenarios #1 (SS-GN) and #2 (SD-GN), the same scheme of Figure 2b can be used assuming Ieq = I and R = Rload. Furthermore, in scenario #5 (SC-GS), the converter’s output voltage is set equal to Ed because Rd = 0. Since both Rload and I are now parallel connected to an ideal voltage generator, they do not influence the converter’s dynamics. Thus, the load can be modeled as shown in Figure 2c.
In the following, the state-space model of the storage converter connected to the load of Figure 2b is denoted as model A, whereas model B refers to the converter connected to the load of Figure 2c. The derivation of such models is given in Section 4. The relationship between the possible DC microgrid scenarios and the storage converter and load models is described in the first five columns of Table 2. It is worth noting that the value of the equivalent load resistance R considered in scenarios #3 (SD-GD) and #4 (SC-GD) is much lower than that of scenarios #1 (SS-GN) and #2 (SD-GN) because it results from the parallel connection of Rload and Rd. Finally, the last column of Table 2 reports the required control scheme for the ESS converter in each microgrid scenario according to the considerations given in the following section.

3.3. Required Control Schemes for the ESS Converter

In general, the closed-loop control scheme for the storage converter depends on the microgrid scenario. However, regardless of the scenario, an important goal is to control the current IL1 of the leftmost inductor to ensure that it is compatible with the storage system’s current state. Thus, in the related control loop, its reference value should be dynamically saturated to avoid overcharging or overdischarging the storage system.
In the first three scenarios, i.e., SS-GN, SD-GN, and SD-GD, besides the current loop for IL1, a voltage loop is needed to regulate the output voltage V2 at the nominal voltage V2n. A suitable controller is required in each control loop. Typically, PI or PID regulators with an anti-windup action are used, which must be designed to obtain a stable system with the desired dynamics. In scenarios #2 (SD-GN) and #3 (SD-GD), a third loop is also required to implement the droop characteristic of the storage converter by computing the voltage reference V2ref based on the output current I2 according to the equation V2,ref = EdsRds·I2, where Eds and Rds are the parameters of the droop characteristic of such a converter. The control scheme used in scenarios #1 (SS-GN), #2 (SD-GN), and #3 (SD-GD) is depicted in Figure 3. In particular, the external loop is opened in scenario #1 (SS-GN) because Rd = 0. The presence of the current generator Ieq in parallel to the load resistance is considered a disturbance that affects the system’s output, which will be suitably compensated for by the control system, regardless of the related transfer function. As will be shown in Section 6, when the output voltage V2 is controlled, a feed-forward (FF) action is also required in addition to the voltage loop to suitably reduce the overshoot. Since Ieq cannot be measured, the output current I2 is chosen as the FF action input.
On the other hand, the converter is current-controlled in scenarios #4 (SC-GD) and #5 (SC-GS). In these cases, besides the inner loop for IL1, another current loop is needed to regulate the output current I2 based on a reference I2ref that is computed by the EMS. The related control scheme is shown in Figure 4. Again, the external voltage or current generator is considered a disturbance, and the related transfer function is irrelevant.
The type of control scheme to be used in each microgrid scenario and the required number of control loops are reported in the last column of Table 2. It is worth noting that suitable saturators are required in the controllers of each loop (Gci1, Gcv2, Gci2). Specifically, the output of the controller Gci1 (i.e., the duty cycle d) is bounded by the interval [0; 0.9] to avoid overcurrents due to prolonged transients with d = 1. On the other hand, the reference value for IL1 (i.e., the output of Gcv plus the FF term or the output of Gci2) is bounded by the interval [−Icx; Idx], where Icx and Idx are the maximum charging/discharging currents of the storage system. Finally, the upper or lower bound of such an interval is dynamically replaced with zero if the battery SOC reaches 100% or goes below the minimum allowed SOC, respectively.

4. State-Space Models of the Split-Pi Converter

The two state-space models of a Split-pi converter that interfaces a storage system with a non-stiff (scenarios #1~#4) or stiff (scenario #5) microgrid and operates with V1V2 are presented in the following. They consider the parasitic elements and were determined according to the state-space averaging technique [22].

4.1. State-Space Model A: Split-Pi Converter Connected to a Non-Stiff Microgrid

The state-space model of a Split-pi converter connected to a non-stiff microgrid and operating with V1V2 can be expressed in matrix form as follows:
{ x ˙ = A x + B u y = C x + D u
x = [ I L 1 ,   I L 2 ,   V c ,   V e ]
u = [ V 1 , I e q ]
y = [ I L 1 , V 2 , I 2 ]
{ A = d A o n + ( 1 d ) A o f f B = d B o n + ( 1 d ) B o f f C = d A o n + ( 1 d ) C o f f D = d D o n + ( 1 d ) D o f f
A o n = [ R L L 0 0 0 0 R t o t L 1 L R L R s u m 0 1 C 0 0 0 R R s u m C e 0 1 R s u m C e ]
A o f f = [ R L + R c L R c L 1 L 0 R c L R t o t L 1 L R L R s u m 1 C 1 C 0 0 0 R R s u m C e 0 1 R s u m C e ]
B o n = B o f f = [ 1 L 0 0 R p L 0 0 0 R R s u m C e ]
C o n = C o f f = [ 1 0 0 0 0 R p 0 R R s u m 0 R e R s u m 0 1 R s u m ]
D o n = D o f f = [ 0 0 0 R p 0 R R s u m ]
where Rp = R//Re, Rsum = R + Re, and Rtot = Rp + RL + Rc.
Since B o n = B o f f and D o n = D o f f , the small-signal behavior of the converter does not depend on the input values. According to the method described in [21], the model can be linearized around a chosen operating point corresponding to the duty cycle d ¯ and the state x ¯ = [ I L 10 ,   I L 20 ,   V c 0 ,   V e 0 ] , obtaining the following transfer functions:
G p 1 ( s ) = I ˜ L 1 d ˜ = n 3 s 3 + n 2 s 2 + n 1 s + n 0 d 4 s 4 + d 3 s 3 + d 2 s 2 + d 1 s + d 0
G p 2 ( s ) = I ˜ 2 I ˜ L 1 = R k I L 10 L 2 C C e R s u m · ( 1 + s R c C ) ( 1 + s R e C e ) ( 1 s L R k ) n 3 s 3 + n 2 s 2 + n 1 s + n 0
whose coefficients ni, di, and Rk are given in Appendix A. Gp1(s) and Gp2(s) are small-signal transfer functions that express the effect of perturbations of a variable on another one (both denoted with a tilde). According to Figure 3, Gp1(s) expresses the relationship between d and IL1, whereas Gp2(s) describes the dependence of I2 on IL1. Clearly, the relationship between IL1 and V2 is expressed by Gp2(s)R.

4.2. State-Space Model B: Split-Pi Converter Connected to a Stiff Microgrid

In the case of a Split-pi converter operating with V1 ≤ V2 and connected to a stiff microgrid, (4) and (8) are still valid, but (5), (6), (7),(9), (10) and (11), (12), (13) are replaced by (16), (17), (18), (19), (20) and (21), (22), (23), respectively.
x = [ I L 1 ,   I L 2 ,   V c ,   V e ]
  u = [ V 1 , E d ]
y = [ I L 1 , I 2 ]
A o n = [ R L L 0 0 0 0 R c + R L L 1 L 0 0 1 C 0 0 0 0 0 1 R e C e ]
    A o f f = [ R c + R L L R c L 1 L 0 R c L R c + R L L 1 L 0 1 C 1 C 0 0 0 0 0 1 R e C e ]
B o n = B o f f = [ 1 L 0 0 1 L 0 0 0 1 R e C e ]
C o n = C o f f = [ 1 0 0 0 0 1 0 1 R e ]
D o n = D o f f = [ 0 0 0 1 R e ]
Again, the small-signal behavior does not depend on input values. The model can be linearized around a chosen operating point corresponding to d ¯ and x ¯ , obtaining the transfer functions (24) and (25), whose coefficients ni, di, and Rk are given in Appendix B. According to Figure 4, Gp1(s) expresses the relationship between d and IL1, whereas Gp2(s) describes the dependence of I2 on IL1. It is worth noting that a zero-pole cancellation occurs due to the stiff voltage imposed on the ReCe branch at port 2; thus, the resulting system’s order is three instead of four and the voltage and current on Ce cannot be controlled.
G p 1 ( s ) = I ˜ L 1 d ˜ = n 2 s 2 + n 1 s + n 0 d 3 s 3 + d 2 s 2 + d 1 s + d 0
G p 2 ( s ) = I ˜ 2 I ˜ L 1 = R k I L 10 L 2 C · ( 1 + s R c C ) ( 1 s L R k ) n 2 s 2 + n 1 s + n 0

5. Case Study and Converter Sizing

In this section, the chosen case study is described and the droop characteristics of both the storage converter and the voltage generator of the microgrid are discussed. Then, the Split-pi converter’s reactive components are sized based on the chosen case study’s parameters.
With no loss of generality, the proposed investigation was performed by referring to a 48 V, 750 W storage system that was interfaced with a 180 V DC microgrid using a Split-pi converter. The chosen case study can represent the onboard grid of an unmanned marine vehicle or a scaled prototype of a residential DC microgrid with a 120 V, 60 Hz, single-phase, grid-connected inverter, whose DC link voltage must be higher than 170 V DC. The rated values of the system under study are shown in Table 3.
As for the chosen droop characteristic of the storage converter, in scenario #1 (SS-GN) it was defined by Eds = 180 V and Rds = 0, whereas in scenarios #2 (SD-GN) and #3 (SD-GD), it was expressed by Eds = 180 V and Rds = 2.2 Ω, i.e., imposing a 5% voltage reduction at the nominal current. For the equivalent droop-controlled microgrid generator, the same parameters as those of the storage converter were chosen in scenario #4 (SC-GD). On the other hand, in scenario #3 (SD-GD), the following parameters were used for the droop-controlled microgrid generator: Ed = 198 V and Rd = 9 Ω; with this choice, the storage system did not supply any power for half the rated load of the microgrid, as desired. Finally, a constant voltage generator Ed = 180 V was considered in scenario #5 (SC-GS) to model the microgrid’s stiff voltage generator.
The Split-pi’s reactive components were sized using (1), (2), (3), and the following parameters were set: ri% = ±6.0%, rve% = ±0.2%, rv% = ±0.2%. Consequently, the following minimum inductor and capacitor ratings were obtained: Lmin = 803 µH, Ce,min = 113 µF, Cmin = 419 µF. Aiming to build a converter prototype and due to component availability, slightly higher values were chosen for the reactive components; they are reported in Table 4, together with their parasitic resistances.

6. Control System Design

The control system of the Split-pi converter must be designed by considering the specific microgrid scenario in which it will be used. However, in any case, it must be assumed that the converter supplies its rated power without any contribution from the external current or voltage generators, which are seen as disturbances. If the imposed stability margins are sufficiently wide, the designed controllers will be effective also at lighter loads, i.e., with higher values of R. Thus, models A and B must be linearized around the operating point corresponding to the rated values of the duty cycle and state variables: d ¯ = 0.722 and x ¯ = [ I L 10 , I L 20 , V c 0 , V e 0 ] = [ 15 ,   4.167 ,   180 ,   180 ] . No other condition is needed for model B in scenario #5 (SC-GS). As for model A, instead, it is R = Rn in scenarios #1 (SS-GN) and #2 (SD-GN) and R = Rn//Rd in scenarios #3 (SD-GD) and #4 (SC-GD).
All the above values must be substituted into (A1)–(A6), given in Appendix A, to obtain the coefficients of the transfer functions of interest. Then, designing of the controllers Gci1, Gcv2, and Gci2 can be performed with classic techniques that involve imposing suitable values of the crossover frequency ω c and phase margin m φ and ensuring a suitable gain margin mg [23]. For each control loop and scenario, the imposed values and the obtained PI coefficients and gain margins are summarized in Table 5 and Table 6. Furthermore, a baseline scenario employing the control scheme of Figure 3 with Rd = 0 and without the FF action was also considered for comparison purposes to show the usefulness of such an action.
It is worth noting that the design of the controllers must be very conservative. By design, the currents IL1 and IL2 have a significant switching ripple compared to the input/output currents and voltages. Thus, the desired crossover frequency for the IL1 loop must be suitably lower than Fsw to avoid the switching ripple being processed by the controller. The crossover frequency of the loop for V2 or I2 must be even lower for proper decoupling with respect to the inner loop. When the converter supplies a passive load (Rload), some ringing can be tolerated, and the usually adopted phase margin (50–60°) is satisfactory. Instead, in the case of an active microgrid, the combined variations of I and Rload could determine a significant excursion from the nominal operating point and pronounced under/overshoots; thus, a higher phase margin (i.e., m φ   > 80°) is required to ensure stability under all the operating conditions. As for the gain margin, the usually adopted criterion (i.e., mg > 12 dB) is enough to ensure robustness against parameter variations.
As for the chosen case study, some noteworthy remarks can be made:
  • Regardless of the value of R, models A and B exhibited nearly the same dynamics for IL1; therefore, the corresponding PI regulators Gci1 had similar coefficients. On the other hand, the dynamics of I2 were quite dissimilar and required different Gci2 controllers.
  • In the case of model B, it could be possible to achieve the desired ω c and m φ with a PI or I regulator alone, but the gain margin would be around 6.6 dB due to a resonance peak; thus, the second-order transfer function (26) must be included after the PI regulator to attenuate such a peak and achieve a gain margin of 13.6 dB.
  • The dynamics of I2 were very sensitive to the value of R in model A; thus, an unstable system was obtained in scenario #4 (SC-GD) if the controllers were designed assuming R = Rn instead of R = Rn//Rd.
  • Without the FF action, the dynamics of V2 were sensitive to the value of R: a significantly slower behavior was obtained if the controllers were designed assuming R = Rn in scenario #3 (SD-GD) instead of R = Rn//Rd; on the other hand, a significant ringing was obtained if the controllers were designed considering R = Rn//Rd in scenarios #1 (SS-GN) and #2 (SD-GN) instead of R = Rn.
  • Using the FF action, the dynamics of V2 were pretty insensitive to the value of R; thus, almost no variation was obtained in scenarios #1 (SS-GN), #2 (SD-GN), and #3 (SD-GD) if the controllers were designed when considering either R = Rn//Rd or R = Rn.
Several simulations were performed to assess the performance of the controlled system in all the scenarios. Then, a prototype of the Split-pi converter was built, and experimental tests were performed in several conditions that covered the baseline scenario and all the other five scenarios, obtaining successful results. The simulation and experimental results validating the study are presented in part II of this work.
G a d d ( s ) = 1 ( 1 + s 533 ) ( 1 + s 606 )

7. Conclusions

The Split-pi converter is a suitable choice to interface electrical storage systems with DC microgrids. It offers distinct advantages, such as high efficiency, reduced switch count and switching noise, and suitability for multiphase systems at the cost of non-isolated operation. However, to obtain high performance, its control system must be suitably designed according to the specific microgrid scenario in which it will be used.
In this study, five typical microgrid scenarios were identified and analyzed, where each of which required a specific state-space model and a suitable control scheme for the converter. Two different state-space models were presented for the Split-pi converter operating with the storage-side voltage being lower than the grid-side voltage. Both models considered the parasitic elements of the reactive components. As for the control scheme, the number of required control loops depended on the scenario. It was shown that feed-forward action is needed to obtain a high performance in the case of voltage control and that, sometimes, conventional PI regulators alone were not sufficient for stable current control. The most relevant transfer functions of the Split-pi converter were given, together with criteria to design the controllers. Several simulations, as well as experimental tests on a prototype realized in the lab, were performed to validate the study, whose results will be presented in part II of this work.
The approach followed in this study has general validity and can also be followed to devise the state-space model of a Split-pi operating with a storage-side voltage that is higher than the grid-side voltage or when other bidirectional DC/DC converter topologies are employed to interface an ESS with a DC microgrid. Furthermore, the presented study builds the premises for designing unconventional control systems for the Split-pi that are suitable for operating in more than one microgrid scenario.

Author Contributions

Conceptualization, M.L., A.S., M.P. and M.C.D.P.; methodology, M.L., A.S. and A.A.; software, M.L., A.S., A.A. and G.L.T.; validation, M.L., A.A., M.C.D.P. and M.P.; writing—original draft preparation, M.L., A.S. and M.P.; writing—review and editing, M.L., A.A., M.C.D.P. and G.L.T.; supervision, M.P. and M.L.; funding acquisition, M.P. and M.L. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the Italian Ministry of University and Research (MUR), program PON R&I 2014/2020—Avviso n. 1735 del 13/07/2017—PNR 2015/2020, project “NAUSICA—NAvi efficienti tramite l’Utilizzo di Soluzioni tecnologiche Innovative e low CArbon,” CUP: B45F21000680005.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

Nomenclature

dDuty cycle
d ¯ Average duty cycle for state-space model linearization
diCoefficients of the denominator of the transfer function Gp1(s)
m φ Phase margin
mgGain margin
niCoefficients of the numerator of the transfer function Gp1(s) and the denominator of Gp2(s)
ri%Current ripple in input/output inductor L
rv%Voltage ripple in the bulk capacitor C
rve%Voltage ripple in the external capacitor Ce
uInput vector of the state-space model of the Split-pi converter
xState vector of the state-space model of the Split-pi converter
x ¯ Average state vector for state-space model linearization
yOutput vector of the state-space model of the Split-pi converter
ω c Crossover frequency
A,B,C,DMatrices of the state-space model of the Split-pi converter
CBulk capacitor of the Split-pi converter
CeExternal input/output capacitor of the Split-pi converter
Ce,minMinimum capacitance value to obtain the chosen ripple rve%
CminMinimum capacitance value to obtain the chosen ripple rv%
EdEquivalent no-load voltage of the aggregated droop-controlled generators of the microgrid in scenario #5 after load transformation
EdsNo-load voltage used to control the storage converter in droop mode
FswSwitching frequency
Gadd(s)Additional transfer function to be included after the PI regulator of current loop for I2 in the case of stiff microgrid
Gci1(s)Transfer function of the controller for the internal current loop for IL1
Gci2(s)Transfer function of the controller for the external current loop for I2
Gcv2(s)Transfer function of the controller for the voltage loop for V2
Gp1(s)Transfer function of the process that expresses the relationship between d and IL1
Gp2(s)Transfer function of the process that expresses the relationship between IL1 and I2
ICurrent supplied by the aggregated current generators of the microgrid managed by the EMS
I1Input current of the Split-pi converter (port 1, storage-side)
I1nNominal input current (storage-side)
I2Output current of the Split-pi converter (port 2, grid-side)
I2nNominal output current (grid-side)
I2refReference current computed using the EMS for the storage converter controlled in current mode
IdCurrent supplied by the aggregated droop-controlled generators of the microgrid
IcxMaximum charging current of the storage system
IdxMaximum discharging current of the storage system
IeqEquivalent current generator considered as active load in scenarios #1–#4 after load transformation
IL1Current of the leftmost inductor of the Split-pi converter (port 1, storage-side)
IL10Average current value of the leftmost inductor for model linearization
IL2Current of the rightmost inductor of the Split-pi converter (port 2, grid-side)
IL20Average current value of the rightmost inductor for model linearization
KiiIntegral gain of the PI regulator of current loop for IL1
Kii2Integral gain of the PI regulator of current loop for I2
KivIntegral gain of the PI regulator of voltage loop for V2
KpiProportional gain of the PI regulator of current loop for IL1
Kpi2Proportional gain of the PI regulator of current loop for I2
KpvProportional gain of the PI regulator of voltage loop for V2
LInductor at input/output ports of the Split-pi converter
LminMinimum inductance value to obtain the chosen ripple ri%
PnNominal power of the storage converter
REquivalent load resistance considered in scenarios #1–#4 after load transformation
RcParasitic resistance of bulk capacitor of the Split-pi converter
RdEquivalent droop resistance of the aggregated droop-controlled generators of the microgrid
RdsDroop resistance used to control the storage converter in droop mode
ReParasitic resistance of external input/output capacitor of the Split-pi converter
RLParasitic resistance of inductor at input/output ports of the Split-pi converter
RloadEquivalent load resistance of the microgrid
RkFictitious resistance term appearing in the transfer function Gp2(s)
RnNominal load resistance
SOCState of charge of the storage system
V1Input voltage of the Split-pi converter (port 1, storage-side)
V1nNominal input voltage (storage-side)
V2Output voltage of the Split-pi converter (port 2, grid-side)
V2nNominal output voltage (grid-side)
V2refReference output (microgrid) voltage for the storage converter controlled in droop mode
VcVoltage of the bulk capacitor of the Split-pi converter
Vc0Average voltage value of the bulk capacitor for model linearization
VeVoltage of the external input/output capacitor of the Split-pi converter
Ve0Average voltage value of the external capacitors for model linearization

Appendix A. Coefficients of the Transfer Functions of Model A

The coefficients of the transfer functions (14) and (15) of state-space model A are expressed using the following equations:
{ n 3 = V c 0   +   R c ( I L 10     I L 20 ) L n 2 = ( 1     d ¯ ) I L 10 ( L     C R c 2 )   +   n 3 L C ( R p   +   R L   +   R c   +   L C e R s u m ) L 2 C n 1 = ( 1     d ¯ ) I L 10 ( R p   +   R L R c   +   R c L R c     R c C C e R s u m )   +   n 3 L ( C R 2 C e R s u m 2   +   C R t o t C e R s u m   +   1 ) L 2 C n 0 = ( 1     d ¯ ) I L 10 ( R   +   R L     R c )   +   n 3 L L 2 C · 1 C e R s u m
{ d 4 = 1 d 3 =   R p   +   2 R L   +   ( 2     d ¯ ) R c L   +   1 C e R s u m d 2 = R   +   2 R L   +   ( 2     d ¯ ) R c L · 1 C e R s u m   +             R L 2   +   R L R p   +   R c ( ( 2     d ¯ ) R L   +   d ¯ ( 1 d ¯ ) R c   +   ( 1     d ¯ ) R p ) L 2   +   1   +   ( 1     d ¯ ) 2 L C d 1 = ( 2     d ¯ ) R L   +   d ¯ ( 1     d ¯ ) ( R c     R L R p )   +   ( 1 d ¯ ) R p L 2 C   +             ( R L 2   +   R L R   +   R c ( ( 2     d ¯ ) R L   +   d ¯ ( 1     d ¯ ) R c   +   ( 1     d ¯ ) R ) L 2   +   1   +   ( 1     d ¯ ) 2 L C ) · 1 C e R s u m d 0 = ( 2     d ¯ ) R L   +   d ¯ ( 1     d ¯ ) ( R c     R L     R )   +   ( 1     d ¯ ) R L 2 C · 1 C e R s u m
R k = ( 1 d ¯ ) ( V c 0 I L 20 R c ) I L 10 R L

Appendix B. Coefficients of the Transfer Functions of Model B

The coefficients of the transfer functions (24) and (25) of state-space model B are expressed using the following equations:
{ n 2 = V c 0   +   R c ( I L 10     I L 20 ) L n 1 = ( 1     d ¯ ) I L 10 ( L     C R c 2 )   +   n 2 L C ( R L   +   R c ) L 2 C n 0 = ( 1     d ¯ ) I L 10 ( R L     R c )   +   n 2 L L 2 C
{ d 3 = 1 d 2 = 2 R L   +   ( 2     d ¯ ) R c L d 1 = R L 2   +   R c ( ( 2     d ¯ ) R L   +   d ¯ ( 1     d ¯ ) R c ) L 2   +   1   +   ( 1 d ¯ ) 2 L C d 0 = ( 2     d ¯ ) R L   +   d ¯ ( 1     d ¯ ) ( R c     R L ) L 2 C
R k = ( 1     d ¯ ) ( V c 0     I L 20 R c ) I L 10     R L

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Figure 1. Schematic of the symmetrical Split-pi converter.
Figure 1. Schematic of the symmetrical Split-pi converter.
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Figure 2. Equivalent active load transformations for non-stiff and stiff microgrids: (a) general load model for storage converter; (b) equivalent load model considered in scenarios #1–#4; (c) equivalent load model considered in scenario #5.
Figure 2. Equivalent active load transformations for non-stiff and stiff microgrids: (a) general load model for storage converter; (b) equivalent load model considered in scenarios #1–#4; (c) equivalent load model considered in scenario #5.
Energies 14 04902 g002
Figure 3. Control scheme that is used for the voltage control of the ESS converter in scenarios #1 (SS-GN), #2 (SD-GN), and #3 (SD-GD).
Figure 3. Control scheme that is used for the voltage control of the ESS converter in scenarios #1 (SS-GN), #2 (SD-GN), and #3 (SD-GD).
Energies 14 04902 g003
Figure 4. Control scheme that is used for the current control of the ESS converter in scenarios #4 (SC-GD) and #5 (SC-GS).
Figure 4. Control scheme that is used for the current control of the ESS converter in scenarios #4 (SC-GD) and #5 (SC-GS).
Energies 14 04902 g004
Table 1. Summary of the operating modes of the Split-pi converter.
Table 1. Summary of the operating modes of the Split-pi converter.
ModeV1V2Power
Direction
Split-Pi
Operation
Duty Cycle of S1Duty Cycle of S2Duty Cycle of S3Duty Cycle of S4Gain of the Split-Pi
in Direction 1 → 2
1Yes1 → 2Boost for 1 → 2d1 − d01 1 1 d
2Yes2 → 1Buck for 2 → 1d1 − d01 1 1 d
3No1 → 2Buck for 1 → 2011 − dd d
4No2 → 1Boost for 2 → 1011 − dd d
Table 2. Possible combinations of microgrid scenarios, converter and load models, and control schemes for the Split-pi.
Table 2. Possible combinations of microgrid scenarios, converter and load models, and control schemes for the Split-pi.
Microgrid ScenarioStorage
Converter
Other GeneratorsState-Space Model of the Split-PiLoad for the State-Space Model of the Split-PiControl Scheme
#1
(SS-GN)
Droop mode with Rd = 0 (stiff microgrid)No other generator present (passive load) or all current controlled by the EMSModel AR and Ieq,
as in Figure 2b
2 loops + FF, as in Figure 3 with Rds = 0
#2
(SD-GN)
Droop mode with
Rd ≠ 0
No other generator present (passive load) or all current controlled by the EMSModel AR and Ieq,
as in Figure 2b
3 loops + FF, as in Figure 3
#3
(SD-GD)
Droop mode with
Rd ≠ 0
At least one is droop controlled and none has Rd = 0Model AR (low) and Ieq,
as in Figure 2b
3 loops + FF, as in Figure 3
#4
(SC-GD)
Current modeAt least one is droop controlled and none has Rd = 0Model AR (low) and Ieq,
as in Figure 2b
2 loops, as in Figure 4
#5
(SC-GS)
Current modeOne is droop controlled and has Rd = 0 (stiff microgrid); the others, if present, are current controlled by the EMSModel BEd,
as in Figure 2c
2 loops, as in Figure 4
Table 3. Rated values of the system.
Table 3. Rated values of the system.
ParameterSymbolValue
Switching frequencyFsw20 kHz
Nominal output voltageV2n180 V
Nominal input voltageV1n50 V
Nominal powerPn750 W
Nominal load resistanceRn43.2 Ω
Nominal input currentI1n15 A
Max. charge/discharge currentIcx, Idx18 A
Nominal output currentI2n4.167 A
Nominal duty cycle d ¯ 0.722
Table 4. Reactive components of the Split-pi.
Table 4. Reactive components of the Split-pi.
ParameterSymbolValue
Inductance value of LL1000 µH
Parasitic resistance of LRL65 mΩ
Capacitance value of CeCe200 µF
Parasitic resistance of CeRe260 mΩ
Capacitance value of CC540 µF
Parasitic resistance of CRc125 mΩ
Table 5. Coefficients of PI regulators in the case of model A.
Table 5. Coefficients of PI regulators in the case of model A.
LoopScenarioValue of RControllerImposed ωc and mφ PI CoefficientsObtained mg
Current IL1Baseline
#1 (SS-GN)
#2 (SD-GN)
RnGci1 ω c = 3000   rad / s   and   m φ = 85 ° Kpi = 0.0160
Kii = 5.3703
Current IL1#3 (SD-GD)
#4 (SC-GD)
Rn//RdGci1 ω c = 3000   rad / s   and   m φ = 85 ° Kpi = 0.0161
Kii = 5.2481
Voltage V2
without FF
BaselineRnGcv2 ω c = 100   rad / s   and   m φ = 85 ° Kpv = 0.2659
Kiv = 18.6209
12.7 dB
Voltage V2
with FF
#1 (SS-GN)
#2 (SD-GN)
RnGcv2 ω c = 100   rad / s   and   m φ = 85 ° Kpv = 0.2712
Kiv = 10.4112
13.1 dB
Voltage V2
with FF
#3 (SD-GD)Rn//RdGcv2 ω c = 100   rad / s   and   m φ = 85 ° Kpv = 0.3284
Kiv = 14.6218
24.2 dB
Current I2#4 (SC-GD)Rn//RdGci2 ω c = 100   rad / s   and   m φ = 85 ° Kpi2 = 0.3746
Kii2 = 389.045
23.7 dB
Table 6. Coefficients of PI regulators in the case of model B.
Table 6. Coefficients of PI regulators in the case of model B.
LoopScenarioControllerImposed ωc and mφ PI CoefficientsObtained mg
Current IL1#5 (SC-GS)Gci1 ω c = 3000   rad / s   and   m φ = 85 ° Kpi = 0.0161
Kii = 5.0699
Current I2#5 (SC-GS)Gci2 ω c = 100   rad / s   and   m φ = 85 ° Kpi2 = 1.1953
Kii2 = 362.22
13.6 dB
with Gadd(s)
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Luna, M.; Sferlazza, A.; Accetta, A.; Di Piazza, M.C.; La Tona, G.; Pucci, M. Modeling and Performance Assessment of the Split-Pi Used as a Storage Converter in All the Possible DC Microgrid Scenarios. Part I: Theoretical Analysis. Energies 2021, 14, 4902. https://0-doi-org.brum.beds.ac.uk/10.3390/en14164902

AMA Style

Luna M, Sferlazza A, Accetta A, Di Piazza MC, La Tona G, Pucci M. Modeling and Performance Assessment of the Split-Pi Used as a Storage Converter in All the Possible DC Microgrid Scenarios. Part I: Theoretical Analysis. Energies. 2021; 14(16):4902. https://0-doi-org.brum.beds.ac.uk/10.3390/en14164902

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Luna, Massimiliano, Antonino Sferlazza, Angelo Accetta, Maria Carmela Di Piazza, Giuseppe La Tona, and Marcello Pucci. 2021. "Modeling and Performance Assessment of the Split-Pi Used as a Storage Converter in All the Possible DC Microgrid Scenarios. Part I: Theoretical Analysis" Energies 14, no. 16: 4902. https://0-doi-org.brum.beds.ac.uk/10.3390/en14164902

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