Optimal Design Analysis with Simulation and Experimental Performance Investigation of High-Power Density Telecom PFC Converters
Round 1
Reviewer 1 Report
The paper presents and analysis and the design process of interleaved boost converter based single phase power factor correction rectifier.
Provided analysis of the DC/DC interleaved converter hides the problem of current ripple for varying input voltage. In the PFC converter, the voltage of capacitor places directly behind the diode rectifier varies strongly due to low value of capacitance. Thus the duty cycle varies in wide range as well what influences on inductor currents ripples in both sections of DC/DC interleaved converter. When the grid voltage crosses zero, the input voltage of interleaved converter (diode rectifier output voltage) is close to zero and the duty cycle is close to 1. For such case, according to Figure 5, the total current ripples in relation to single DC/DC converter current ripples are the same. Please show the data (single period waveform of currents (total current, iL1 and iL2 in case of interleaved converter) and single period of current of classic DC/DC converter) for both PFC solutions.
I want to comment also simulation results presented in Fig. 14 and 15. Visible triple grid frequency harmonics in both cases (smaller for interleaved converter) are caused by transfer of DC bus voltage oscillations by proportional part of DC bus (output) voltage controller. This can be significantly reduced by implementation of band stop filter (gain 1, 100Hz central frequency and c.a. 40-60Hz of stopping band). Using such a manner, we can increase even the dynamics of output voltage regulation in dynamic states such as loading and unloading by increase of DC voltage controller gain.
By the way, very welcomed are the waveforms showing these dynamic states. Of course pre-charging process can be neglected. These waveforms allow evaluation of outer control loop.
Please improve the quality of Figures. In almost all Figures the fonts are very small, in some of them it makes impossible to properly read the data correctly.
Please show also the waveforms of reference current and actual current. This waveforms allow proper evaluation of the current control loop.
Language shuld be improved. Some exemplary mistakes:
Line 74: “(…) of such this boost converters (…)”
Line 80: “(…) of such this control (…)”
Line 138 and 139: “The circuit operations (…) can be represents (…)”
Line 157: “The boost converter is designed to works…”
Please read carefully whole text. Some typos are also occurring, e.g.:
Line 515, 517, voltage should be lowercase
Line 550, electronic instead of elelctronic
Table 2 “g” instead of gram (most of the units in the paper are used as symbols, so consequently here should be symbol), the same in Table 1 – “W” instead of Watt
Equation 36 is written in italic, oppositely to all other equatons.
Eq. 7 – please remove star as a symbol of product.
Remove dot as the symbol of product in several equations (36)(39)(40)(56)(57)
Replace & symbol by “and” word in figures captions (Fig. 21)(Fig. 22). In the same captions words “voltages” and “interleaved” should be lowercase
Line 484, “Figure 13 …” instead of “Figure 23 …”
Line 489, “SiC” instead of “Sic”
Line 494, “show” instead of “shows”
And many others …
Author Response
Dear professor Dr
First of all, we want to express our thanks and gratitude for the constructive comments and discussions to improve the quality of our manuscript significantly.
- Comments and Suggestions for Authors and answers
- The paper presents and analysis the design process of interleaved boost converter based single phase power factor correction rectifier. Provided analysis of the DC/DC interleaved converter hides the problem of current ripple for varying input voltage. In the PFC converter, the voltage of capacitor places directly behind the diode rectifier varies strongly due to low value of capacitance. Thus, the duty cycle varies in wide range as well what influences on inductor currents ripples in both sections of DC/DC interleaved converter. When the grid voltage crosses zero, the input voltage of interleaved converter (diode rectifier output voltage) is close to zero and the duty cycle is close to 1. For such case, according to Figure 5, the total current ripples in relation to single DC/DC converter current ripples are the same. Please show the data (single period waveform of currents (total current, iL1 and iL2 in case of interleaved converter) and single period of current of classic DC/DC converter) for both PFC solutions.
Reply
- Thanks a lot, professor for this great and constructive comments. Based on your suggestion to investigate the current ripple cancellation technique of the interleaved PFC converters over the conventional PFC converters. the input current ripple for both converters is measured in the same switching period from 1.999925 to 1.999985. Figure 22 (a and b) in the manuscript shows the waveforms of the boost converter input current and inductors currents for the conventional and the interleaved PFC converters.
- The total input ripples current peak to peak over this switching period is measured for both topologies, which is about 6901A for the conventional PFC converter and is reduced to about 0.3091A for the interleaved PFC converter due to the ripple current cancellation technique of the interleaved converters.
- Furthermore, Figure 5 was modified to include the normalized Input ripple current Vs duty cycle in conventional and interleaved PFC.
- I want to comment also simulation results presented in Fig. 14 and 15. Visible triple grid frequency harmonics in both cases (smaller for interleaved converter) are caused by transfer of DC bus voltage oscillations by proportional part of DC bus (output) voltage controller. This can be significantly reduced by implementation of band stop filter (gain 1, 100Hz central frequency and c.a. 40-60Hz of stopping band). Using such a manner, we can increase even the dynamics of output voltage regulation in dynamic states such as loading and unloading by increase of DC voltage controller gain.
Reply
thanks a lot, professor for this suggestion to improve the quality of our work. You are right professor that the band bass filter can be used in the voltage loop controller to improve the current reference and reduced the harmonics in the inductor current, this technique is very effected in the improvement of the current distortions especially in the digitally controlled PFC converters based on the DSP MCU which we can implement it easily by writing some code, debugged and installed to MCU. For our work in this manuscript bandpass filter can be implemented only in the simulation not in the experimental because our controllers in the experimental part are UCC28070 and UCC28180 analog controllers, and inside these controllers, there are no filters implemented and there is no and additional features in this IC’s to implement the current filters. For this reason and for the comparisons between the simulation and the experimental results we used the same control techniques in both parts.
- Also, for the suggestion of using the passive filters, I want to mention that in the startup of our project we try to insert passive filters consists of R, L, C components in the input side of the PFC converters to reduce the common harmonics (3rd, 5th, and 7th) harmonics, we face the problem of the adjusting the resonance frequency of filters with presenting the EMI filters of the PFC converters in the input side Where the values of the capacitances and inductances of the bandpass filter and the EMI filter affected each other, which affect the performance of EMI filter to reduce the electromagnetic interface and the performance of the bandpass filter to reduce the harmonics contents.
- By the way, very welcomed are the waveforms showing these dynamic states. Of course, pre-charging process can be neglected. These waveforms allow evaluation of outer control loop.
Reply
- The waveforms of the input, output voltage to show the dynamic performance of the voltage loop to regulate the output voltage with different input voltage for the both topologies PFC converters were added to the manuscript based on Figures 18 and 19. Which show that the designed outer control voltage loop enhance the constant output voltage with different input voltage conditions in both topologies.
- Please improve the quality of Figures. In almost all Figures the fonts are very small, in some of them it makes impossible to properly read the data correctly.
Reply
- All figures, schematic and block diagrams, simulation and experiment results in the manuscript are modified to increase the quality and resolution of the figures for clear observation of the figure’s details and texts.
- Please show also the waveforms of reference current and actual current. This waveform allows proper evaluation of the current control loop.
Reply
- Figure 16 and Figure 17 were added to the manuscript to show the actual inductors current and the reference current for the both topologies to show the performance operation of the designed current control loops.
Language should be improved. Some exemplary mistakes:
Thanks a lot professor for this comment to improve the quality of our work. The whole manuscript’s English grammar is slowly checked and corrected based by using the full version of the Grammarly software.
- Line 74: “(…) of such this boost converters (…)”
Reply
- Sentence construction and grammar was corrected based on the manuscript lines 81 and 82.
- Line 80: “(…) of such this control (…)”
Reply
- Sentence construction and grammar was corrected based on the manuscript lines 88 and 89.
- Line 138 and 139: “The circuit operations (…) can be represents (…)”
Reply
- Sentence construction and grammar was corrected based on the manuscript lines 150 and 151.
- Line 157: “The boost converter is designed to works…” Please read carefully whole text. Some typos are also occurring, e.g.:
Reply
- The whole text has been slowly checked and the grammar mistakes is corrected based on the manuscript lines 168 and169.
- Line 515, 517, voltage should be lowercase
Reply
- Change was done based on the manuscript lines 558, 560.
- Line 550, electronic instead of elelctronic
Reply
- Change was done based on the manuscript line 606
- Table 2 “g” instead of gram (most of the units in the paper are used as symbols, so consequently here should be symbol), the same in Table 1 – “W” instead of Watt.
Reply
- Change was done based on the manuscript Table 1 in the line135.
- Also, change was done based on the manuscript Table 2 in the line273.
- Equation 36 is written in italic, oppositely to all other equations.
Reply
- Change was done based on the manuscript line 392.
- 7 – please remove star as a symbol of product.
Reply
- Change was done based on the manuscript’s equation 7 in the line 207.
- Remove dot as the symbol of product in several equations (36)(39)(40)(56)(57)
Reply
- Change was done based on the manuscript equations 36, 39, 40, 56 and 57.
- Replace & symbol by “and” word in figures captions (Fig. 21)(Fig. 22). In the same captions words “voltages” and “interleaved” should be lowercase
Reply
- Change was done based on the manuscript line 636 and 643.
- Line 484, “Figure 13 …” instead of “Figure 23 …”
Reply
- Change was done based on the manuscript line 505.
- Line 489, “SiC” instead of “Sic”
Reply
- Change was done based on the manuscript line 510.
- Line 494, “show” instead of “shows”
Reply
- Change was done based on the manuscript line 514.
- The English grammar through the whole manuscript was checked and corrected. Numbering of the figures and equations was also modified.
Author Response File: 
Author Response.pdf
Reviewer 2 Report
Dear colleagues, the work you are presenting is very detailed and well done. I have a couple of suggestions: (i) there are typos and suggestions to improve the grammar. I started pointing out some of them and ended up with more than a hundred. I think if you carefully follow them, you won´t need additional help (suggestions are in the attached PDF). (ii) You are using well-established topologies for your design. This is ok since you are presenting a very advanced design, but I would like you to mention emerging topologies in the introduction, which in some years may (or may not) substitute the topologies that are well known at this moment, you can see for example the database of some MDPI journals such as electronics, for example, the series-capacitor boost converter, which has been compared against the interleaved boost converter. Please improve your introduction with emerging research directions.
Comments for author File: Comments.pdf
Author Response
Dear professor Dr
First of all, we want to express our thanks and gratitude for the constructive comments and discussions to improve the quality of our manuscript significantly.
- Comments and Suggestions for Authors and answers
- there are typos and suggestions to improve the grammar. I started pointing out some of them and ended up with more than a hundred. I think if you carefully follow them, you won´t need additional help (suggestions are in the attached PDF).
Reply
- Thanks a lot professor for this comment, and also many thanks for the attached PDF including more editing in the writing grammar of our manuscript. The whole manuscript’s English grammar is slowly checked and corrected based on the attached pdf comments and also by using the full version of the Grammarly software, thanks again professor.
- You are using well-established topologies for your design. This is ok since you are presenting a very advanced design, but I would like you to mention emerging topologies in the introduction, which in some years may (or may not) substitute the topologies that are well known at this moment, you can see for example the database of some MDPI journals such as electronics, for example, the series-capacitor boost converter, which has been compared against the interleaved boost converter. Please improve your introduction with emerging research directions.
Reply
- Thanks a lot professor for this constructive and important comment. The introduction part was expanded to present some of the emerging techniques to design and improve the performance of the PFC converters. Three new references (16,17 and 18) were added to the manuscript. Paragraph in the manuscript lines (from 58 to 66) was added to explain the main idea in these references.
Author Response File: Author Response.pdf
Round 2
Reviewer 1 Report
Authors have responded satisfactorily and provided new supplementary results. I'm not changing the overal opinion that the originality is not significant because in fact it is something trained already by different teams. However the paper has now satisfactory content and the teams starting analysing PFC converters can find here good background for their studies.
In the Table 3 the unit for inductor value for interleaved converter is wrong.
In my subjective opinion Figures 20 and 21 gives no important information, because DC voltage ripple obviously do not depends on the topology of DC/DC converter, but in a given application depends only on the DC capacitor value and load power. This is because the DC voltage double frequency oscillations at given load power depends only on the grid voltage first harmonic frequency and negligibly on the overal switching ripples of the total current. Also Fig. 25 is not informative (do not provide any usefull knowledge).
To make the paper more professional these figures in my opinion should be removed.
Author Response
Dear professor Dr
Again, we want to express our thanks and gratitude for the constructive, motivating comments and discussions to improve the quality of our manuscript significantly.
Comments and Suggestions for Authors
Authors have responded satisfactorily and provided new supplementary results. I'm not changing the overall opinion that the originality is not significant because in fact it is something trained already by different teams. However, the paper has now satisfactory content and the team’s starting analyzing PFC converters can find here good background for their studies.
Reply
- Thanks a lot professor for the constructive and motivating comments.
- In the Table 3 the unit for inductor value for interleaved converter is wrong.
Reply
- Change was done based on the manuscript table 3 in the line 622.
- In my subjective pinion
- Figures 20 and 21 gives no important information, because DC voltage ripple obviously do not depend on the topology of DC/DC converter, but in a given application depends only on the DC capacitor value and load power. This is because the DC voltage double frequency oscillations at given load power depends only on the grid voltage first harmonic frequency and negligibly on the overall switching ripples of the total current.
- Also Fig. 25 is not informative (do not provide any useful knowledge).
To make the paper more professional these figures in my opinion should be removed.
Reply
- Figure 20 and 21 were removed from the manuscript, the values of the ripple contents of the voltage and currents jut included in the manuscript as a paragraph in the manuscript lines from 544 to 549 to show that the designed PFC converters with the output capacitor designed values and full load condition offer output voltage with the specified ripple contents.
- Figure 25 was removed from the manuscript and the manuscript paragraph in the lines from 614 to 621 was modified based on the new change.
- The numbering of figures throughout the whole manuscript was changed based on this modification.
Author Response File: Author Response.pdf
Reviewer 2 Report
My comments have been addressed. I suggest that the article can be published.
Author Response
Dear professor Dr
Again, we want to express our thanks and gratitude for the constructive, motivating comments and discussions to improve the quality of our manuscript significantly.
- Comments and Suggestions for Authors and answers
My comments have been addressed. I suggest that the article can be published.
Reply
- Thanks a lot professor for the effort and for the constructive and motivational comments.
Author Response File: Author Response.pdf
