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Article
Peer-Review Record

A Hybrid Approach for Efficient and Secure Point Multiplication on Binary Edwards Curves

by Asher Sajid 1,*, Omar S. Sonbul 2, Muhammad Rashid 2,* and Muhammad Yousuf Irfan Zia 3,4
Reviewer 1: Anonymous
Reviewer 2:
Reviewer 3: Anonymous
Submission received: 14 April 2023 / Revised: 4 May 2023 / Accepted: 4 May 2023 / Published: 8 May 2023

Round 1

Reviewer 1 Report

 

\vskip 2mm \textbf{Suggestions for revision:}

 

\vskip 2mm 1. Provide more details and background knowledge when introducing the accelerator architecture to help readers better understand the design principles and motivations behind the architecture.

 

\vskip 2mm 2. Consider comparing experimental results with other similar studies to better evaluate the performance and efficiency of the proposed accelerator in the verification section.

 

\vskip 2mm 3. Clearly summarize the contribution and importance of this research and propose possible future research directions in the conclusion section.

 

 

 

\vskip 5mm

 

I hope, authors may address my comments and questions. After revision of the paper, I believe it can be accepted for publication.

Comments for author File: Comments.pdf

Minor editing of English language required

Author Response

The file is attached. 

Author Response File: Author Response.docx

Reviewer 2 Report

This paper proposed a hybrid approach to optimize point multipilcation over ECC. In general, this paper is well written and clear. So I recommend to accept it after certain revision.

consider to revise Section 3.2, it seems not proper to present it there.

Author Response

The file is attached. 

Author Response File: Author Response.docx

Reviewer 3 Report

The authors propose a two-stage pipelined architecture in order to improve the performance of a point multiplication on Binary Edward Curves. The paper is generally well written and all the introduced concepts are presented in detail.

My specific comments for the authors are:

- Experimental results need would be interesting to provide comparison with respect to the initial architecture (without pipeline).

- Provide some quantitative analysis at the end of the results across all experiments and FPGAs.

Author Response

The file is attached. 

Author Response File: Author Response.docx

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