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Article

Solution-Processed Carbon Nanotube Field-Effect Transistors Treated by Material Post-Treatment Approaches

by
Hao Li
1,2,3,
Leijing Yang
1,2,3,*,
Haojin Xiu
1,2,3,
Meng Deng
1,2,3,
Yingjun Yang
4 and
Nan Wei
4
1
School of Electronic Engineering, Beijing University of Posts and Telecommunications (BUPT), Beijing 100876, China
2
State Key Laboratory of Information Photonics and Optical Communications, Beijing University of Posts and Telecommunications (BUPT), Beijing 100876, China
3
Beijing Key Laboratory of Space-Round Interconnection and Convergence, Beijing University of Posts and Telecommunications (BUPT), Beijing 100876, China
4
Key Laboratory for the Physics and Chemistry of Nanodevices and Center for Carbon-Based Electronics, Department of Electronics, Peking University, Beijing 100871, China
*
Author to whom correspondence should be addressed.
Electronics 2023, 12(24), 4969; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics12244969
Submission received: 17 November 2023 / Revised: 6 December 2023 / Accepted: 10 December 2023 / Published: 12 December 2023
Browse Figures
Versions Notes

Abstract

:
The preparation of semiconducting carbon nanotube (s-CNT) thin films by solution processing has become the mainstream approach nowadays. However, residual polymers are always inevitable during the sorting of s-CNTs in solution. These residual polymers will degrade the electrical properties of the CNTs. Although several post-treatment approaches have been reported to be effective in improving the performance of the device, there is no deep analysis and comprehensive comparison of these approaches, so there is no overall guidance on the optimum treatment of CNTs for performance improvement. In this work, we characterize CNT thin film with three post-treatment methods, including annealing (A), yttrium oxide coating and decoating (Y), and annealing combined with YOCD (A + Y), and evaluate and compare the performance of Field Effect Transistors (FETs) based on the above mentioned CNT thin film. The result shows that the CNT thin film treated by the A + Y method is the clearest and flattest; the average roughness determined from the overall AFM image is reduced by 28% (from 1.15–1.42 nm (O) to 0.826–1.03 nm (A + Y)), which is beneficial in improving the device contact quality, uniformity, and stability. The on-state current (Ion) of the FETs with CNTs treated by A, Y, and A + Y is improved by 1.2 times, 1.5 times, and 1.75 times, respectively, compared with that of FETs fabricated by untreated CNTs (O for original CNTs), indicating that the A + Y is the optimum post-treatment method for the A + Y and combines the effect of the other two methods. Accordingly, the contact and channel resistance (2Rc and Rch) of the CNT FETs treated by different post-treatment methods including A, Y, and A + Y is reduced by 0.18/0.24 times, 0.37/0.32 times, and 0.48/0.41 times, respectively. The ratio of improvement in device performance is about 1:2 for the contact and channel sections for a transistor with a 500 nm channel length, and this ratio will go up further with the channel length scaling; together with the decay in the channel resistance optimization effect in the scaling device, it is necessary to adopt more methods to effectively reduce the contact resistance further.

1. Introduction

Due to their unique physical properties, including high carrier mobility, small intrinsic capacitance, large saturation velocity, and atomic thickness, carbon nanotube-based electronics have attracted extensive attention for future electronic digital [1,2,3,4], radio-frequency [5,6,7], flexible [8,9,10], and radiation-hardened devices [11,12]. After decades of development, great progress has been made by academics, such as in wafer-scale materials with 99.99997% purity [13], transistors better than silicon ones with the same feature size [14,15], and the demonstration of all sorts of integrated circuit (IC) [16,17,18], 3D architectures [19,20,21], radio-frequency (RF) amplifiers within the 5G band [5,6], and even industrial foundries [22]. It is worth noting that the recent remarkable achievements are all based on solution-processed CNTs, compared with chemical vapor deposition (CVD)-based CNTs [14,23,24,25] or other conformal thin film depositions [26,27,28]. Nowadays, these solution-processed CNT materials have been intensively studied and become the mainstream type of CNTs because they can provide CNTs with high purity, high density, wafer-scale assembly capability, and good device performance [1,29,30,31,32,33,34,35,36,37,38,39,40] at the same time.
In the batch preparation of CNTs by solution-processing, polymer wrapping [37] is a key step to separate semiconducting CNTs (s-CNTs) and metallic CNTs (m-CNTs). However, this process often results in significant amounts of polymer residue with low conductivity on/around the s-CNT surface, despite multiple washing attempts. Consequently, this leads to an increase in resistance between tube–tube junctions and the Schottky barrier between tube–metal junctions, ultimately resulting in device performance degradation [41]. In recent years, numerous techniques have been developed for the removal of polymer residues, which can be classified into two types based on the stages of the removal process: pre-deposition treatment and post-deposition treatment. The pre-deposition treatment method usually uses decomposable or dissolvable polymer as the dispersant, which is easily removed after the carbon nanotube selection and before the CNT deposition [42,43,44,45,46]. However, the s-CNT solution without the dispersant is prone to agglomerate, resulting in agglomeration or bundles in the deposited CNT film. The post-deposition treatment is the most popular method, which involves removing the polymer by annealing (A), including rapid annealing after CNT deposition [30,47,48,49]. Recently, it has been found that polymer also can be removed efficiently by yttrium oxide-based coating and decoating (YOCD, Y) after CNT deposition [36,37,50]. To date, several works have demonstrated that the electrical performance of a CNT transistor can be boosted effectively by the A or Y method. However, there is no deep analysis and comprehensive comparison of these different post-deposition treatment techniques, so there is no overall guidance for the optimum treatment of CNTs for performance improvement.
In this work, we analyze and evaluate the effect of several post-deposition treatment methods, including A, Y, and A + Y (first annealing, then YOCD) on improving the properties of CNTs and CNT-based transistors compared with untreated CNTs (O) as the control group. Based on the scanning electron micrograph (SEM), the atomic force micrograph (AFM), and the Raman spectrum, we compare the morphology of CNTs, and we fabricate self-aligned top-gate FETs with the treated CNTs as the channel material and compare their electrical properties. Based on the transfer and output characteristic curves, we compare the on-state current (Ion), the on-state resistance (Ron), the contact resistance (2Rc), and the channel resistance (Rch) of CNT FETs. As a result, the A + Y method is the optimum post-treatment technique to improve device performance, and the performance of the CNT FETs is significantly improved, including a 75% increase in Ion and a 44% reduction in Ron. Moreover, the CNT FETs treated with only A or Y achieved a 20% and 50% increase in Ion and a 21% and 34% reduction in Ron, respectively. Finally, by analyzing the proportion of Δ2Rc and ΔRch in the ΔRon, and the relationship between ΔRch and channel length, it is revealed that the Δ2Rc plays a more important role in the performance of ultra-small devices. In the future, more work should be done to improve contact quality and reduce contact resistance effectively.

2. Materials and Methods

2.1. Preparation of CNT Thin Films

The arc-discharged CNTs were purchased from Carbon Solutions Inc., and the polymer 9-(1-octylonoyl)-9H-carbazole-2,7-diyl (PCz) was prepared via Suzuki polycondensation [51]. The CNTs and the polymer 9-(1-octylonoyl)-9H-carbazole-2,7-diyl (PCz) were dissolved in toluene at a ratio of 2:1:1. The solution was dispersed using a top-tip dispergator (Sonics VC700) for 30 min. After the solution was fully mixed, it was immediately centrifuged at 30,000× g for 2.5 h (Allegra X-64R) to remove the bundles, metallic CNTs, and impurities in the solution. Then, the upper supernatant was collected and centrifuged again at 30,000× g for 2 h. Finally, the upper supernatant was collected and diluted as a high-purity semiconducting CNT solution for further use. The CNT films were obtained using the dip-coating method. Four Si/SiO2 substrates were immersed in the CNT solution for 24 h. After deposition, the four substrates were baked at 120 °C for 30 min. After the CNT films were prepared, three samples were selected for different post-treatment approaches, respectively.

2.2. Post-Treatment of CNTs before Transistor Fabrication

2.2.1. A Process

Figure S2a shows the equipment diagram of the annealing. The process of annealing was conducted in an inert gas environment at a high temperature. Meanwhile, some water molecules and impurities on the surface of the CNT thin film were evaporated and reduced at a high temperature. First, a sample covered with the CNT film was put into the tube furnace (Thermo Scientific Linderg/Blue M MoldathERM 1100 °C). Then, the air in the tube furnace was blown away using 1000 sccm argon (Ar) for 10 min. Next, the vacuum in the furnace was pumped to about 0.09 Kpa. If the vacuum value remains unchanged for 5 min, the air tightness is considered good enough to anneal. The annealing lasts for 2 h at 500 °C, and the flow rates of argon (Ar) and hydrogen (H2) are 40 sccm and 5 sccm, respectively. After the annealing treatment, the sample was cooled to room temperature for the following treatment or fabrication.

2.2.2. Y Process

Figure S2b shows the experimental process. Y (3 nm) was first deposited by electron-beam evaporation (EBE). Thermal oxidation at 250 °C for 30 min in air was carried out immediately after the EBE. At this time, Y becomes YOx due to the oxidation reaction. The YOx was removed by immersing it in a dilute hydrochloric acid solution (HCl/H2O = 1:25) for 20 min. The residual HCl on the surface was cleaned by putting the sample in deionized water for 3 min. Finally, the sample was blown dry with nitrogen.

2.2.3. A + Y Process

The CNT film is treated by A, first, and then treated by Y.

2.3. Fabrication of the Self-Aligned Top-Gate CNT FET Devices

First, the source and drain electrodes of the Ti/Pd (0.3/60 nm) were defined by electron-beam lithography (EBL) and deposited by electron-beam evaporation (EBE), followed by a standard lift-off process. Then, in order to avoid a short circuit, the channel area is patterned by electron beam lithography (EBL), followed by oxygen (O2) plasma etching. Subsequently, the gate window is patterned by EBL, and an HfO2 film with a thickness of 10 nm is grown via atomic layer deposition (ALD) at 90 °C as the gate dielectric, followed by EBE deposition of a 10 nm Pd film immediately and a standard lift-off process. Finally, a Ti/Au film with a thickness of 5 nm/75 nm is formed as the pads and interconnection for the electrical measurements using the same fabricated process as the source and drain electrodes.
The SEM images of the CNT films and CNT FETs were captured using a Zeiss Sigma 300 (FEI Company, Hillsboro, OR, USA). The Raman spectrum of the CNT films was carried out using the LabRAM HR Evolution confocal microscope (HORIBA Company, Kyoto, Japan). The electrical performances of the CNT FETs were measured using a Keithley 4200 system (Keithley Company, Shanghai, China) and a probe station (MPI TS200SE) at room temperature.

3. Results and Discussion

3.1. The Back-Gate CNT FETs Experimental Analysis

The first part describes the CNT thin film preparation process; polymer 9-(1-octylonoyl)-9H-carbazole-2,7-diyl (PCz) is used for dispersion. Figure S1a shows the SEM of the as-fabricated CNT thin films; the density of the CNTs is approximately 30 tubes/μm. The resonance Raman spectrum of the CNT films under the excitation of a 633 nm laser (Figure S1b) exhibits that the radial breathing mode transition band (ωRBM) of the CNTs is 176 cm−1, which indicates that the CNT diameter (dt) is about 1.4 nm. The M11 and S22 range in the UV-vis-IR absorption spectrum of the CNT films indicates the high semiconducting purity of the CNT thin film (Figure S1c). In fact, the semiconductor purity in the as-fabricated CNT film has been reported to exceed 99.9999% [13]. The post-treated process details of A and Y are described in the second part of the Experimental Analysis section, and the schematic diagram is shown in Figure S2a,b, respectively.
At the very beginning, we fabricate a series of back-gated CNT FETs (Figure S3a), in which the CNTs are treated by different post-treatment methods, different treated times, and different treatment sequences, including using A once or twice, Y once or twice, and A + Y and Y + A (first YOCD, then annealing). Then, we compare the on-current (Ion) of the different CNT-based FETs for the amount of residual copolymer directly affecting the Ion and resistance of the FETs. Figure S3b,c show the statistically normalized Ion of the back-gated CNT FETs with the CNTs treated by A once or twice and Y once or twice, respectively. The nearly equal Ion of the CNT FETs for each channel length (Lch, from 5 μm to 200 nm) indicates that the effect of annealing once and twice is close, as is Y. Meanwhile, there are obvious difference results between A + Y and Y + A (Figure S3d). The Ion of the CNT FETs treated by A + Y is slightly larger than that of Y + A when the Lch is 5 μm, and with the Lch scaling down, the differences become larger. The increase in the Ion difference comes from the decrease in the channel length, i.e., the decrease in the channel resistance (Rch), since the contact electrode length and width of all the CNT FETs with different Lch are the same. The results also indicate that effective copolymer removal is very important to improve the performance of the small-channel transistor. However, the specific reasons for different sequences of post-treatment processes leading to different removal effects of the polymer residue need to be further systematically studied. The typical transfer characteristics of these devices with Lch = 1 μm are presented in Figure S3e. Considering the above results, we analyze and evaluate the effect of three types of post-deposition treatment methods, including A once, Y once, and A + Y, on improving the properties of CNT FETs, with untreated CNTs as the control group.

3.2. Thin Film Characterization

We prepare four CNTs thin film samples of 1 × 1 cm2 and apply different post-processing methods to them. The first sample is untreated as the original sample, the second is treated by A once, the third is treated by Y once, and the fourth is annealed, firstly, and then treated by Y (A + Y). Figure 1 shows the SEM, AFM, and Raman images of the four samples. As shown in Figure 1a, there is no significant change in CNT density, but compared to the original CNTs, the SEM images of the CNTs treated by A, Y, and A + Y gradually become clearer, and the combined method, A + Y, achieves the best results for the effective removal of the residual polymer. AFM images are used to characterize the morphological features of the CNT film. As shown in Figure 1b, the height variation in the images is noticeably diminished, especially after treating by Y and A + Y, i.e., the whole CNT surface becomes cleaner. Also, the CNTs are more visible treated by post-treatment. Four horizontal lines are selected from Figure 1b, and the corresponding height distributions are displayed in Figure 1c. The height distributions become smaller treated by post-treatment, indicating the removal of PCz. The average roughness determined from the overall AFM image gradually decreases from 1.15–1.42 nm in the original CNTs to 0.826–1.03 nm in the A + Y-treated CNTs. Moreover, the Raman spectroscopy of the CNTs (Figure 1d) is utilized to characterize the removal of the PCz before and after treatment. The peak of the PCz at 1622 nm is highlighted by a light purple rectangle. It (O, intensity (int.) = 219) weakens in the Raman spectrum of CNTs treated by A (int. = 142) and Y (int. = 124) and disappears in the Raman spectrum of CNTs treated by A + Y (int. = 0), confirming that a significant amount of PCz molecules have been removed by A + Y. The results demonstrate that all three post-treatment methods (A, Y, and A + Y) can remove PCz to a certain extent; the Y method is more effective than the A method, and the best removal effect is obtained by the combined method, A + Y.

3.3. The Top-Gate CNT FETs Experimental Analysis

After the material characterization, a set of self-aligned top-gate CNT FETs with the same structure and size (Lch = 0.5 µm, Wch = 50 µm) are fabricated on the four samples with different post-treatments. The fabrication process is described in Section 2 Materials and Methods. The schematic diagram of the top-gated CNT FET is shown in Figure S4a.
To compare the performance of devices with CNTs treated by the three different post-treatment methods, firstly, Figure 2a compares directly the transfer characteristics of four typical devices normalized by the same threshold voltage (Vth). The transistors present p-type field-effect characteristics for Vds = −0.4 V, and the transfer curves from top to bottom correspond to A + Y, Y, A, and O, respectively. The Ion of three typical FETs fabricated by CNTs treated by A, Y, and A + Y is improved by 1.24 times, 1.5 times, and 1.76 times, respectively, compared with that of devices fabricated by untreated CNTs (O). This shows that the Y method works better than the A method, and A + Y is the optimum method in terms of improving device performance. The output characteristics of the four FETs corresponding to the different processing methods mentioned above are shown in Figure 2b–e, respectively, in which all the Vgs vary from −2 to −0.5 V with a step of 0.5 V. As we can see in Figure 2b–e, at low bias, the linear relation between the drain current (Ids) and bias (Vds) demonstrates Ohmic contacts. The saturation current of three typical FETs fabricated with CNTs treated by A, Y, and A + Y is improved by 1.23 times, 1.61 times, and 2 times, respectively, compared with that of the one FET fabricated with untreated CNTs (O). Figure 2f shows the comparison of the statistical Ion of the FETs using different post-treatment approaches. The results show that the normalized statistics of the Ion are improved by 1.2 times, 1.5 times, and 1.75 times, respectively, compared with that of the FETs fabricated by untreated CNTs (O), which is consistent with the results shown in Figure 2a. In terms of the removal effect of the polymer (PCz) around the CNTs, the Y method is more effective than the A method, and A + Y is the optimum post-treatment method because A + Y combines the effects of the A and Y methods. In general, for improving device performance, the order of effect is A + Y > Y > A.

3.4. Contact Resistance Analysis

The performance boost could be due to improvement from the contact and/or the channel (decrease of resistance of the contact and channel). In order to figure out which part contributes the dominant effect for the improvement, we focus on the contact part by extracting the contact resistance (2Rc) using the transfer length method (TLM) [52,53]. We fabricate a group of self-aligned top-gate CNT FETs on each of the four different samples, where each group includes four transistors with channel lengths of 1, 5, 10, and 30 μm. The SEM images of a set of FETs with different channel lengths are shown in Figure 3a, and the schematic diagram is shown in Figure S4b. The two adjacent electrodes are used as the source (drain) electrode with Ti/Pd = 0.3/60 nm, and the length between the adjacent electrodes is the channel length (Lch). This design can avoid the influence of the nonuniformity of the CNT thin film on 2Rc. Figure 3b–e shows the transfer characteristics of devices at Vds = −2 V (O, A, Y, and A + Y) based on the four different samples, respectively. We extract the Ron of these devices following the methods shown in Figure S5 and display them in Figure 3f. The Ron of the devices is modeled as Ron = 2Rc + ρchLch, where ρch is the resistivity of the channel material and is assumed to be a constant. Figure 3f illustrates the relationship between the devices, Ron and Lch, and the intersection point of the Ron fitting curve with the Y-axis is 2Rc. The 2Rc of the four groups of CNT FETs is 7.8 KΩ (O), 6.4 KΩ (A), 4.9 KΩ (Y), and 4 KΩ (A + Y). It can be seen that the 2Rc of the devices decreases significantly (nearly half of the original one by A + Y).
As shown in Figure 4a,b, the statistically normalized 2Rc of the FETs corresponding to the devices shown in Figure 2f is reduced by 18% (A), 37% (Y), and 48% (A + Y), and the statistically normalized Rch is reduced by 24% (A), 32% (Y), and 41% (A + Y), while the statistically normalized Ron is reduced by 21% (A), 34% (Y), and 44% (A + Y), respectively, compared with that of the FETs fabricated by the untreated CNTs (O). The Ron is calculated from the date in Figure 2f and displayed in Figure S5b. It can be seen that by using the A + Y method, the 2Rc and Rch of the transistor are both decreased by more than 40%. The decrease in 2Rc and Rch leads to the decrease in Ron, and the respective proportions of them are shown in Figure 4c. The ratio of improvement in all the transistors with the Lch = 500 nm performance is about 1:2 for the contact and channel sections in the A-, Y-, and A + Y-treated CNT FETs. In general, this ratio will decrease with the increase in channel length because the Rch decreases linearly with the scaling of channel length, but the 2Rc is unchanged. So, as for transistors with the Lch = 1 μm, the ratio is about 1:3 (Figure 4d). This result also illustrates the importance of reducing contact resistance in small-channel devices.
At last, we compare the resistance parameters, i.e., 2Rc, Rch, and Ron of the A + Y (the best post-treatment method in this article), of the treated and untreated (O) FETs with Lch = 500 nm and Lch = 1 μm in Table 1 to characterize the improvement effect of the post-treatment method on contact. As shown, the improvement effect of the A + Y method on the device channel and contact resistance is similar (about 50%) in the 1 μm CNT FETs. The Ron of the device is reduced by 49.6%, which is reduced by 43.8% in the 500 nm CNT FETs, whereas the optimization effect of the channel resistance is reduced by 40.9%. Therefore, the above analysis proves again that the reduction in contact resistance plays a key role in submicron-, deep micron-, or even nanometer-scale device performance. Actually, the 2Rc of the A + Y-treated FET is about 4 KΩ, and the contact resistance of per CNT is far greater than that of the CVD-based CNT [54]. In the future, more methods should be adopted to remove the strong backbone of residual copolymer effectively to improve contact quality, or new processes should be introduced to avoid metal contact with CNTs through the residual copolymer, such as to construct end-contact FETs [55], in which metal can be in direct contact with the CNTs, avoiding the influence of polymer. The 2Rc of the end-contact solution-processed CNT FET is nearly equal to that of the side-contact CVD-based CNT FET.

4. Conclusions

In conclusion, we characterized the CNT thin films treated by three post-treatment methods, including A, Y, and A + Y. The CNT thin film treated by the A + Y method was the clearest; the average roughness determined from the overall AFM image is in the range of 0.826–1.03 nm, which is 28% lower than that of the original film. Then, we also fabricated bottom-gate FETs using CNT films treated by different post-treatment methods, including A once or twice, Y once or twice, A + Y, and Y + A, and analyzed and compared their electrical properties using the Ion determined from the characteristic curves. The results demonstrated that the performances of the CNT FETs treated by A once or twice are similar, as are the YOCD, and the performance of the CNT FETs treated by A + Y is better than Y + A. Thirdly, we fabricated top-gate FETs on the CNT film treated by A once, Y once, and A + Y. Comparing the Ion of the top-gated CNT FETs shows that the performance was significantly improved using different post-treatment methods. It is worth noting that the Y method is more effective than the A method in removing polymers around CNTs, and the A + Y method is the optimum method because the A + Y method combines the effect of the other two methods. Further, we determined the contact resistance (2Rc) and channel resistance (Rch) of the CNT FETs; the 2Rc and Rch of the CNT FETs were reduced by 0.18/0.24 times (A), 0.37/0.32 times (Y), and 0.48/0.41 times (A + Y), respectively. Further analysis revealed that the reduction in contact resistance plays a key role in submicron-, deep micron-, or even nanometer-scale device performance. This work provides a comprehensive analysis and comparison of the post-treatment methods for improving device performance, which provides guidance for the CNT FET fabrication process. Further improvement of post-treatment methods, including the optimization and innovation of the processes, can effectively reduce the resistance of CNT FETs and enhance their electrical properties, laying the foundation for future research on CNT-based electronics.

Supplementary Materials

The following supporting information can be downloaded at: https://0-www-mdpi-com.brum.beds.ac.uk/article/10.3390/electronics12244969/s1, Figure S1: The absorption and Raman spectrum of a CNT network thin film; Figure S2: Schematic diagram of different post-treatment methods; Figure S3: The effect of different numbers of post-treatment approaches on device performance; Figure S4: Schematic diagram of top-gate CNT FET and a set of CNT FETs with different channel lengths; Figure S5: The calculation of Ron.

Author Contributions

L.Y. proposed and supervised the project; L.Y. and H.L. designed the structures of the transistors and performed the device fabrication and the d.c. measurements; H.L. produced the CNT thin film, characterized the CNT materials, and performed the device annealing; L.Y. cleaned the device using the Y method; H.L. and L.Y. analyzed the data and co-wrote the manuscript; H.X. and M.D. drew schematic diagrams of the device structure; Y.Y. and N.W. revised the manuscript. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the National Natural Science Foundation of China (NSFC, Grant No. 61875016) and the Fundamental Research Funds for the Central Universities and Peking Nanofab.

Data Availability Statement

Data are contained within the article and Supplementary Materials.

Conflicts of Interest

The authors declare no conflict of interest.

Glossary

Full NameAbbreviation
carbon nanotubesCNTs
semiconducting carbon nanotubess-CNTs
metal CNTsm-CNTs
original/untreatedO
annealingA
yttrium oxide-based coating and decoatingYOCD, Y
first annealing, then YOCDA + Y
scanning electron micrographSEM
atomic force micrographAFM
on-state resistanceRon
on-state currentIon
contact resistance2Rc
channel resistanceRch
channel lengthLch
width lengthWch
threshold voltageVth
voltage biasVds
electron-beam evaporationEBE
electron-beam lithographyEBL
atomic layer depositionALD
chemical vapor depositionCVD
polymer 9-(1-octylonoyl)-9H-carbazole-2,7-diylPCz
argonAr
hydrogenH2
yttriumY
yttrium oxideYOx

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Figure 1. Characterization of the CNT thin film before and after different treatment methods. (a) SEM images of CNT film before and after different treatment methods. Scale bar: 200 nm. (b) AFM images of CNT film before and after different treatment methods. Scale bar: 500 nm. (c) AFM height profile of CNT films. (d) Raman spectroscopy of CNT film before and after different post-treatment.
Figure 1. Characterization of the CNT thin film before and after different treatment methods. (a) SEM images of CNT film before and after different treatment methods. Scale bar: 200 nm. (b) AFM images of CNT film before and after different treatment methods. Scale bar: 500 nm. (c) AFM height profile of CNT films. (d) Raman spectroscopy of CNT film before and after different post-treatment.
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Figure 2. Performance of CNT FETs treated by different post-treatment methods. (a) The transfer characteristics of four typical devices with Lch = 500 nm and Vds = −0.4 V, and horizontal coordinates are normalized as Vgs − Vth. The curves from bottom to top correspond to post-treatment methods of O, A, Y, and A + Y, respectively. (b–e) The output characteristics of the four devices (O, A, Y, and A + Y) in which the Vgs is varied from −2 to −0.5 V with a step of 0.5 V. (f) Statistical Ion of transistors treated by different post-treatment methods.
Figure 2. Performance of CNT FETs treated by different post-treatment methods. (a) The transfer characteristics of four typical devices with Lch = 500 nm and Vds = −0.4 V, and horizontal coordinates are normalized as Vgs − Vth. The curves from bottom to top correspond to post-treatment methods of O, A, Y, and A + Y, respectively. (b–e) The output characteristics of the four devices (O, A, Y, and A + Y) in which the Vgs is varied from −2 to −0.5 V with a step of 0.5 V. (f) Statistical Ion of transistors treated by different post-treatment methods.
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Figure 3. Scaling properties of CNT FETs treated by different post-treatment methods. (a) SEM images of a set of transistors with different channel lengths. Scale bar, 10 μm. (b–e) The transfer characteristics of four kinds of devices (O, A, Y, and A + Y, respectively) in which Lch = 30, 10, 5, and 1 µm and Wch = 50 μm at Vds = −2 V. (f) The 2Rc of the devices determined by the TLM method.
Figure 3. Scaling properties of CNT FETs treated by different post-treatment methods. (a) SEM images of a set of transistors with different channel lengths. Scale bar, 10 μm. (b–e) The transfer characteristics of four kinds of devices (O, A, Y, and A + Y, respectively) in which Lch = 30, 10, 5, and 1 µm and Wch = 50 μm at Vds = −2 V. (f) The 2Rc of the devices determined by the TLM method.
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Figure 4. Proportions of contact and channel in the performance improvement of devices using different post-treatment methods. (a,b) The percentage variation of values normalized of 2Rc and Rch of FETs with Lch = 500 nm by different post-treatment methods, respectively. (c,d) Proportion of 2Rc and Rch in ΔRon for transistors with Lch = 500 nm and 1 μm by different post-treatment methods. The slash and the horizontal pattern lines represent 2Rc and Rch, respectively.
Figure 4. Proportions of contact and channel in the performance improvement of devices using different post-treatment methods. (a,b) The percentage variation of values normalized of 2Rc and Rch of FETs with Lch = 500 nm by different post-treatment methods, respectively. (c,d) Proportion of 2Rc and Rch in ΔRon for transistors with Lch = 500 nm and 1 μm by different post-treatment methods. The slash and the horizontal pattern lines represent 2Rc and Rch, respectively.
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Table 1. The resistance parameter of the A + Y-treated and untreated CNT FETs.
Table 1. The resistance parameter of the A + Y-treated and untreated CNT FETs.
Devices OA + YEach Reduction (%)Ron Reduction (%)
Lch = 500 nm2Rc7.8 KΩ4 KΩ48.743.8
Rch13.2 KΩ7.8 KΩ40.9
Lch = 1 μm2Rc7.8 KΩ4 KΩ48.749.6
Rch20 KΩ10 KΩ50.0
Note: Changes in each part of the resistance (Ron, 2Rc, Rch) of the transistors with Lch = 500 nm and 1 μm after applying the A + Y method to CNT films.
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Li, H.; Yang, L.; Xiu, H.; Deng, M.; Yang, Y.; Wei, N. Solution-Processed Carbon Nanotube Field-Effect Transistors Treated by Material Post-Treatment Approaches. Electronics 2023, 12, 4969. https://0-doi-org.brum.beds.ac.uk/10.3390/electronics12244969

AMA Style

Li H, Yang L, Xiu H, Deng M, Yang Y, Wei N. Solution-Processed Carbon Nanotube Field-Effect Transistors Treated by Material Post-Treatment Approaches. Electronics. 2023; 12(24):4969. https://0-doi-org.brum.beds.ac.uk/10.3390/electronics12244969

Chicago/Turabian Style

Li, Hao, Leijing Yang, Haojin Xiu, Meng Deng, Yingjun Yang, and Nan Wei. 2023. "Solution-Processed Carbon Nanotube Field-Effect Transistors Treated by Material Post-Treatment Approaches" Electronics 12, no. 24: 4969. https://0-doi-org.brum.beds.ac.uk/10.3390/electronics12244969

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