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Article

Investigation of Current Collapse Mechanism on AlGaN/GaN Power Diodes

1
Univ. Lille, CNRS, Centrale Lille, University Polytechnique Hauts-de-France, UMR 8520-IEMN, F-59000 Lille, France
2
Univ. Lyon, Ecole Centrale de Lyon, INSA Lyon, Université Claude Bernard Lyon 1, CNRS, Ampère, UMR5005, F-69130 Ecully, France
3
Univ. Lille, Arts et Métiers, Institute of Technology, Centrale Lille, Junia, ULR 2697-L2EP, F-59000 Lille, France
4
STMicroelectronics, F-37000 Tours, France
*
Author to whom correspondence should be addressed.
Submission received: 30 March 2023 / Revised: 17 April 2023 / Accepted: 23 April 2023 / Published: 26 April 2023
(This article belongs to the Special Issue GaN Power Devices and Applications)

Abstract

:
In this paper, a methodology is proposed for studying the current collapse effects of Gallium Nitride (GaN) power diodes and the consequences on the dynamic on-resistance (RON). Indeed, the growing interest of GaN based, high frequency power conversion requires an accurate characterization and a deep understanding of the device’s behaviour before any development of power converters. This study can ultimately be used to model observed trap effects and, thus, improve the equivalent electrical model. Using an in-house circuit and a specific experimental setup, a current-collapse phenomenon inherent to gallium nitride semiconductor is studied on planar 650 V—6 A GaN diodes by applying high voltage stresses over a wide range of temperatures. With this method, useful data on activation energy and capture cross section of electrical defects linked to dynamic RON are extracted. Finally, the origins of such defects are discussed and attributed to carbon-related defects.

1. Introduction

The research in the domain of energy conversion has intensified in recent years. The use of wide-bandgap (WBG) materials such as silicon carbide (SiC) and gallium nitride (GaN) enable a considerable improvement in power electronics. Today, the tremendous development of GaN-based power electronics is promoted through GaN physical characteristics and associated devices featuring high breakdown voltage, fast switching speed, high thermal stability, and low on-resistance [1]. Therefore, many applications are developed such as wireless charging, data centres, and electrical network. Interest in monolithic GaN structures for power electronic converters needs GaN power diodes to improve the efficiency. Mainly due to the current collapse phenomenon, these diodes are not yet available on the market but research is ongoing [2,3]; in particular, at ST-Microelectronics. In this paper, the authors propose a complete setup and method to identify the mechanisms responsible for the so-called dynamic Ron. This parasitic effect is inherent to GaN technology because of high density of traps centres. This phenomenon can drastically affect the electric performance of the diode and, consequently, the efficiency of the converters. In this study, measurements on the first GaN packaged power diodes manufactured by ST-Microelectronics are carried out [4]. The obtained results give access to the equivalent electrical circuit through the accurate extraction of all the parasitic and intrinsic elements. Still under development, the behaviour of these diodes must be fully understood to provide information about limitative effects and give material feedback. Indeed, GaN technology still suffers from the degradation of its dynamic on-resistance RON mainly due to the trapping phenomenon, which inevitably affects its performance and significantly shortens its lifespan. In this way, the understanding and electrical modelling of such a parasitic traps-related phenomenon appear necessary to characterize these diodes in-depth.
Electrical methods regarding current collapse analysis were already proposed for GaN-based power HEMTs in previous studies [5,6]; the proposed setups shown the influence of trapping time and temperature on the device dynamic RDS(on) values. In this study, current collapse measurements on GaN-based innovative power diodes are specifically conducted to model accurately trapping phenomena and provide deep insight on degradation mechanisms; the kinetic and the amplitude of the observed phenomenon depend on different factors such as the temperature [7] and the concentration of defects, i.e., related to the stress applied to the component. For this reason, high voltage stresses at different temperatures are performed with the aim of characterizing this effect over time.
Section 2 describes the devices under tests and the experimental setup used to conduct the measurements. An analysis through the recovery phases is proposed and presented in Section 3, permitting to understand the effects of traps and their signatures. A discussion concludes this paper.

2. Materials and Methods

2.1. Materials

ST Microelectronics grows layers on p-type 8″ Si <111> substrate by Metal Organic Chemical Vapor Deposition (MOCVD). The optimized buffer is composed of transition layers and Carbon-doped GaN (GaN:C) followed by an unintentionally doped GaN layer (GaN UID) to ensure high voltage and low leakage current operations. At the AlGaN/GaN interface a two-Dimensional Electron Gas (2DEG) is created. Finally, the passivation layers are deposited. Design details on the geometries and doping profiles are not released by the manufacturer.
The studied diodes are 650 V—6 A GaN power diode packaged into TOP-3. A schematic of the global GaN Schottky diode is shown in Figure 1a, and the PCB designed for both time-dependent and small-signal characterization in the frequency domain (featuring open and short devices used for de-embedding procedures [4]) is shown in Figure 1b. S-parameters measurements [4] developed in our team are used to characterize the diodes. Current collapse measurements can be conducted using the same characterization board.

2.2. Stress Test Methodology

Figure 2 shows the methodology used to investigate the current collapse phenomenon. A similar stress test setup was proposed for GaN HEMT in [8,9]; it may be divided into two main steps:
  • The stress phase, where reverse voltage is applied for a fixed duration corresponding to the OFF state. During this phase, depending on the stress time and Shockley-Read-Hall (SRH) kinetic, a given net charge is trapped within deep or shallow levels.
  • The recovery phase, where the diode behaviour in forward condition is observed corresponding to the ON-state. During this phase, de-trapping mechanism occurs and the emission of charges previously trapped is now observable.
Figure 2. Schematic protocol of the current-collapse measurements.
Figure 2. Schematic protocol of the current-collapse measurements.
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With the purpose of avoiding cumulative phenomena and, thus, keeping the diode measurement conditions in the nominal state, an accelerated carrier “de-trapping step” is performed between each campaign by heating the diodes. As shown in [9,10], heating the components makes the de-trapping process easier; concerned energy levels are given through the SRH statistics. De-trapping time constant τ for different temperatures can be determined with the Equation (1) as shown in Figure 3.
τ = 1 v t h σ t h N c e q E T k T
where ET stands for the trap energy level, vth is the electron thermal velocity, σth is the scattering cross section, Nc is the density of states within the conduction band, k is the Boltzmann constant, q is the elementary charge, and T is the temperature. These different parameters are chosen regarding the actual literature for GaN semiconductor. As an example, the author of [11] gives a value for the thermal velocity of charge carriers varying from 2.43 × 105 to 3 × 105 m/s depending on the temperature. In [12], the author gives the value of the effective conduction band density of states to 2.3 × 1018 cm−3.
In this investigation, the maximum temperature of the diode package is considered. Because the TOP-3 package can withstand up to 175 °C, emission times focusing on room temperature (RT), on a range between 150 °C and 175 °C are studied. The emission time (Figure 3) τ shows a significant temperature-dependent kinetic. For example, τ is estimated to be 105 s for near-midgap states at 175 °C, whereas it is around 1015 s at RT. A study focusing on relatively shorter time constants (τ < 104 s), an accelerated carrier “de-trapping step” for 2 h at 150 °C is performed, enabling trapping levels to empty ~1.2 eV below the conduction band.
Finally, a time out of 250 s is observed between consecutive measurements so that the thermal equilibrium is reached, and OFF-state stress can be applied under the same conditions.
Using the precision B2902A source/measure unit, the integrated voltage/current 4-quadrant permits switching from high stress voltage up to 210 V to a forward current up to 3 A. At the same time, the use of a vortex tube and a heating element (Figure 1b) gives the possibility to vary the ambient temperature from 0 °C up to 150 °C. In order to prevent any voltage drifting, four-terminal sensing is used in the measurements and enables applying the desired voltage as close as possible to the device under test. The whole setup is controlled through LabVIEW software, permitting the automation of the previous stress setup.
In this paper, measurements under different voltage stresses and for different temperatures cases are performed. Voltage stresses from 0 V, which serves as a reference in our study, to −200 V by step of −50 V for 5 s are applied. Then, after the stress phase, the recovery time is observed by applying a forward voltage of 0.6 V for 500 s. Each of these runs is performed with a temperature varying from 25 °C to 150 °C by step of 25 °C with the carrier de-trapping step as exposed previously.

3. Results

3.1. Stress Degradation Studies and Temperature Dependance

In this subsection, the relation between electrical parameters degradation and temperature of GaN diodes is studied. For that reason, high stress voltage dependence is studied, and the influence of temperature during the stress process complements the investigation. For the purpose of this study, measurements are conducted close to the threshold voltage to obtain low dissipated power and limit, as much as possible, the influence of self-heating.
Using the vortex tube, Figure 4 presents the results obtained at 0 °C with the previous setup. Significant variation of the monitored current versus time can be observed with an apparent time constant depending on the amplitude of the voltage stress. For example, after a stress of −50 V the current stabilize for a shorter time (100 s) than after a stress of −200 V (400 s).
Figure 5 shows the evolution of the resistance in the recovery phase (RP) after applying different stresses for 5 s. The forward current is monitored versus time, and data from 100 s to 500 s are shown to emphasize the global tendency of the degradation.
An increase of the resistance indicating that the OFF-state voltage value plays an important role: without stress (0 V), current collapse is not as visible whereas after a stress of −200 V, the resistance value drastically increases (approximately 5 times higher). A causal relationship between the applied stress voltage and current collapse mechanisms can be established; the stress amplitude is directly related to the resistance increase. Naturally, the value of the resistance increases as a function of the applied stress attesting to a higher concentration of electrical active defects. This effect is described by the authors in [13] through the Equation (2) with the parameters (nT, t = 0) attributed to the initial concentration of filled traps and the emission rate.
n T t = n T t = 0 e e n t
At 125 °C (Figure 5b), a plateau phenomenon appears so that the temperature leads to a de-trapping effect, offsetting the impact related to the high stress voltage. Furthermore, the resistance decreases with time (100 s to 500 s), confirming and accrediting the thesis of a charge emission kinetics linked to time and temperature via the SRH process.
Figure 6 shows the dependence of the resistance with the trapping voltage and the case temperature. The range of temperature seems to have an important impact on the current flows: from 50 °C to 75 °C, the resistance increases or stabilizes and from 75 °C to 150 °C it decreases. On one hand, the decreasing current can be understood by the presence of a thermal resistance affecting the efficiency of the diode. On the other hand, the enhancement of the current can be explained by the emission of electrons due to the thermal excitation.
Additionally, voltage-dependence is less pronounced for higher temperatures. The curve lines appear to smooth out and merge to a common resistance value. This observation can be interpreted as a nearly total de-trapping within the studied area down to ~1.2 eV, below the conduction band. Based on SRH statistics, interpretation focusing on shallow levels can be investigated.

3.2. Trapping Phenomena Investigation

In order to better understand the trapping mechanism, a time-dependent analysis is proposed in this section by using an Arrhenius plot. Different methods are presented into the scientific literature [14,15,16]; the study uses the method proposed in [6,17]. For this analysis, 200 V voltage stress is studied because of a more pronounced evolution, and a case temperature varying from 50 °C to 150 °C is investigated. Respective waveforms are shown for several temperatures in Figure 7. The study starts by identifying the alteration into the normalized resistance which suggests the existence of a dominant de-trapping process:
  • A first, distinct de-trapping process (Figure 7) can be extracted. As the temperature increases, the dominant transients significantly speed up as the temperature increases; the time constant spectra at different temperatures show this acceleration very clearly.
  • A second less visible de-trapping process (Figure 7 inset) can also be extracted; a similar temperature-dependent behaviour can be observed.
Figure 7. Temperature-dependent normalized resistance measured after the OFF-state stress (VKA = 200 V for 5 s) from 50 °C to 150 °C and determination of the de-trapping processes.
Figure 7. Temperature-dependent normalized resistance measured after the OFF-state stress (VKA = 200 V for 5 s) from 50 °C to 150 °C and determination of the de-trapping processes.
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In order to obtain an accurate inflection point, the normalized resistance is derived and smoothed. For example, in Figure 8, the two peaks give a closer estimation of the different time constant values for the measurements at 75 °C.
The previous identification of the emission time constant τ and the used of the Arrhenius expression [18] given in Equation (3), permits the determination of the activation energy Ea. T indicates the temperature, k is the Boltzmann constant, σn is the trap capture cross section, vth is the carrier thermal velocity, Nc is the density of states in the conduction band and g is the degeneracy factor.
1 τ T ² = σ n A n g e E a k T     ln τ T 2 = E a k T ln σ n v t h N c g T 2
The parameter An is the product of the effective density of states by the thermal velocity; it can be calculated via the Equation (4) where m* and h are the electron effective mass and Planck’s constant.
A n = 2 2 π m * k h 2 3 2 3 k m *
By using theses equations, the activation energies and the capture cross section can be determined.
Figure 9 shows the Arrhenius plot and the fit made with the two distinct de-trapping processes. Two different activation energies can be deduced:
  • The first, closer from the conduction band is estimated to have an activation energy Ec—0.44 eV with a cross section σc of 6 × 10−21 cm2.
  • The second is estimated to have an activation energy of Ec—0.73 eV with a cross section σc of 4.3 × 10−18 cm2.
Figure 9. Arrhenius curves of ln(τT2) versus q/kT showing the activation energies.
Figure 9. Arrhenius curves of ln(τT2) versus q/kT showing the activation energies.
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Identifying the signature with the activation energy and the apparent cross section provides crucial information on the cause leading to a reduced steady-state or dynamic performance. Large numbers of reports have been reviewed in the literature [19,20,21,22,23,24,25,26,27,28,29] and are referenced into the Table 1, listed according to their activation energies and their apparent capture cross section.
Both distinct de-trapping processes presenting low values of the cross section can indicate defect points. However, arguments regarding the veracity of the capture cross section suggest that it is extremely sensitive to the measurement and that it is not a physical property of interface defects [30].
The first activation energy around 0.44 eV can be ascribed to different defects. Some authors suggest that its origin, still unclear, could possibly be related to the presence of hydrogen or carbon atoms [21]. However in [27], the authors suggest that in heavily carbon-doped devices, the measured time constant is mainly dominated by the transport through a defect band and not activation to the band edge; the activation energies would be, in this case, related to the transport process and not to the de-trapping process. Authors in [22] also indicate that oxygen in nitrogen substitutional position (ON) is known to be a deep donor at EC—0.44 eV.
The emission from a trap level with an energy Ea = 0.73 eV in the second de-trapping process energies are described as “typically ascribed to carbon acceptors in GaN” by the authors of [6,29].

4. Discussion

In this paper, an overview of the main trapping and degradation processes on innovative GaN packaged power diodes is proposed. Affecting the performance and the reliability of GaN components, a specific study regarding the dynamic RON and its case time-temperature dependence is conducted.
For the purpose of this investigation a stress test setup is developed, enabling current collapse measurements. The impact of high stress voltage in a wide temperature range is highlighted and gives credits to the charge capture/emission process via SRH mechanism. Using the Arrhenius law, current collapse is studied, contributing to the identification of different possible trap origins; two distinct de-trapping processes are identified with the first activation energy at 0.44 eV and another at 0.73 eV. Regarding the state-of-the-art, these different energies might be attributed to carbon, hydrogen, or oxygen related defects. Previously used in [4], the Vector Network Analyzer can give complementary measurements to investigate charge trapping influences in GaN diodes by using the methods proposed in [18].
Finally, the development of a stress test setup and the first understanding of trapping and de-trapping mechanisms gives the possibilities for new tests. In the future, the versatility of the setup could permit to perform measurements to higher voltage and/or current in order to complete the electric model proposed in [4] for the GaN power diodes. Pulse measurements could also be considered in order to get closer to switching conditions using the previous setup.

Author Contributions

Conceptualization, M.D., N.D. and E.O.; data curation, M.D., N.D. and E.O.; formal analysis, M.D. and N.D.; investigation, M.D., N.D. and E.O.; methodology, M.D., N.D.; resources, E.O and T.D.; software, M.D. and E.O.; supervision, N.D. and J.-C.D.J.; validation, N.D.; writing—original draft, M.D.; writing—review & editing, M.D., N.D., J.-C.D.J., L.P., E.O., N.I., B.E. and A.Y. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported by IPCEI French NANO 2022 program supporting the joint lab IEMN—STMicroelectronics.

Data Availability Statement

Not applicable.

Acknowledgments

This work has been supported by the certified PCMP platform (CHOP service) from Lille University (IEMN).

Conflicts of Interest

The authors declare no conflict of interest.

References

  1. Ma, C.-T.; Gu, Z.-H. Review of GaN HEMT Applications in Power Converters over 500 W. Electronics 2019, 8, 1401. [Google Scholar] [CrossRef]
  2. Nela, L.; Van Erp, R.; Kampitsis, G.; Yildirim, H.K.; Ma, J.; Matioli, E. Ultra-compact, High-Frequency Power Integrated Circuits Based on GaN-on-Si Schottky Barrier Diodes. IEEE Trans. Power Electron. 2020, 36, 1269–1273. [Google Scholar] [CrossRef]
  3. Kizilyalli, I.C.; Edwards, A.P.; Aktas, O.; Prunty, T.; Bour, D. Vertical Power p-n Diodes Based on Bulk GaN. IEEE Trans. Electron Devices 2014, 62, 414–422. [Google Scholar] [CrossRef]
  4. Martin, D.; Nicolas, D.; Loris, P.; Etienne, O.; Thierry, D.; Emmanuel, C.; Arnaud, Y.; Nadir, I.; Jean-Claude, D.-J. Characterization and modeling of 650V GaN diodes for high frequency power conversion. In Proceedings of the 2021 IEEE Design Methodologies Conference (DMC), Bath, UK, 14–15 July 2021; pp. 1–5. [Google Scholar] [CrossRef]
  5. Li, K.; Evans, P.; Johnson, M. GaN-HEMT dynamic ON-state resistance characterisation and modelling. In Proceedings of the 2016 IEEE 17th Workshop on Control and Modeling for Power Electronics (COMPEL), Trondheim, Norway, 27–30 June 2016; pp. 1–7. [Google Scholar] [CrossRef]
  6. Meneghini, M.; Tajalli, A.; Moens, P.; Banerjee, A.; Zanoni, E.; Meneghesso, G. Trapping phenomena and degradation mechanisms in GaN-based power HEMTs. Mater. Sci. Semicond. Process. 2018, 78, 118–126. [Google Scholar] [CrossRef]
  7. Zubrilov, A.S.; Nikolaev, V.I.; Tsvetkov, D.V.; Dmitriev, V.A.; Irvine, K.G.; Edmond, J.A.; Carter, C.H. Spontaneous and stimulated emission from photopumped GaN grown on SiC. Appl. Phys. Lett. 1995, 67, 533–535. [Google Scholar] [CrossRef]
  8. Wu, Y.; Chen, C.-Y.; del Alamo, J.A. Activation energy of drain-current degradation in GaN HEMTs under high-power DC stress. Microelectron. Reliab. 2014, 54, 2668–2674. [Google Scholar] [CrossRef]
  9. Joh, J.; del Alamo, J.A. RF power degradation of GaN High Electron Mobility Transistors. In Proceedings of the 2010 International Electron Devices Meeting, San Francisco, CA, USA, 6–8 December 2010; p. 4. [Google Scholar] [CrossRef]
  10. Mizue, C.; Hori, Y.; Miczek, M.; Hashizume, T. Capacitance–Voltage Characteristics of Al2O3/AlGaN/GaN Structures and State Density Distribution at Al2O3/AlGaN Interface. Jpn. J. Appl. Phys. 2011, 50, 21001. [Google Scholar] [CrossRef]
  11. Saini, D.K. Gallium Nitride: Analysis of Physical Properties and Performance in High-Frequency Power Electronic Circuits. Wright State University. 2015. Available online: https://etd.ohiolink.edu/apexprod/rws_olink/r/1501/10?clear=10&p10_accession_num=wright1438013888 (accessed on 28 September 2022).
  12. Sabui, G.; Parbrook, P.J.; Arredondo-Arechavala, M.; Shen, Z.J. Modeling and simulation of bulk gallium nitride power semiconductor devices. AIP Adv. 2016, 6, 55006. [Google Scholar] [CrossRef]
  13. Kasani, S.P.K. Characterization of Defects on MOCVD Grown Gallium Nitride Using Transient Analysis Techniques. Master’s Thesis, West Virginia University, Morgantown, WV, USA, 2015. [Google Scholar] [CrossRef]
  14. Jin, D.; del Alamo, J.A. Methodology for the Study of Dynamic ON-Resistance in High-Voltage GaN Field-Effect Transistors. IEEE Trans. Electron Devices 2013, 60, 3190–3196. [Google Scholar] [CrossRef]
  15. Florovič, M.; Škriniarová, J.; Kováč, J.; Kordoš, P. Trapping Analysis of AlGaN/GaN Schottky Diodes via Current Transient Spectroscopy. Electronics 2016, 5, 20. [Google Scholar] [CrossRef]
  16. Polyakov, A.Y.; Smirnov, N.B.; Shchemerov, I.V.; Yang, J.; Ren, F.; Lo, C.-F.; Laboutin, O.; Johnson, J.W.; Pearton, S.J. Trapping Phenomena in InAlN/GaN High Electron Mobility Transistors. ECS J. Solid State Sci. Technol. 2018, 7, Q1–Q7. [Google Scholar] [CrossRef]
  17. Lorin, T.; Ghibaudo, G.; Gaillard, F.; Vandendaele, W.; Gwoziecki, R.; Baines, Y.; Biscarrat, J.; Jaud, M.-A.; Gillot, C.; Charles, M.; et al. On the Understanding of Cathode Related Trapping Effects in GaN-on-Si Schottky Diodes. IEEE J. Electron Devices Soc. 2018, 6, 956–964. [Google Scholar] [CrossRef]
  18. Raja, P.V.; Subramani, N.K.; Gaillard, F.; Bouslama, M.; Sommet, R.; Nallatamby, J.-C. Identification of Buffer and Surface Traps in Fe-Doped AlGaN/GaN HEMTs Using Y21 Frequency Dispersion Properties. Electronics 2021, 10, 3096. [Google Scholar] [CrossRef]
  19. Lyons, J.L.; Wickramaratne, D.; Van de Walle, C.G. A first-principles understanding of point defects and impurities in GaN. J. Appl. Phys. 2021, 129, 111101. [Google Scholar] [CrossRef]
  20. Reshchikov, M.A.; Usikov, A.; Helava, H.; Makarov, Y.; Prozheeva, V.; Makkonen, I.; Tuomisto, F.; Leach, J.H.; Udwary, K. Evaluation of the concentration of point defects in GaN. Sci. Rep. 2017, 7, 9297. [Google Scholar] [CrossRef]
  21. De Santi, C.; Buffolo, M.; Rossetto, I.; Bordignon, T.; Brusaterra, E.; Caria, A.; Chiocchetta, F.; Favero, D.; Fregolent, M.; Masin, F.; et al. Review on the degradation of GaN-based lateral power transistors. e-Prime 2021, 1, 100018. [Google Scholar] [CrossRef]
  22. Caesar, M.; Dammann, M.; Polyakov, V.; Waltereit, P.; Bronner, W.; Baeumler, M.; Quay, R.; Mikulla, M.; Ambacher, O. Generation of traps in AlGaN/GaN HEMTs during RF-and DC-stress test. In Proceedings of the 2012 IEEE International Reliability Physics Symposium (IRPS), Anaheim, CA, USA, 15–19 April 2012; pp. CD.6.1–CD.6.5. [Google Scholar] [CrossRef]
  23. Soh, C.B.; Chua, S.J.; Lim, H.F.; Chi, D.Z.; Liu, W.; Tripathy, S. Identification of deep levels in GaN associated with dislocations. J. Phys. Condens. Matter 2004, 16, 6305–6315. [Google Scholar] [CrossRef]
  24. Ferrandis, P.; Charles, M.; Gillot, C.; Escoffier, R.; Morvan, E.; Torres, A.; Reimbold, G. Effects of negative bias stress on trapping properties of AlGaN/GaN Schottky barrier diodes. Microelectron. Eng. 2017, 178, 158–163. [Google Scholar] [CrossRef]
  25. Fang, Z.-Q.; Look, D.C.; Wang, X.-L.; Han, J.; Khan, F.A.; Adesida, I. Plasma-etching-enhanced deep centers in n-GaN grown by metalorganic chemical-vapor deposition. Appl. Phys. Lett. 2003, 82, 1562–1564. [Google Scholar] [CrossRef]
  26. Fang, Z.-Q.; Hemsky, J.W.; Look, D.C.; Mack, M.P.; Molnar, R.J.; Via, G.D. Electron Irradiation Induced Trap In N-Type Gan. MRS Proc. 1997, 482, 881. [Google Scholar] [CrossRef]
  27. Yang, F.; Uren, M.J.; Gajda, M.; Dalcanale, S.; Karboyan, S.; Pomeroy, J.W.; Kuball, M. Suppression of charge trapping in ON-state operation of AlGaN/GaN HEMTs by Si-rich passivation. Semicond. Sci. Technol. 2021, 36, 95024. [Google Scholar] [CrossRef]
  28. Fang, Z.-Q.; Look, D.C.; Jasinski, J.; Benamara, M.; Liliental-Weber, Z.; Molnar, R.J. Evolution of deep centers in GaN grown by hydride vapor phase epitaxy. Appl. Phys. Lett. 2001, 78, 332–334. [Google Scholar] [CrossRef]
  29. Lyons, J.L.; Janotti, A.; Van de Walle, C.G. Effects of carbon on the electrical and optical properties of InN, GaN, and AlN. Phys. Rev. B 2014, 89, 035204. [Google Scholar] [CrossRef]
  30. Ryan, J.T.; Matsuda, A.; Campbell, J.P.; Cheung, K.P. Interface-state capture cross section—Why does it vary so much? Appl. Phys. Lett. 2015, 106, 163503. [Google Scholar] [CrossRef]
Figure 1. (a) Schematic of the GaN-on-Si Diode; (b) Characterization board designed for the diode.
Figure 1. (a) Schematic of the GaN-on-Si Diode; (b) Characterization board designed for the diode.
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Figure 3. Emission time constant τ at GaN band gap as a function of trap energy ET (based on the Shockley-Read-Hall statistic model presented in [10]).
Figure 3. Emission time constant τ at GaN band gap as a function of trap energy ET (based on the Shockley-Read-Hall statistic model presented in [10]).
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Figure 4. Forward normalized current measured after the OFF-state stress (VKA= [0; 200 V] for 10 s) at 0 °C.
Figure 4. Forward normalized current measured after the OFF-state stress (VKA= [0; 200 V] for 10 s) at 0 °C.
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Figure 5. (a) Dependence of the resistance on trapping voltage at 25 °C for different time constant (t = [100 s; 500 s] on the RP; (b) Dependence of the resistance on trapping voltage at 125 °C for different time constant (t = [100 s; 500 s] on the RP.
Figure 5. (a) Dependence of the resistance on trapping voltage at 25 °C for different time constant (t = [100 s; 500 s] on the RP; (b) Dependence of the resistance on trapping voltage at 125 °C for different time constant (t = [100 s; 500 s] on the RP.
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Figure 6. Dependence of resistance on trapping voltage and temperature at 250 s.
Figure 6. Dependence of resistance on trapping voltage and temperature at 250 s.
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Figure 8. Derivative of the normalized resistance measured after the OFF-state stress at 75 °C.
Figure 8. Derivative of the normalized resistance measured after the OFF-state stress at 75 °C.
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Table 1. Level features (Ea: activation energy, σc: apparent capture cross section) of defects and impurities in GaN with a level between Ec—eV and Ec—eV.
Table 1. Level features (Ea: activation energy, σc: apparent capture cross section) of defects and impurities in GaN with a level between Ec—eV and Ec—eV.
Ea (eV)σc (cm²)Identification
0.14–0.57-ON [21,22]
0.37–0.610−17Si [21,23,24]
0.41–0.4510−14VN-related defect [24,25,26]
0.44–0.48-Transport process [27]
0.72–0.8-Associated with TD [24,25,28]
0.6–0.910−19C [6,29]
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Doublet, M.; Defrance, N.; Okada, E.; Pace, L.; Duquesne, T.; Emilien, B.; Yvon, A.; Idir, N.; De Jaeger, J.-C. Investigation of Current Collapse Mechanism on AlGaN/GaN Power Diodes. Electronics 2023, 12, 2007. https://0-doi-org.brum.beds.ac.uk/10.3390/electronics12092007

AMA Style

Doublet M, Defrance N, Okada E, Pace L, Duquesne T, Emilien B, Yvon A, Idir N, De Jaeger J-C. Investigation of Current Collapse Mechanism on AlGaN/GaN Power Diodes. Electronics. 2023; 12(9):2007. https://0-doi-org.brum.beds.ac.uk/10.3390/electronics12092007

Chicago/Turabian Style

Doublet, Martin, Nicolas Defrance, Etienne Okada, Loris Pace, Thierry Duquesne, Bouyssou Emilien, Arnaud Yvon, Nadir Idir, and Jean-Claude De Jaeger. 2023. "Investigation of Current Collapse Mechanism on AlGaN/GaN Power Diodes" Electronics 12, no. 9: 2007. https://0-doi-org.brum.beds.ac.uk/10.3390/electronics12092007

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