Next Article in Journal
A Long-Range 2.4G Network System and Scheduling Scheme for Aquatic Environmental Monitoring
Previous Article in Journal
Parkinson’s Disease Detection from Drawing Movements Using Convolutional Neural Networks
 
 
Font Type:
Arial Georgia Verdana
Font Size:
Aa Aa Aa
Line Spacing:
Column Width:
Background:
Article

Simulation-Based System-Level Conducted Susceptibility Testing Method and Application to the Evaluation of Conducted-Noise Filters

1
Dept. Electronic Communication Engineering, Kwangwoon University, 20 Kwangwoon-ro, Nowon-gu, Seoul 01897, Korea
2
Radio & Satellite Research Division, Electronics and Telecommunications Research Institute, 218 Gajeong-ro, Yuseong-gu, Daejeon 34129, Korea
*
Author to whom correspondence should be addressed.
Submission received: 18 July 2019 / Revised: 14 August 2019 / Accepted: 16 August 2019 / Published: 17 August 2019
(This article belongs to the Section Microwave and Wireless Communications)

Abstract

:
In this paper, a simulation-based system-level conducted susceptibility (CS) testing method for a wireless power transfer (WPT) system is proposed. The proposed method employs 3-dimensional electromagnetic (3D EM) models as well as equivalent circuit models to replace the measurement-based CS testing method based on the International Electrotechnical Commission 61000-4-6 standard. The conducted-noise source and equipment under test (EUT) are modeled in a circuit simulator. The conduction path, bulk current injection probe, and calibration jig are modeled using the 3D field simulator. A simple WPT system is designed and fabricated as the EUT for the CS test. The proposed method is successfully verified by comparing the voltage waveforms with measurement-based CS testing method. Additionally, as an application of the proposed method, a simulation-based evaluation of the conducted-noise filters is conducted. By using the proposed method, it is expected that the time and cost expense of setting up the test setup, as well as the testing procedure for the conventional measurement-based CS testing, will be drastically reduced. In addition, the proposed method can be used to estimate the conducted immunity of a system in the early stage of the design cycle prior to production.

1. Introduction

Electromagnetic compatibility (EMC) tests for electronic devices have been performed to ensure the proper operation of electronic devices in environments with electromagnetic interference. Among the various EMC tests, conducted susceptibility (CS) tests are performed to examine the immunity of an electronic device against an external interference injected on the conduction path, such as a power cable or a signal line of an electronic device. For immunity testing, a measurement-based evaluation method based on the International Electrotechnical Commission (IEC) standard is currently used as a CS testing method. According to the standard, the CS test for a single integrated circuit (IC) and a system are well defined in the IEC 62132 and IEC 61000-4-6 standards, respectively [1,2]. These testing methods are based on measurements, which are inefficient with regard to the time and cost required for setting up the test setup, as well as the testing procedure. To overcome the inefficiencies, simulation-based CS testing methods should be employed.
Recently, to overcome the inefficiencies, numerous simulation-based IC-level immunity testing methods for a single IC have been proposed [3,4,5,6,7,8]. To predict the immunity of a victim IC to the conducted noise, the simulation-based testing methods commonly employ the equivalent circuit models for the components. For the CS testing method for automotive components, which requires accurate common-mode impedance and current estimation, 3-dimensional electromagnetic analysis is employed to model the coupling network between the injection probe and IC terminals. However, to achieve the system-level CS testing, which comprises numbers of active ICs and a large-scale noise coupling network, both equivalent circuit models for the equipment under test (EUT), a noise injection device, conductive-noise source and 3-dimensional electromagnetic (3D EM) models for the noise conduction path should be combined and interact with each other.
In this paper, a simulation-based system-level CS testing method based on the IEC 61000-4-6 standard is proposed. The present paper is an extended version of a preliminary conference report [9] with a significant improvement in terms of modeling, validation, and application. The bulk current injection (BCI) probe and the calibration jig used to inject the conducted noise into the power cable of the EUT were modeled using a 3D field simulator and validated by the input impedance and transmission loss measurement. The noise source, EUT, and parasitics in the measurement-based test setup were modeled in a circuit simulator based on the equivalent circuit model. As the EUT, a simple wireless power transfer (WPT) system was designed and employed for the proposed testing method. The proposed method was verified by comparing the obtained voltage waveforms with those of the measurement-based CS testing method based on IEC 61000-4-6. As an available application of the proposed method, a simulation-based conducted-noise filter evaluation was conducted. To evaluate the conducted-noise filters, a figure of merit (FOM), which is a function of the frequency and the pk–pk voltage amplitude of the received-voltage waveforms in the WPT system, is proposed. Using the proposed FOM, the performance of the conducted-noise filters was evaluated via the simulation- and measurement-based CS testing method. Based on the CS test results, it is expected that the proposed method is useful for estimating the impact of conducted noise on WPT systems. The proposed method can be applied to the evaluation of a system itself as well as EMC protection devices in the early stage of the product development cycle before the manufacturing stage.

2. System-Level Conducted Susceptibility Testing Standard

Figure 1 shows a system-level CS test setup with the BCI method based on the IEC 61000-4-6 standard. The test setup is composed of a signal generator and power amplifier as a noise source, auxiliary equipment (AE), a BCI probe, a noise injecting device, and the EUT. A signal generator which is capable of covering the frequency band of interest from 150 kHz to 80 MHz and of being amplitude-modulated by a 1 kHz sine wave with a modulation depth of 80% is required [2]. Additionally, the power amplifier may be necessary if the conducted noise is insufficient to meet the noise level as specified in the IEC standard. To use the BCI probe, a decoupling device is used to protect the AE against the impact of conducted noise to ensure the proper operation of the EUT. In the IEC standard, the operation status of the EUT is evaluated depending on the conducted noise. Because the standard is based on measurement, the procedures for setting up the test setup and the testing are inefficient with regard to time and cost.

3. Proposed Simulation-Based Conducted Susceptibility Testing Method

To overcome the inefficiencies of the measurement-based CS testing method, a simulation-based system-level CS testing method is proposed. The proposed method employs 3D EM models of a BCI probe and a calibration jig modeled in an ANSYS High Frequency Structure Simulator (HFSS) to inject the conducted noise into the power cable of the EUT. In addition, equivalent circuit models for a noise source as well as an EUT are presented and combined with the 3D EM models in a circuit simulator to complete the simulation-based CS test platform.

3.1. BCI Probe Modeling

To inject the conducted noise into the power cable of the EUT, a BCI probe is used in the proposed method. Because the amplitude of the conducted noise depends on the transfer efficiency of the BCI probe, accurate modeling of the BCI probe is required. In the proposed method, a 3D EM model of a Teseq CIP9136A BCI probe is used.
As the physical properties of the 3D EM model, the frequency-dependent relative permeability of the ferrite core should be modeled in advance [10,11,12]. In the actual probe, the relative permeability of the ferrite core affects the frequency response of the BCI probe. As frequency increases, the relative permeability of ferrite drops significantly and the magnetic loss of ferrite increases. Figure 2a shows the cross-sectional view of the ferrite core installed inside the probe, where A (mm2) is the cross-sectional area and l (mm) is the circular length, and the associated relative permeability depending on the dimensions is shown in Equation (1) [13]. To model the frequency dependence of the actual probe, the input impedance of the BCI probe (Zprobe), which is shown in Equation (2), is measured by a vector network analyzer (VNA) and applied to Equation (1), resulting in the frequency-dependent relative permeability shown in Equation (3). According to the physical dimensions of the actual probe, the cross-sectional area A and the circular length l are set to 10 cm2 and 7π cm, respectively.
μ r   =   L 4 π N 2 × l A × 10 10
Z p r o b e = j ω L   [ Ω ]
μ r ( ω ) =   μ r ( ω )   j μ r ( ω ) =   l Z p r o b e j ω 4 π N 2 A × 10 10
To apply the extracted relative permeability to the 3D EM model of the probe, the Debye dispersion model given in Equation (4) is applied. The sum of X n represents the initial value of the relative permeability when the frequency is zero, and τ n represents the relaxation time of the ferrite core which is related to the frequency dependence of the permeability. The values of X n and τ n can be obtained through iterative fitting procedures by comparing the extracted permeability and the Debye dispersion model [10]. In this work, the complete fifth-order Debye dispersion model is presented as in Equation (5) and compared with the extracted permeability as shown in Figure 2b. The red and blue lines represent the extracted permeability and the Debye dispersion model, respectively, presenting a noticeable correlation between them with a maximum error of 8.82 percent. The obtained Debye model is applied to the 3D EM model of the probe as the frequency-dependent relative permeability.
μ r ( ω ) =   1   +   n = 1 N X n 1 + j ω τ n
μ r ( ω ) = 1 + 1350 1 + j ω ( 2 × 10 6 ) +   2000 1 + j ω ( 7.3 × 10 7 ) +   700 1 + j ω ( 2 × 10 7 ) +   320 1 + j ω ( 5 × 10 8 ) + 150 1 + j ω ( 2 × 10 8 )
To improve the accuracy of the 3D EM model, the conductivity of the ferrite core is extracted via resistance measurement. Equation (6) represents the analytic model for the conductivity of a toroidal-shaped structure [14]. The measurement of the resistance between both ends of the ferrite core is conducted based on multipoint measurement using a digital multimeter, and the measured resistance is applied to Equation (6) to obtain the measurement-based conductivity of the ferrite core. The measured resistance and the associated conductivity are 11.04 (Ω) and 1.97 (S/m), respectively, and the conductivity is applied to the 3D EM model.
σ   =   π 2 R h ln ( c / b ) [ S / m ]
The 3D EM model of the BCI probe consisting of an outer shield and inner ferrite cores with a turn ratio of 1:1 is shown in Figure 3a. The height, outer diameter, and inner diameter of the BCI probe are modeled as having identical dimensions to the actual probe, and a coaxial port with 50 Ω is modeled as the input port [15]. The simulated and measured input impedance of the BCI probe is shown in Figure 3b. The red and blue lines represent the input impedance of the actual probe and 3D EM model, respectively. The input impedance of the 3D EM model exhibits a noticeable correlation with the measured input impedance of the actual probe with a maximum error of 6.55 percent up to 5 MHz, which is the carrier frequency of the conducted noise in this work. Based on this result, the 3D EM model can replace the actual probe in the simulation-based CS test platform.

3.2. Calibration Jig Modeling

As specified in the IEC standard, a calibration jig is required to inject the appropriate conducted noise through the BCI probe. In this work, a 3D EM model of a Teseq PCJ9201B is used to calibrate the conducted noise source. The 3D EM model of the calibration jig, which is modeled as having identical dimensions to the actual jig, is shown in Figure 4a, and the transmission loss of the calibration jig is compared to validate the 3D EM model. The measurement and simulation results of the transmission loss are shown in Figure 4b. The results indicate that at 300 MHz, the transmission loss of the 3D EM model is approximately 0.18 dB lower than that of the actual jig. However, because 300 MHz is not the frequency range of interest for the IEC standard, the 3D EM model is used to set the test level of the conducted noise in the proposed method.
With the 3D EM model of the calibration jig, the test level applied to the BCI probe must be set prior to the CS test. The calibration procedure specified in the IEC standard is as follows: with the BCI probe installed inside the calibration jig, one port of the calibration jig should be terminated with a 50 Ω coaxial load and the other with a power attenuator, and the power attenuator should be connected to measuring equipment with a 50 Ω input impedance. In this stage, an unmodulated signal is injected to the BCI probe from the signal generator. The output level of the signal generator must be increased until the voltage level measured by the measuring equipment reaches half of the desired test level given in Table 1 through the calibration jig. Finally, the calibrated noise is amplitude-modulated with a 1 kHz sine wave, which is specified in the standard, to simulate the actual threats of the conducted noise. In the proposed method, conducted noise with test level 1 and a carrier frequency of 5 MHz is used.

3.3. Noise Source Modeling

In this section, a method for conducted-noise injection through the BCI probe and the modeling of a noise source to generate the conducted noise is presented. To inject the conducted noise to the power cable of the EUT through the BCI probe, three-port S-parameters with the power cable of the EUT and the BCI probe on the reference ground plane are modeled, as shown in Figure 5a. The power cable of the EUT is modeled by copper wire with a diameter of 0.6 mm and is installed at a distance of 40 mm from the reference ground plane; thus, it is located at the center of the BCI probe to minimize the capacitive coupling between BCI probe and copper wire. In the three-port S-parameters with the BCI probe, the noise source comprising the three voltage sources is connected to the input port of the BCI probe.
To simulate the actual threats of the conducted noise as specified in the IEC standard, a signal generator that can generate the 1 kHz sine wave with 80% amplitude modulated radio-frequency (RF) signal is required. In the proposed method, the signal generator is modeled by three voltage sources ( V C , V m 1 , and V m 2 ) based on the superposition principle. The voltage source V C is a carrier source of conducted noise and operates at a carrier frequency. The operating frequencies of the remaining modulation sources V m 1 and V m 2 are set as ±1 kHz from the carrier frequency to achieve 1 kHz modulation. The power of the modulation sources is set as 40% of that of the carrier source to achieve 80% amplitude modulation. In this work, the conducted noise with test level 1 and a carrier frequency of 5 MHz is used among those available for the case studies. To satisfy the test level 1 of conducted noise specification, the amplitudes of the carrier and modulated sources are set as 50.05 and 20.02 V, respectively, by using the 3D EM model of the calibration jig and the BCI probe. Additionally, the operating frequencies of the V C , V m 1 , and V m 2 are set as 5, 4.999, and 5.001 MHz, respectively. With the calibrated noise source, the modulated conducted noise applied to the power cable of the EUT is shown in Figure 5b. In the proposed method, the conducted noise generated from the calibrated noise source is injected into the power cable of the EUT to evaluate the immunity to the conducted noise of the EUT.

3.4. EUT Modeling

A simple WPT system composed of a transmitter circuit, coils, and a receiver circuit is employed and modeled as the EUT for the simulation-based CS test. The transmitter circuit of the WPT system is composed of an NE555 oscillator and a metal–oxide semiconductor field-effect transistor (MOSFET) amplifier, and the receiver circuit is composed of a simple full-bridge rectifier circuit. In the transmitter circuit, a 125 kHz clock signal is generated from the NE555 oscillator and amplified by the MOSFET amplifier. The amplified waveforms are transferred to the receiver coil wirelessly via electromagnetic induction. The transferred waveforms are rectified by a full-bridge rectifier circuit and then terminated at the load resistance in the receiver circuit. The conventional SPICE model of the NE555 oscillator and MOSFET transistors is applied to complete the EUT modeling.
The complete simulation-based CS test platform comprising the BCI probe, noise source, and EUT is shown in Figure 6. The conducted noise, after being amplified by the power amplifier, is injected into the power cable of the WPT system through the BCI probe, which is modeled as the three-port S-parameters extracted by using a 3D EM solver as described in the previous section. According to the IEC standard, the decoupling components are required to protect the AE from the conducted noise. In the proposed method, the decoupling devices are modeled as 15.6 µH inductance and 47 nF capacitance and applied between the BCI probe and the +5V voltage source. As the EUT of the proposed method, the transmitter circuits of the WPT system are modeled by using the conventional SPICE model of the NE555 oscillator, MOSFET transistors, and the passive components which are set to an operating frequency of 125 kHz. To transmit power wirelessly, the coupled WPT coils are applied to the circuit simulator as S-parameters and a resonant capacitor of 48 nF is applied to maximize the transfer efficiency. In the receiver circuits, a full-bridge rectifier circuit is used to obtain the DC output voltage with an RC load. The parasitic elements of the measurement-based CS test setup are modeled as the 0.27 µH inductance between the reference ground plane and the ground port of the EUT. Additionally, the cable inductance of the −5 V voltage source is applied to the circuit simulator as the 0.9 µH inductance to achieve a high accuracy in the simulation-based CS test. The proposed method is completed in the circuit simulator and verified through comparison with the measurements.

4. Experimental Verification

Figure 7a illustrates a measurement-based CS testing method based on the IEC standard used to verify the compatibility of the proposed method with the international standard. The measurement-based CS test setup is composed of an Agilent 8664A to generate conducted noise, as specified in the IEC standard. To amplify the conducted noise, an ENI603L power amplifier with a gain of 40 dB from 800 kHz to 1 GHz is used. A Teseq CIP9136A BCI probe is employed to inject the conducted noise into the power cable of the EUT. Waveforms in the transmitter and receiver circuits that depend on conducted noise injection are measured by digital oscilloscopes. Figure 7b shows the fabricated WPT system as the EUT for the CS test. The WPT system is fabricated on an FR-4 substrate with a thickness of 0.8 mm and is designed to operate at 125 kHz. To maximize the transfer efficiency of the WPT system, 31.5 µH coils and 48 nF resonance capacitors are used, and the distance between the coils is set as 1 cm.
The transmitted-voltage waveforms depending on the conducted-noise injection are shown in Figure 8b. With the impact of the conducted noise, the pk–pk voltage amplitude and the frequency of the transmitted-voltage waveform fluctuates, and the voltage peaks and valleys are obtained at intervals of 1 ms, which is associated with the modulating frequency of the conducted-noise specification. To verify the proposed method, the peaks and valleys of the waveform are sampled by the oscilloscope and compared with those of the voltage waveforms for the simulation-based CS testing method. Figure 9 shows the simulation and measurement results for the sampled voltage waveforms at the transmitting coil depending on the conducted-noise injection. The waveforms are accumulated with a timing window associated with the center frequency which is shifted from the operating frequency due to the conducted noise impact. The impact of the conducted noise on the transmitter circuits is shown in Figure 9a,b. With the conducted-noise injection, the pk–pk voltage amplitude is severely degraded from 21.95 to 20.13 V, and the operating frequency is shifted from 125 to 138.4 kHz in the measurement-based test. In the simulation results, the transmitted-voltage waveforms are degraded from 18.23 to 14.9 V with the operating frequency shifting effect. Even though the absolute values have discrepancies caused by the parasitics of the measurement-based CS test setup and the reliability of the active circuit models, the results of the proposed method exhibit a good correlation with the measurement results in terms of the degradation tendency due to conducted noise.
Regarding the receiver side, the CS test results for the voltage waveforms at the receiving coil are shown in Figure 10. With the conducted noise, the pk–pk voltage amplitude of the receiver coil is degraded by 13% in the measurement-based CS test and 11% in the simulation-based CS test. Similar to the case of the transmitter circuits, due to the conducted noise, the measured frequency of the received-voltage waveform increases from 125 to 138.4 kHz, and the simulated frequency of the received-voltage waveform increases from 125 to 131.6 kHz.
In the same manner, the DC output voltage is drastically degraded from 4.28 to 4.16 V (by 2.8%) and from 4.63 to 4.35 V (by 6%) in the measurement- and simulation-based CS tests, respectively. Table 2 summarizes the comparison results of the measured and simulated voltage waveforms. Although the absolute values of the simulation-based test results have discrepancies, which can be exacerbated depending on the modeling for the parasitic element of the measurement-based test setup and the SPICE models for the active components, the impact of the conducted noise in the simulation-based test is verified by the measurement results. According to the comparison results, it is confirmed that the proposed simulation-based CS testing method is useful for estimating the impact of conducted noise on WPT systems.
The parasitic modeling is significant to achieve the reliability of the proposed simulation-based system-level CS testing method, considering the measurement setup is physically large enough to affect the AC simulation results in even the low-frequency region. Figure 11 shows the sensitivity analysis of the operating frequency and the pk–pk voltage amplitude of the received-voltage waveforms depending on the wire inductance. The optimal values of the parasitic inductance for the GND and −VDD connecting wires are experimentally obtained as 0.27 uH and 0.9 uH, respectively. Without proper modeling of the parasitics in the measurement setup, it is difficult to achieve the correlation between the measurement and simulation results. However, once the parasitics are set to the optimal values, they can be utilized with a variety of EUTs with significant reliability from the proposed method.

5. Application to the Evaluation of Conducted-Noise Filters

As an application of the proposed method, a simulation-based conducted-noise filter evaluation has been conducted. Conducted-noise filters are typically used to prevent the conducted noise in a system by applying them to the power cable of the system. To evaluate conducted-noise filters with the proposed CS testing method, the conducted-noise filters are installed between the BCI probe and the WPT system to alleviate the impact of conducted noise on the system. To quantify the effectiveness of the filters, an FOM which presents the performance of the conducted-noise filter is proposed. With the proposed FOM, the simulation-based conducted-noise filter evaluation was conducted and verified by measurement.
The conducted-noise filters with different insertion losses are depicted in Figure 12a. The insertion loss of the filters was measured as the transmission loss using a VNA, and the transmission-loss measurement results with a port impedance of 50 Ohms are shown in Figure 12b. The results indicate that the transmission losses of filters 1, 2, and 3 at 5 MHz were −5.5, −6.9, and −11.9 dB, respectively. According to the transmission losses, it is expected that a larger conducted-noise filter has a better noise-suppression effect. The conducted-noise filters and the measured S-parameter models of the filters were applied between the power cable of the WPT system and the BCI probe in the measurement- and simulation-based CS test platform, respectively, and the voltage waveforms of each CS testing method are compared to validate the applicability of the proposed method to the component evaluation.
The impact of the conducted noise on the receiver circuits in the measurement-based evaluation is shown in Figure 13a. As observed previously, the operating frequency and received pk–pk voltage amplitude were degraded from their normal operating values. With the conducted-noise filters, the received-voltage waveforms tended to be restored before the conducted noise was injected, depending on the noise-suppression efficiency. The received-voltage waveforms for the different conducted-noise filters in the simulation-based evaluations are shown in Figure 14. In the proposed method, the filters are modeled as two-port S-parameters and applied between the BCI probe model and the EUT as in the measurement setup. As with the measurement-based evaluation results, the impact of the conducted noise decreased as the noise-suppression efficiency of the filter increased.
The measurement- and simulation-based evaluation results for the DC output amplitude in the receiver circuits are shown in Table 3. In both the measurement- and simulation-based evaluations, the WPT system had the highest DC output voltage when filter 3 was applied and the least degradation due to the conducted noise. The evaluation results indicate that the impact of conducted noise on the WPT system decreased as the noise-suppression efficiency of the conducted-noise filter increased.
To quantitatively evaluate the performance of the conducted-noise filters, an FOM, which is a function of the pk–pk voltage amplitude and frequency of the received-voltage waveforms, is proposed. The measurement and simulation results for the received waveforms are summarized in Table 4. The conventional FOM has a larger value as the performance of the evaluation object is better. To reflect this characteristic, the voltage and frequency of the received-voltage waveforms are applied to the numerator and denominator of the proposed FOM derived in Equation (7), respectively, to increase or reduce the value of the FOM depending on the impact of conducted noise on the receiver circuits. For example, the numerator defined by the ratio between the pk–pk voltage amplitude with and without conducted-noise has a range of less than 1 because the amplitude decreases with the noise injection. In the same manner, the denominator has a range of more than 1 with conducted noise because the frequency of the waveforms is shifted to a higher frequency with the noise. By their combination, the proposed FOM has a value of 1 in an ideal case without noise, or a lower value depending on the noise injection strength. Figure 15 shows the performance of the conducted filter evaluated using the proposed FOM based on the measurement and simulation results presented in Table 4.
FOM   =   V R x ( w i t h   n o i s e ) / V R x ( w i t h o u t   n o i s e ) F R x ( w i t h   n o i s e ) / F R x ( w i t h o u t   n o i s e )
As can be observed in the evaluation results, the simulation results have discrepancies compared to the measurement. The error of the evaluation result can be exacerbated depending on the modeling for the parasitic element of the measurement-based test setup and the SPICE models for the active components, as discussed in the previous section. However, the tendency of the FOM depending on the shielding efficiency of the filter in the simulation-based filter evaluation was successfully verified by the measurement.

6. Conclusions

In this paper, a simulation-based system-level CS testing method for a WPT system was proposed. The simulation-based CS testing method employs 3D EM models and equivalent circuit models replacing the measurement-based CS testing method based on the IEC standard. The BCI probe and calibration jig in the specification were modeled as 3D EM models and verified by measurements with a maximum error of 6.55% and 0.18 dB, respectively. The conducted-noise sources and EUT were modeled in a circuit simulator as equivalent-circuit models. A WPT system was fabricated and modeled as the EUT for the measurement- and simulation-based CS testing methods. The proposed method was verified by comparing the voltage waveforms with those of the measurement-based CS test results. Additionally, a simulation-based conducted-noise filter evaluation was conducted to confirm the applicability of the proposed method to the evaluation of EMC protection devices. To quantitatively evaluate the performance of the conducted-noise filters, an FOM related to the received-voltage waveforms was proposed. The conducted-noise filters were applied to the proposed and measurement-based CS testing methods and evaluated according to the proposed FOM. According to the evaluation results, the tendency of the FOM in the simulation-based CS testing method was successfully verified by the measurements. It is expected that the proposed simulation-based CS testing method is useful for estimating the impact of conducted noise on WPT systems, and the inefficiencies of the measurement-based CS testing method can be improved by the proposed simulation-based CS testing method.

Author Contributions

Conceptualization, J.J., S.I.K., J.H.K., and E.S.; Methodology, J.J. and E.S; Validation, J.J. and E.S.; Formal analysis, J.J.; Investigation, J.J. and E.S.; Writing—original draft preparation, J.J.; Writing—review and editing, E.S.

Funding

This research received no external funding.

Acknowledgments

This work was supported by Electronics and Telecommunications Research Institute (ETRI) grant funded by R&D ICT program of MSIT/IITP (No. 2015-0-00855, Study on Measurement and Evaluation Technology based on Reverberation Chamber). This work was also supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (No. NRF-2017R1C1B1008605).

Conflicts of Interest

The authors declare no conflict of interest.

References

  1. IEC. Integrated Circuits-Measurement of Electromagnetic Immunity, 150 kHz to 1 GHz-Part 3: Bulk Current Injection (BCI) Method IEC 62132-3; International Standard; International Electrotechnical Commission: Geneva, Switzerland, 2007. [Google Scholar]
  2. IEC. Electromagnetic Compatibility (EMC)-Part 4–6: Testing and Measurement Techniques-Immunity to Conducted Disturbances, Induced by Radio-Frequency Fields IEC 61000-4-6, 3rd ed.; International Standard; International Electrotechnical Commission: Geneva, Switzerland, 2008. [Google Scholar]
  3. Grassi, F.; Marliani, F.; Pignari, S.A. Circuit Modeling of Injection Probes for Bulk Current Injection. IEEE Trans. Electromagn. Compat. 2007, 49, 563–576. [Google Scholar] [CrossRef]
  4. Huynh, H.A.; Jo, J.; Nah, W.; Kim, S.Y. EMC Qualification Methodology for Semicustom Digital Integrated Circuit Design. IEEE Trans. Electromagn. Compat. 2016, 58, 1629–1641. [Google Scholar] [CrossRef]
  5. Kondo, Y.; Izumichi, M.; Wada, O. Simulation of Bulk Current Injection Test for Automotive Components Using Electromagnetic Analysis. IEEE Trans. Electromagn. Compat. 2018, 60, 866–874. [Google Scholar] [CrossRef]
  6. Lafon, F.; Ramdani, M.; Perdriau, R.; Drissi, M.H.; Daran, F.D. An Industry-Compliant Immunity Modeling Technique for Integrated Circuits. In Proceedings of the 2009 International Symposium on Electromagnetic Compatibility, Kyoto, Japan, 20–24 July 2009; pp. 357–360. [Google Scholar]
  7. Alaeldine, A.; Perdriau, R.; Ramdani, M.; Levant, J.; Drissi, M. A Direct Power Injection Model for Immunity Prediction in Integrated Circuits. IEEE Trans. Electromagn. Compat. 2008, 50, 52–62. [Google Scholar] [CrossRef] [Green Version]
  8. Miropolsky, S.; Frei, S.; Frensch, J. Modeling of Bulk Current Injection (BCI) Setups for Virtual Automotive IC Tests. Presented at the EMC Europe 2010, Wroclaw, Poland, 13–17 September 2010. [Google Scholar]
  9. Joo, J.; Kwak, S.; Kwon, J.; Song, E. Simulation-based Conducted Susceptibility Testing for Wireless Power Transfer (WPT) Systems. In Proceedings of the 2018 IEEE International Symposium on Electromagnetic Compatibility and 2018 IEEE Asia-Pacific Symposium on Electromagnetic Compatibility (EMC/APEMC), Singapore, 14–18 May 2018. [Google Scholar]
  10. Kondo, Y.; Izumichi, M.; Shimakura, K.; Wada, O. Modeling of Bulk Current Injection Setup for Automotive Immunity Test using Electromagnetic Analysis. IEICE Trans. Commun. 2015, 98, 1212–1219. [Google Scholar] [CrossRef]
  11. Grassi, F. Accurate Modeling of Ferrite-Core Effects in Probes for Bulk Current Injection. In Proceedings of the 2009 IEEE International Conference on Microwaves, Communications, Antennas and Electronics Systems, Tel Aviv, Israel, 9–11 November 2009. [Google Scholar]
  12. Shenhui, J.; Quanxing, J. An Alternative Method to Determine the Initial Permeability of Ferrite Core Using Network Analyzer. IEEE Trans. Electromagn. Compat. 2005, 47, 651–657. [Google Scholar] [CrossRef]
  13. TDK Product Center Ferrite Summary. March 2014. Available online: https://product.tdk.com/info/en/catalog/datasheets/ferrite_summary_en.pdf (accessed on 9 July 2019).
  14. Cheng, D.K. Fundamentals of Engineering Electromagnetics, International ed.; Addison-Wesley Publishing Company: Boston, MA, USA, 1993; pp. 162–166. [Google Scholar]
  15. Teseq: CIP 9136A. Available online: https://www.teseq.com/products/CIP-9136.php (accessed on 5 August 2019).
Figure 1. System-level conducted susceptibility (CS) test setup based on IEC 61000-4-6 standard. EUT: equipment under test.
Figure 1. System-level conducted susceptibility (CS) test setup based on IEC 61000-4-6 standard. EUT: equipment under test.
Electronics 08 00908 g001
Figure 2. Cross-sectional view and relative permeability of the ferrite core: (a) cross-sectional view of the ferrite core; (b) frequency-dependent relative permeability of the ferrite core.
Figure 2. Cross-sectional view and relative permeability of the ferrite core: (a) cross-sectional view of the ferrite core; (b) frequency-dependent relative permeability of the ferrite core.
Electronics 08 00908 g002
Figure 3. Three-dimensional electromagnetic (EM) model of the bulk current injection (BCI) probe and comparison of the input impedance: (a) 3D EM model of the BCI probe; (b) input impedance of the BCI probe.
Figure 3. Three-dimensional electromagnetic (EM) model of the bulk current injection (BCI) probe and comparison of the input impedance: (a) 3D EM model of the BCI probe; (b) input impedance of the BCI probe.
Electronics 08 00908 g003
Figure 4. Three-dimensional model and transmission loss of the calibration jig: (a) 3D model of the calibration jig; (b) transmission loss of the calibration jig.
Figure 4. Three-dimensional model and transmission loss of the calibration jig: (a) 3D model of the calibration jig; (b) transmission loss of the calibration jig.
Electronics 08 00908 g004
Figure 5. Noise source and modulated conducted noise: (a) noise-source model connected to a BCI probe; (b) modulated conducted noise applied to the power cable. AE: auxiliary equipment.
Figure 5. Noise source and modulated conducted noise: (a) noise-source model connected to a BCI probe; (b) modulated conducted noise applied to the power cable. AE: auxiliary equipment.
Electronics 08 00908 g005
Figure 6. Proposed simulation-based system-level CS test platform. MOSFET: metal–oxide semiconductor field-effect transistor.
Figure 6. Proposed simulation-based system-level CS test platform. MOSFET: metal–oxide semiconductor field-effect transistor.
Electronics 08 00908 g006
Figure 7. Measurement-based CS test setup for the verification of the proposed method: (a) measurement-based CS test setup; (b) EUT for the CS test.
Figure 7. Measurement-based CS test setup for the verification of the proposed method: (a) measurement-based CS test setup; (b) EUT for the CS test.
Electronics 08 00908 g007
Figure 8. Impact of conducted noise on the transmitter circuit: (a) conducted noise injected into DC power; (b) voltage waveform of the transmitting coil.
Figure 8. Impact of conducted noise on the transmitter circuit: (a) conducted noise injected into DC power; (b) voltage waveform of the transmitting coil.
Electronics 08 00908 g008
Figure 9. Measurement and simulation results for the Tx coil: (a) measurement result (without noise); (b) measurement result (with noise); (c) simulation result (without noise); (d) simulation result (with noise).
Figure 9. Measurement and simulation results for the Tx coil: (a) measurement result (without noise); (b) measurement result (with noise); (c) simulation result (without noise); (d) simulation result (with noise).
Electronics 08 00908 g009
Figure 10. Measurement and simulation results for the Rx coil: (a) measurement result (without noise); (b) measurement result (with noise); (c) simulation result (without noise); (d) simulation result (with noise).
Figure 10. Measurement and simulation results for the Rx coil: (a) measurement result (without noise); (b) measurement result (with noise); (c) simulation result (without noise); (d) simulation result (with noise).
Electronics 08 00908 g010
Figure 11. The sensitivity analysis results for the operating frequency and the pk–pk voltage amplitude of the received-voltage waveforms depending on (a) GND wire inductance; (b) −VDD wire inductance.
Figure 11. The sensitivity analysis results for the operating frequency and the pk–pk voltage amplitude of the received-voltage waveforms depending on (a) GND wire inductance; (b) −VDD wire inductance.
Electronics 08 00908 g011
Figure 12. Conducted-noise filters and the transmission losses: (a) conducted-noise filters; (b) measured transmission losses of the conducted-noise filters.
Figure 12. Conducted-noise filters and the transmission losses: (a) conducted-noise filters; (b) measured transmission losses of the conducted-noise filters.
Electronics 08 00908 g012
Figure 13. Received-voltage waveforms in the measurement-based filter evaluation: (a) with conducted noise; (b) with filter 1; (c) with filter 2; (d) with filter 3.
Figure 13. Received-voltage waveforms in the measurement-based filter evaluation: (a) with conducted noise; (b) with filter 1; (c) with filter 2; (d) with filter 3.
Electronics 08 00908 g013aElectronics 08 00908 g013b
Figure 14. Received-voltage waveforms in the simulation-based filter evaluation: (a) with conducted noise; (b) with filter 1; (c) with filter 2; (d) with filter 3.
Figure 14. Received-voltage waveforms in the simulation-based filter evaluation: (a) with conducted noise; (b) with filter 1; (c) with filter 2; (d) with filter 3.
Electronics 08 00908 g014
Figure 15. Evaluation of conducted-noise filters based on the proposed figure of merit (FOM).
Figure 15. Evaluation of conducted-noise filters based on the proposed figure of merit (FOM).
Electronics 08 00908 g015
Table 1. Test level table.
Table 1. Test level table.
Frequency Range (150 kHz~80 MHz)
LevelVoltage Level
dB (uV)V (r.m.s)
11201
21303
314010
XSpecial
Table 2. Measurement- and simulation-based CS test results.
Table 2. Measurement- and simulation-based CS test results.
Voltage WaveformMeasurementSimulationError Rate [%]
without Noisewith Noisewithout Noisewith Noisewithout Noisewith Noise
Transmitted-voltage waveformFrequency [kHz]125138.4125131.605.12
Pk-pk voltage [V]21.9520.1318.2314.98.2925.98
Received-voltage waveformFrequency [kHz]125138.4125131.605.12
Pk-pk voltage [V]9.838.2410.18.912.748.13
DC outputAmplitdue [V]4.284.164.634.358.174.57
Table 3. Measurement and simulation results of the DC output voltage.
Table 3. Measurement and simulation results of the DC output voltage.
DC OutputWith NoiseWith Filter 1With Filter 2With Filter 3
Amplitude (V)Measurement4.164.174.24.22
Simulation4.354.474.484.51
Table 4. Measurement and simulation results of the filter evaluation.
Table 4. Measurement and simulation results of the filter evaluation.
Received-Voltage WaveformPk–Pk Voltage (V)Frequency (kHz)
Without noiseMeasurement9.86125
Simulation10.1125
With noiseMeasurement8.24138.4
Simulation8.91131.6
With noise
(filter 1)
Measurement8.46138
Simulation9.1130.4
With noise
(filter 2)
Measurement8.78131.5
Simulation9.51129.8
With noise
(filter 3)
Measurement9.51128.2
Simulation9.71128.2

Share and Cite

MDPI and ACS Style

Joo, J.; Kwak, S.I.; Kwon, J.H.; Song, E. Simulation-Based System-Level Conducted Susceptibility Testing Method and Application to the Evaluation of Conducted-Noise Filters. Electronics 2019, 8, 908. https://0-doi-org.brum.beds.ac.uk/10.3390/electronics8080908

AMA Style

Joo J, Kwak SI, Kwon JH, Song E. Simulation-Based System-Level Conducted Susceptibility Testing Method and Application to the Evaluation of Conducted-Noise Filters. Electronics. 2019; 8(8):908. https://0-doi-org.brum.beds.ac.uk/10.3390/electronics8080908

Chicago/Turabian Style

Joo, Junho, Sang Il Kwak, Jong Hwa Kwon, and Eakhwan Song. 2019. "Simulation-Based System-Level Conducted Susceptibility Testing Method and Application to the Evaluation of Conducted-Noise Filters" Electronics 8, no. 8: 908. https://0-doi-org.brum.beds.ac.uk/10.3390/electronics8080908

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

Article Metrics

Back to TopTop