Dynamically Reconfigurable Technology and Chip

Dear Colleagues,

Micromachines invites manuscript submissions that address dynamically reconfigurable technology and chip, which is a crucial research topic in the field of computing architecture and VLSI design. Dynamically reconfigurable technology can improve the flexibility and adaptability of hardware by reconfiguring hardware resources at run-time, thereby performing different tasks and meeting various application requirements. Therefore, chips based on dynamically reconfigurable technology are widely used in many fields, such as neural network accelerator, post-quantum crypto and network communication, achieving excellent performance and energy efficiency. In recent years, research on dynamically reconfigurable technology and chip has mainly focused on the following directions.

One important direction is to further exploit the advantages of dynamically reconfigurable technology. According to the top-down design methodology, novel reconfigurable architectures for different scenarios should be explored first, so that the performance can be improved to the extreme. Next, it is essential to fully improve the efficiency of hardware, including processing element array, interconnection network, memory data scheduling, buffer management, configuration context storage and so on. It is worth considering that some emerging methods for hardware design have the potential to achieve high flexibility and power consumption reduction. In addition, ways to efficiently map different algorithms to reconfigurable architectures is a key point of interest. Optimization methods for mapping algorithms to reduce configuration latency is another focus area. Along with the widely used reconfigurable technology, hardware security of reconfigurable architecture and chip has also become a topic of increasing concern; some examples of hardware attacks include hardware Trojan and side-channel attack.

There are several issues in the aforementioned areas that still remain unresolved, which limit the application of dynamically reconfigurable technology and chip; as such, professionals and researchers are continually endeavoring to develop reconfigurable technology. Therefore, we invite scholars and researchers to share their latest achievements by submitting their invaluable manuscripts to this Special Issue.

We welcome submissions of both original research articles and reviews. Research areas may include (but not limited to) the following:

• Domain-specific reconfigurable architecture, such as neural network accelerator, encryption and decryption, network communication, digital signal processing;
• Design methodology of dynamically reconfigurable architecture;
• Key components in reconfigurable chip, such as processing element, interconnection network, on chip buffer;
• Algorithms deployment and applications on reconfigurable architecture;
• Design of configuration context and mapping mechanism for dynamically reconfigurable architecture;
• Hardware security for dynamically reconfigurable architecture against hardware Trojan, side-channel attack, fault injection, reverse engineering, electromagnetic interference attack, etc.

We look forward to receiving your contributions.

Dr. Chen Yang
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Micromachines is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

• dynamically reconfigurable technology
• reconfigurable architectures
• hardware
• reconfigurable chips