Influence of Common Source and Word Line Electrodes on Program Operation in SuperFlash Memory

Abstract

A theoretical study of the influence of word line and common source electrodes on the program operation in shrank SuperFlash memory is proposed. Numerical simulations demonstrate that the literature model defined for previous nodes is not always suitable, due to the continuous cell physical size reduction and to the consequent increment of capacitive coupling between the floating gate and adjacent electrodes. To get a deeper insight, an analytical model of the electric field in the region of source side injection is proposed. This model describes the impact of the cell physical and electrical parameters on the vertical and horizontal field components and highlights the strong dependence of the carrier injection on the technology node. Furthermore, the numerical and analytical models estimate the influence of the word line and common source electrodes on the time-to-program, the floating gate potential and the source side injection efficiency, taking into consideration, at the same time, their possible impact on the cell reliability.

1. Introduction

Electronic components are an important part of modern vehicles, and their role in the automotive industry is destined to grow with the gradual introduction of more and more sophisticated driver assistance systems (ADAS), setting the sight on full autonomous cars. For this reason, an increasing number of micro-controller units, together with embedded flash memory units (eFlash) are currently allocated in a vehicle [1]. In particular, eFlashes in automotive technology are usually employed for code storage and to collect the huge amount of data from the distributed on-board sensors. Due to their specific application, additional requirements are needed if compared with eFlashes in civil applications [2], i.e., high endurance, data retention and speed in program, erase and read operations [3]. Especially, fast programing is mandatory in order to face the continuous increment of memory density, thus the keeping rewriting cost as low as possible.

The embedded SuperFlash (ESF) memory was introduced in high-volume production in the 90s by SST^® (ESF1) [4] as a stored charge-based memory technology alternative to the conventional floating gate (FG) one. ESF technology exhibits high injection efficiency, fast operations, over-erase immunity and improved reliability [5,6,7]. To achieve both short time-to-program (T2P) and high injection efficiency (η), ESF cells programing is based on the source side injection (SSI) mechanism [8,9,10].

According to the necessity of the progressive dimension and voltage down-scaling, in the subsequent generations of ESF memory (i.e., ESF2 and ESF3), the number of electrodes adjacent to the FG was increased in order to have a high capacitive coupling and a high FG potential (V_FG). Hence, in ESF2 one additional electrode (source line) and in ESF3 two more electrodes (coupling gate and erase gate) were implemented [11]. ESF3 appeared with the 110 nm technology node and it is still the leading ESF technology family with the latest produced 28 nm node now on the market [4]. In ESF3, as in ESF1 and ESF2, the channel is shared between two electrodes, i.e., word line (WL) and FG, so that the SuperFlash cell structure can be approximated with the series of two transistors: FG-MOS and WL-MOS. The ESF3 cell is depicted in Figure 1a,b, where the erase gate and coupling gate electrodes are omitted for a clearer explanation of the cell working principle. The two transistors are in a source follower configuration and they are biased in saturation mode. In particular, V_FG is much higher than the FG-MOS threshold voltage, whereas V_WL is slightly above the WL-MOS threshold voltage. Hence, the channel portion of FG-MOS is in strong inversion (outlined in Figure 1a with the shadowed area beneath the FG), whereas the WL-MOS one is in weak inversion. The FG-MOS channel portion can be considered as a drain extension or a virtual drain [12,13]. Indeed, the WL-MOS load is represented by the series of FG channel resistance and FG drain resistance and, as they are both negligible, WL-MOS drain voltage can be considered equal to FG-MOS drain voltage (Figure 1c).

The SSI mechanism is sketched in Figure 1a with the dashed arrow and takes place approximately in the region between X_WL and X_FG. Electrons are injected from the substrate to the closest FG corner, involving both the horizontal and the vertical components of the electric field [14,15,16]. The vertical component is fixed by V_FG and is further enhanced thanks to the tip geometry of the FG; the horizontal component depends on the channel state, which in turn is influenced by the bias conditions applied on all the electrodes which overlook the channel, i.e., WL, bit line (BL), common source (CS) and FG itself. A way to quantify the SSI is by defining its efficiency (η) as the fraction of the channel current which ends up in the FG. It depends on the voltage waveform applied to the various electrodes and varies with the cell geometry. Being a main parameter in the program efficiency, η has been systematically and extensively studied in past ESF nodes [13,17,18].

In addition to η, also T2P and V_FG are key parameters in the program efficiency, concurring to define the optimum program strategy. From a practical point of view, T2P defines the program speed and V_FG the program window, while η is related to the power consumption, in the sense that a more efficient injection requires a lower channel current. Generally speaking, it is not possible to define a single ruling parameter in the program efficiency, as the relative importance of those three parameters should rather be referred to the specific application. For all these reasons, in this work, a theoretical study of the influence of WL and CS electrodes on η, T2P and V_FG is proposed, focusing specifically on the ESF3 current node now on the market [4]. Indeed, because of technology scaling, the bias conditions of the electrodes adjacent to the FG have a greater influence on both channel formation and V_FG than in past nodes. Therefore, the different role of electrodes as CS and WL in SSI should be discussed in order to gain a complete overview of the cell physics in the current node.

2. Methods

The SSI mechanism is investigated systematically by means of Synopsys Sentaurus technology computer-aided design (TCAD) simulations, varying the program conditions. All the numerical simulations have been performed fixing the values of the coupling gate voltage (V_CG), bit line voltage (V_BL) and erase gate voltage (V_EG) reported in literature [19,20,21,22,23] for the latest technology node, listed in

Table 1. Bias conditions in ESF3 program operation [19,20,21,22,23].

Electrode	Program
VCG	HV
VCS	4 ÷ 4.6 V
VEG	4 ÷ 4.6 V
IBL	1 μA
VWL	0.7 ÷ 1.1 V

and shown in Figure 2. In particular, the bias conditions are: V_CG = HV (>10 V) [19,20,21,22]; word line and commons source voltages (V_WL and V_CS, respectively) have been varied, respectively, in the range 0.7–1.1 V and 4–4.6 V [20,21,23]; V_EG = V_CS in order to avoid charge migration between the two electrodes [23]; I_BL is fixed at ~1 µA [20,24]. In all the simulations, a single 1 s-long pulse is applied on all the electrodes.

In the SSI mechanism both the horizontal (E_H) and vertical (E_V) electric field components are involved. In previous technology nodes, E_H and E_V during program operation were described, respectively, as [25]:

$$E_H=\frac{V_{CS}-\left(V_{WL}-V_{th,WL}\right)}{L_{gap}}$$

(1a)

$$E_V= \frac{V_{OV,FG}}{t_{ox,FG}}$$

(1b)

where V_th,WL is the threshold voltage of the WL transistor, L_gap is the distance between FG and WL (Figure 1a), t_ox,FG is the FG oxide thickness and $V_{OV,FG}$ is the overdrive voltage ($V_{OV,FG}= V_{FG}- V_{th,FG}$) associated to FG-MOS. Nevertheless, the geometric features’ scaling brings about additional effects, regarded as negligible in the past. For instance, as the electrodes spacing decreases the impact of WL and CS on FG increases, thus causing different electric field behavior compared to past nodes. Furthermore, progressive distances shrinking can also affect the electrostatic cell conditions as well as E_H and E_V. Consequently, systematically investigation of CS and WL influence on program operation will be carried out in the following section. In particular, in order to isolate CS (and WL) contribution, standard biasing conditions (Table 1) will be applied, with V_CS and V_WL fixed at their mid-ranges (4.3 V and 0.9 V, respectively) when not under direct examination.

3. Results

3.1. Role of the Common Source Electrode

Impact on the Electric Field: CS electrode exerts a significant influence on the electric field components involved in SSI mechanism, especially on E_H. From Equation (1a), a linear E_H dependency on V_CS can indeed be observed. This holds in the current node as well, as demonstrated in Figure 3a where the simulated E_H curve is drawn as a function of the coordinate x, in the portion delimited by WL and FG edges. As concerns E_V, in past nodes it was successfully described by Equation (1b) and remained almost constant, being V_OV,FG mainly determined by V_CG and influenced only partially by the other adjacent electrodes. Nevertheless, in the current node, CS contribution in V_FG cannot be neglected anymore, as verified in the simulated E_V curve drawn in Figure 3b. Here, E_V is depicted against the y-coordinate in x = X_FG, from the Si/SiO₂ interface toward the FG. By increasing V_CS, a horizontal translation of the E_V curve toward higher absolute values is found. This dependence is contained inside V_FG as it holds:

$$V_{FG}\left(V_{CS}\right)= {\alpha }_{CS-FG} ·(V_{C{S}_0}+ \Delta V_{CS})= {\alpha }_{CS-FG} ·V_{C{S}_0}+{\alpha }_{CS-FG}· \Delta V_{CS}$$

(2)

where $V_{C{S}_0}$ is the minimum value of V_CS (i.e., 4 V) and $\Delta V_{CS}$ is the variation of V_CS from this value. Because the product ${\alpha }_{CS-FG} ·V_{C{S}_0}$ is constant, a variation of V_CS causes a linear increase of V_FG and a parallel translation of the E_V curve with the same sign.

In conclusion, as the V_FG described by Equation (2) is proportional to the numerator of E_V (Equation (1b)), it can be finally stated that the total electric field $\left(\sqrt{E_V^2+E_H^2}\right)$ increases linearly with V_CS.

Impact on the Floating Gate: The influence of V_CS on the floating gate is studied calculating V_FG, the FG current (I_FG) and the FG stored charge (Q_FG) during a 1 s-long program pulse (applied on V_CS, V_WL, V_CG, V_EG and V_BL) starting at t = 1 ns, with V_WL pulse amplitude at its mid-range and V_CG and V_BL pulse amplitude at the nominal conditions mentioned in Table 1. Results are reported in Figure 4.

At the very beginning of the program pulse, V_FG increases (Figure 4a). This is due to the capacitive coupling between FG and CS which, in turn, leads to an E_V increment, as discussed previously. I_FG behavior is displayed in Figure 4b. As the V_CS increment induces an enlargement of E_V and E_H, the hot-electron-injected current increases as well. As expected, with the gradual addition of electrons into the FG, both I_FG and V_FG start to decrease. A change of the slope takes place when the charge accumulated in the FG limits further injection (in this case, around 10⁻⁵ s), as can also be seen in Figure 4c. The cell is programed more rapidly at higher V_CS: indeed, I_FG is higher, so that the required time for reaching the target Q_FG is shorter. The linear dependency of Q_FG at the end of the program pulse on V_CS is depicted in the inset of Figure 4c. A similar result was obtained in [14], where the increment of V_FG with V_CS was experimentally measured in the 40 nm node.

3.2. Role of the Word Line Electrode

Impact on the Electric Field: As previously disclosed in the introduction, WL biasing has a great influence on the channel formation in both WL-MOS and FG-MOS portions. In particular, WL biasing controls the shrinkage of the channel in the L_gap area and, as the FG-MOS channel portion can be considered as a drain extension, drives the horizontal extension of the depletion region between FG-MOS and WL-MOS. From Equation (1a), the influence of WL on E_H can be quantified. As in a standard MOS, the horizontal component of the electric field depends on the difference between V_CS and V_BL and from the overdrive voltage in the WL-MOS. TCAD simulations show that E_H decreases with V_WL as demonstrated in Figure 5, where the absolute value of E_H is drawn by varying V_WL.

The vertical component E_V, instead, depends on FG-MOS overdrive voltage, thus from V_FG. This, in turn, can be influenced by V_WL due to the capacitive coupling factor between WL and FG, growing with the scaling. Hence, V_WL influences the numerators of both Equations (1a) and (1b). As a consequence, an increment of V_FG with V_WL is expected:

$$V_{FG}\left(V_{WL}\right)= {\alpha }_{WL-FG} ·(V_{W{L}_0}+ \Delta V_{WL})= {\alpha }_{WL-FG} ·V_{W{L}_0}+{\alpha }_{WL-FG}· \Delta V_{WL}$$

(3)

Equation (3) suggests that the FG potential dependency from V_WL is linear and, as a consequence of the direct proportionality between E_V and V_FG (Equation (1b)), E_V is expected to vary linearly with V_WL as well. On the contrary, simulations show that Equation (3) E_V does not follow the aforementioned dependency in the current node. In Figure 6a, the calculated curves of E_V are plotted as a function of the coordinate y at x = X_FG, with V_WL as a parameter. As one can see, by increasing V_WL, the E_V curves do not shift in a parallel way, as in the case of V_CS, and exhibits a spread at the Si/SiO₂ interface. To explain intuitively this behavior, in Figure 6b the shape of the channel is depicted with colored area (it has been emphasized for the sake of clarity). A lateral overlap between WL-MOS and FG-MOS channels is present, so that increasing V_WL the channel invades the area beneath the FG (dashed line in Figure 6b) and the amount of channel charge at x = X_FG increases. To get deeper insight into the E_V behavior in shrank nodes, an analytical model is proposed, which outlines the role of the cell electrical and physical parameters. To this aim, the following assumptions are made: (1) the channel depth from WL edge to the pinch-off point is linearly decreasing; (2) given a certain V_WL, the vertical distribution of electrons in the channel depth g(y) decreases exponentially from the Si/SiO₂ interface where it is g(0) = n_s (being n_s the electron density at the Si/SiO₂ interface) to the channel depth (d) where g(d) = N_A (being N_A the substrate doping concentration); (3) V_FG dependency on V_WL is negligible due to the low capacitive coupling between WL and FG; (4) the influence of E_H on the channel charge is negligible in X_FG.

Based on the mentioned assumptions, it holds:

$$g\left(y\right)= n_s{e}^{-\frac{y}{d_{ref}}}$$

(4)

where $d_{ref}$ is a fixed reference depth, not dependent on V_WL $\left(d_{ref} > d_{FG}\right).$ It should be noted that n_s increases with V_WL. This is shown in Figure 6c where a zoom of the structure is sketched and the increasing electron density is represented with colors from blue to red. The overall effect is an increment of the absolute value of the charge present in x = X_FG, which in turn enhances E_V. The direct extraction of carrier concentration values from TCAD simulation allows quantifying both n_s and d_FG dependencies on V_WL. Particularly, n_s is attained by probing the electron concentration at Si/SiO₂ interface in x = X_FG and multiplying the result to the channel width. Instead, d_FG is obtained by examining carrier concentration behavior as a function of y. Consequently, as shown in Figure 7a, it can be demonstrated that n_s increases linearly with V_WL, whereas d_FG varies as the square root of V_WL. Hence, by curve fitting the outcomes of TCAD simulations, it can be inferred that:

$$n_s\left(V_{WL}\right)= k_1+\alpha V_{WL}$$

(5a)

$$d_{FG}\left(V_{WL}\right) \approx \sqrt{k_2+\beta V_{WL}}$$

(5b)

where α, β, k₁ and k₂ are constants and are quantitatively derived from best fits of n_s and d_FG as functions of V_WL.

Since the electric field is inversely proportional to the square of the distance between charges in the FG and the ones in the channel, only a small interval around x = X_FG is taken into consideration when calculating E_V. To obtain the amount of channel charge in x = X_FG (Q_C), one has to integrate g(y) along y and the normalized electron concentration (C_n). The integration limits are, respectively, d_FG (i.e., the channel depth at x = X_FG) and the Si/SiO₂ interface (y = 0) along y, and 1 (maximum concentration) and –ln(N_A/n_s) along C_n. The calculated integral is multiplied by the electron charge and the width of the structure (W), to give Q_C (expressed in C/cm). Therefore, as Q_C depends on n_s and d_FG, in turn it depends also on V_WL. Relying on assumption (4) it holds:

$$\begin{gathered} E_V\left(V_{WL}\right)= \frac{Q_C\left(V_{WL}\right)}{{\epsilon }_0{\epsilon }_{SiO2}}=\frac{1}{{\epsilon }_0{\epsilon }_{SiO2}} \underset{0}{\overset{d_{FG}}{{\displaystyle \int }}}\underset{-ln\left(\frac{N_A}{n_s}\right)}{\overset{1}{{\displaystyle \int }}}qW{n}_s{e}^{-\frac{y}{d_{ref}}}d{C}_n dy=\frac{1}{{\epsilon }_0{\epsilon }_{SiO2}} \underset{0}{\overset{d_{FG} }{{\displaystyle \int }}}qW\left(n_s{e}^{-\frac{y}{d_{ref}}}-N_A\right)dy= \\ =\frac{1}{{\epsilon }_0{\epsilon }_{SiO2}}\left[qW\left(-n_s{e}^{-\frac{d_{FG}}{d_{ref}}}+n_s- d_{FG} N_A\right)\right] \end{gathered}$$

(6)

The total charge Q_C coming from the analytical model is displayed in Figure 7b (continuous line) together with the numerical values extracted from charge mapping in TCAD simulations (symbols). It can be seen that the agreement between numerical and analytical modeling is excellent (R² = 0.99887) and that the total charge variation is linear with V_WL, apart from at low V_WL values (as demonstrated by the linear fitting displayed in Figure 7b with a dashed line).

In Figure 7c the three charge terms in the square brackets of Equation (6) are compared. Term 1 ($n_s{e}^{-\frac{d_{FG}}{d_{ref}}}$) refers to the surface charge density and the channel depth at X_FG, term 2 ($n_s$) refers only to the surface electron density, term 3 ($d_{FG} N_A$) refers to the channel depth and the substrate doping. This figure allows to understand the role of the cell physical and electrical parameters in determining E_V, thus highlighting its strong dependence on the specific technology node.

In conclusion, as the SSI mechanism depends on both E_V and E_H, their numerical values extracted from simulations are reported in

Table 2. TCAD simulated E_H and E_V absolute values calculated in x = X_FG and y = 0 as functions of V_WL.

VWL [V]	|EH| [MV/cm]	|EV| [MV/cm]
0.7	1.09	2.79
0.9	1.05	2.89
1.1	1.01	3.00

in the studied V_WL range. As can be noticed, the absolute value of E_V is always greater than E_H. Thus, although E_H decreases while E_V increases with V_WL, it can be inferred that the injected charge Q_FG would be more influenced by E_V. This will be verified below.

Impact on the Floating Gate. The influence of V_WL on the floating gate is studied calculating V_FG, I_FG and Q_FG during a 1 s-long program pulse (applied on V_CS, V_WL, V_CG, V_EG, V_BL) starting at t = 1 ns, with V_CS = V_EG pulse amplitude at their mid-range and V_CG and V_BL pulse amplitude at nominal conditions. As the capacitive coupling factor between FG and WL is smaller than the one between FG and CS, the starting vertical offset of the V_FG is less evident than the one in the V_CS case. This reduced offset should result in a smaller E_v shift. In fact, as commented in the previous section, V_WL variation affects not only V_FG but also the channel state, which leads to an augmented injection current. Actually, other authors measured experimentally an opposite evolution in time of V_FG with V_WL in the 55 nm technology node [17]. Indeed, in that paper, V_FG at the end of the pulse reduced for values of V_WL over the threshold (V_th,WL). In that node, as the SSI mechanism is influenced by the technology node, and being the distance between WL and FG (relatively) long, an increment of V_WL led to a reduced E_H component, while E_V remained basically constant. On the contrary, in latest technology nodes, due to the shorter distance between WL and FG, the channel below WL can extend to x = X_FG, again reducing E_H, but increasing largely E_V, as previously shown in Table 2. Looking at Figure 8, it can be noticed that with the gradual addition of electrons into the FG, both I_FG and V_FG start to decrease, changing slope around 10⁻⁵ s when the stored charge Q_FG limits further injection.

The cell is programed more rapidly at higher V_WL: indeed, I_FG is higher (Figure 8b), so that the required time for reaching the target Q_FG is shorter (Figure 8c). A sub-linear dependency of Q_FG at the end of the program pulse on V_WL is depicted in the inset of Figure 8c.

4. Discussion

In the previous sections, the impact of V_CS and V_WL on physical details underlying the SSI mechanism was studied. Hereafter, their macroscopic effects on the program operation will be analyzed, in terms of injection efficiency, FG potential and time-to-program.

The source side injection efficiency (η) is defined as the ratio between I_FG and the current which flows in the channel (I_BL): η = I_FG/I_BL. In Figure 9a, η is plotted as a function of both V_CS and V_WL. As one can see, η (slightly) decreases with V_WL and consistently increases with V_CS. The two opposite trends can be understood by studying separately I_FG and I_BL. Figure 9b,c shows that an increment of both V_WL and V_CS implies an increment of both I_BL and I_FG. However, in the V_WL case, the rate of variation of I_BL is faster than that of I_FG (Figure 9b), so that by increasing V_WL in its range, η degrades of about 10% (Figure 9a). On the contrary, in the V_CS case, I_BL and I_FG increase with quite different rates with V_CS (Figure 9c), so that, by increasing V_CS in its range, η improves of about 50% (Figure 9a). In conclusion, it can be affirmed that, as η (slightly) degrades with V_WL, it could be convenient to rather increase V_CS, keeping V_WL as low as possible.

As already verified in the previous sections, the potential that the FG reaches after a given program time, depends on V_WL and V_CS. In Figure 10a the absolute value of V_FG after a 1 s program pulse is depicted as a function of V_WL. As expected, V_FG presents a sub-linear behavior with V_WL, due to the sub-linear Q_FG dependency on V_WL (inset of Figure 8c). On the other hand, in Figure 10b, a linear dependence of V_FG on V_CS can be verified. The different trends of V_FG with V_WL and V_CS can be physically explained by considering that different portions of the ESF3 cell are influenced by V_WL and V_CS. Indeed, V_WL affects the channel features (depth and charge), but not the FG potential due to a negligible capacitive coupling. On the contrary, as the CS electrode is strongly coupled with the FG, a linear influence on the channel current I_BL is obtained (see Figure 9c). In conclusion, it can be stated that the FG potential at the end of the program pulse increases with both V_WL and V_CS, albeit with different trends.

Finally, the time to program (T2P) is defined as the time needed to reduce the read current down to the 10% with respect to the read current associated to the erased cell. This quantity is determined by the charge injection dynamics into the FG and it is strongly not linear. It was already verified that the final charge transferred to the FG depends linearly on V_CS (Figure 4c), but it represented the state of the cell at the end of the program operation, not during the injection dynamics. The charge transfer occurs at a much higher rate in the very first instants so that, typically after a few microseconds, the 90% of the target charge is transferred [18]. In Figure 11, T2P is drawn as function of both V_WL and V_CS, in their respective operating ranges. As one can see, T2P decreases exponentially in both the cases, albeit with a higher rate with V_CS. In conclusion, it can be affirmed that, working at high V_WL and V_CS values entails a reduction in the T2P. Furthermore, a greater dependency of T2P on V_WL, respect to V_CS, can be verified.

In Figure 12a,b, a summary of the three aforementioned working quantities (V_FG, η and 1/T2P) dependency on V_WL and V_CS is reported. Concerning the V_WL increment, its detrimental impact on η (Figure 9) was assessed on one hand, but, on the other hand, its positive influence on V_FG and T2P (Figure 10 and Figure 11) was also. This can be verified in Figure 12a, where two V_WL ranges are indicated: the best trade-off among all the three quantities lies at intermediate values of V_WL (dashed circle); the best solution in terms of V_FG and 1/T2P, regardless of η, rather requires higher V_WL values (solid circle). For what concerns V_CS, as all the three quantities (η, 1/T2P and V_FG) contemporarily improve by increasing V_CS, a unique range is reported in Figure 12b (solid circle).

In conclusion, to improve the overall program operation it can be more convenient to intervene on the common source electrode rather than on the word line one. However, if in a specific application η (and therefore the power consumption) is a minor priority respect to program speed and program window, V_WL can be increased as well, alternatively or in addition to V_CS.

As a final remark, possible drawbacks of increasing V_WL and V_CS in terms of reliability are studied. First of all, by increasing V_CS, the total channel electric field E_TOT at X_FG increases as well, as shown in Figure 3b. Hence, an augmented lateral portion of the channel is involved in SSI, which in turn possibly leads to a widening of the interface traps amount in the injection area. The presence of these additional traps could cause an electrostatic shielding effect during program, as well as the activation of charge loss paths. Furthermore, the increment of V_CS can provoke channel pinch-off close to the CS edge, thus further increasing E_H (as depicted in Figure 13a), which in turn favors impact ionization and the possible creation of new traps at the Si/SiO₂ interface.

Operating at high values of V_WL can also have different drawbacks. First of all, due to the electric field increment in the oxide at x = X_WL (shown Figure 13b), there exist a higher probability of trap creation in this portion of the channel, which may alter the injection efficiency. Second, Figure 5 showed that the V_WL growth enhances also E_v at x = X_FG. This results in a greater amount of charge stored in the FG, but, on the other hand, leads to a more stressed Si/SiO₂ interface. Relying on the above considerations, it appears evident that, if the increment of both V_WL and V_CS brings undeniable benefits in terms of program speed and program window, it should be taken into account that they can possibly cause reliability degradation.

5. Conclusions

This work is focused on the program operation of ESF3 memory cells in the latest technology node currently on the market. TCAD numerical simulations of word line and common source electrodes influence on the SSI efficiency, the FG potential and the time-to-program were carried out using scaled cell geometry and voltages. Simulations showed that literature model proves to be suitable for common source voltage variations even in the current node. Conversely, the word line voltage effect on the electric field components was not properly represented by the mentioned model. Therefore, an analytical model of the electric field was proposed, which outlined the influence of the physical (and electrical) cell parameters on E_V. Particularly, excellent agreement between analytical and numerical values was attained, thus demonstrating a leading E_V impact on SSI mechanism, which actually determine the injection.

In addition, SSI efficiency η turned out to be (slightly) degraded by V_WL increment while the FG potential and the time-to-program improved at high values of the word line and common source voltages.

As a consequence, in order to improve the overall program operation, it can be more convenient to intervene on the common source electrode. However, in specific applications where the power consumption is a minor priority respect to program speed and program window, the word line voltage can be increased alternatively or in addition to common source.

Finally, as opposed to the benefits in terms of performance, V_CS and V_WL increment can cause electrical stresses in the oxide layers of the cell, with an increased risk of trap creation.

In conclusion, this work allows for a deeper comprehension of the technology scaling effects on the ESF3 cell physics in program operation. The achieved results pave the way for the implementation of innovative program strategies aimed to improve both performances and reliability in the ESF3 memory.