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RF/Mm-Wave Circuits Design and Applications
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RF/Mm-Wave Circuits Design and Applications

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: closed (30 June 2021) | Viewed by 80195

Special Issue Editor

Dr. Egidio Ragonese

E-Mail Website
Guest Editor
Dipartimento di Ingegneria Elettrica Elettronica e Informatica (DIEEI), Università di Catania, 95125 Catania, Italy
Interests: radio frequency (RF) and millimeter wave (mm-wave) integrated circuits/systems for wireless communication systems
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

Radio frequency (RF) and millimeter wave (mm-wave) integrated circuits (ICs) enable key applications in our life, such as wireless communication (e.g., 4G/5G mobile communication, wireless LANs, low-data-rate low-power communication, and NFC), industrial automation (e.g., IoTs, high-precision positioning sensors), automotive safety (e.g., vehicular radar sensors, ADASs), and medical instrumentations (non‑ionizing imaging systems, wearable sensors, implanted devices, etc.). Nanoscale CMOS technologies are able to cope with such applications up to the mm-wave spectrum, while SiGe BiCMOS processes are still dominating from 100 GHz to terahertz.

This Special Issue will host the latest results in the field of RF and mm-wave ICs with a focus on active/passive components modelling, electromagnetic (EM) simulation of integrated passive devices, integrated circuit design, system-on-chip (SoC) integration, advanced package-to-chip co‑design, new transceiver architectures, and antenna-to-chip co-design.

The topics of interest include but are not limited to the following:

  • RX front-end circuits (LNAs, mixers, VGAs, T/R switches, amplifiers, filters, and demodulators);
  • Low-power transceivers (wireless circuits for low power operation, battery-less transceivers, wakeup receivers, RFID, and near-field communications);
  • Oscillators and frequency synthesizers (VCOs, frequency dividers, multipliers, PLLs, and charge pumps);
  • Transmitters and power amplifiers for 5G and mm-wave applications;
  • Integrated radars, including vehicular radar sensors;
  • mm-wave communication circuits and systems-on-chip;
  • Galvanically isolated data/power transfer systems based on RF coupling;
  • RF/mm-wave system applications.

Prof. Dr. Eng. Egidio Ragonese
Guest Editor

Manuscript Submission Information

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Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

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Published Papers (26 papers)

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22 pages, 17691 KiB  
Article
A Low Spur and Low Jitter Quadrature LO-Generator Using CML Inductive Peaking Technique for WLAN Transceiver
by Tian Tian, Peng Li, Huiqun Huang, Yilin Pu and Bin Wu
Electronics 2021, 10(15), 1869; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10151869 - 03 Aug 2021
Viewed by 2629
Abstract
The demand for a local oscillator (LO) signal of high quality and integrity in local area network (WLAN) communication is growing with the increasing date rate. The LO signals for high data rate WLAN applications are desired to not only have proper shape [...] Read more.
The demand for a local oscillator (LO) signal of high quality and integrity in local area network (WLAN) communication is growing with the increasing date rate. The LO signals for high data rate WLAN applications are desired to not only have proper shape waveforms and adequate voltage amplitude but also to achieve relatively stable and clean outputs with low phase noise and low spur. Fractional-N frequency planning is critical for a quadrature LO-generator, which is achieved by a single-sideband (SSB) mixer and multiple dividers since it can avoid the frequency pulling and alleviate the self-mixing and DC offset issues, while spur levels are easily increased due to harmonic mixing, imbalance, and leakage of the SSB mixer. This article proposes a simple and innovative quadrature LO-generator, which adopts a current-mode-logic (CML) inductive peaking (IP) circuit to improve phase noise and suppress spurious tones. Four types of LO delivery methods using IP circuits are proposed and compared. Among four methods, the CML-IP circuit presents the optimum performance for driving long wires of multi-mm length. Instead of previous digital spur cancellation, the CML-IP circuit achieves higher spur suppression, lower jitter, and a greater figure of merit (FoM). The quadrature LO-generator can be configured to either VCO mode or bypass mode supporting external VCO input. Implemented in 55 nm CMOS technology, the proposed quadrature LO-generator achieves −52.6 dBc spur suppression, −142 dBc/Hz phase noise at 1 MHz offset at the 4.8 GHz frequency, and −271 FoM. Furthermore, the quadrature LO-generator occupies an active area of 0.178 mm2 and consumes 23.86 mW. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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9 pages, 2138 KiB  
Article
A 1-V 7th-Order SC Low-Pass Filter for 77-GHz Automotive Radar in 28-nm FD-SOI CMOS
by Alessandro Parisi, Giuseppe Papotto, Egidio Ragonese and Giuseppe Palmisano
Electronics 2021, 10(12), 1466; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10121466 - 18 Jun 2021
Cited by 5 | Viewed by 1918
Abstract
This paper presents a switched capacitor low-pass filter in a 28-nm fully depleted silicon on insulator CMOS technology for 77-GHz automotive radar applications. It is operated at a power supply as low as 1 V and guarantees 5-dB in-band voltage gain while providing [...] Read more.
This paper presents a switched capacitor low-pass filter in a 28-nm fully depleted silicon on insulator CMOS technology for 77-GHz automotive radar applications. It is operated at a power supply as low as 1 V and guarantees 5-dB in-band voltage gain while providing out-of-band attenuation higher than 36 dB and a programmable passband up to 30 MHz. A double sampling technique is adopted, which allows high operating frequency to be achieved while saving power. Moreover, low-voltage biasing and common-mode feedback circuits are exploited to guarantee an almost rail-to-rail output voltage swing. The proposed filter provides an output 1-dB compression point as high as 8.7 dBm with a power consumption of 9 mW. To the authors’ knowledge, this is the first SC-based implementation of a low pass filter for automotive radar applications. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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10 pages, 14889 KiB  
Article
A Novel Fast-Locking ADPLL Based on Bisection Method
by Xiaoying Deng, Huazhang Li and Mingcheng Zhu
Electronics 2021, 10(12), 1382; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10121382 - 09 Jun 2021
Cited by 5 | Viewed by 1960
Abstract
Based on the idea of bisection method, a new structure of All-Digital Phased-Locked Loop (ADPLL) with fast-locking is proposed. The structure and locking method are different from the traditional ADPLLs. The Control Circuit consists of frequency compare module, mode-adjust module and control module, [...] Read more.
Based on the idea of bisection method, a new structure of All-Digital Phased-Locked Loop (ADPLL) with fast-locking is proposed. The structure and locking method are different from the traditional ADPLLs. The Control Circuit consists of frequency compare module, mode-adjust module and control module, which is responsible for adjusting the frequency control word of digital-controlled-oscillator (DCO) by Bisection method according to the result of the frequency compare between reference clock and restructure clock. With a high frequency cascade structure, the DCO achieves wide tuning range and high resolution. The proposed ADPLL was designed in SMIC 180 nm CMOS process. The measured results show a lock range of 640-to-1920 MHz with a 40 MHz reference frequency. The ADPLL core occupies 0.04 mm2, and the power consumption is 29.48 mW, with a 1.8 V supply. The longest locking time is 23 reference cycles, 575 ns, at 1.92 GHz. When the ADPLL operates at 1.28 GHz–1.6 GHz, the locking time is the shortest, only 9 reference cycles, 225 ns. Compared with the recent high-performance ADPLLs, our design shows advantages of small area, short locking time, and wide tuning range. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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20 pages, 9841 KiB  
Article
Active Balun with Center-Tapped Inductor and Double-Balanced Gilbert Mixer for GNSS Applications
by Daniel Pietron, Tomasz Borejko and Witold Adam Pleskacz
Electronics 2021, 10(11), 1351; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10111351 - 05 Jun 2021
Cited by 3 | Viewed by 3611
Abstract
A new 1.575 GHz active balun with a classic double-balanced Gilbert mixer for global navigation satellite systems is proposed herein. A simple, low-noise amplifier architecture is used with a center-tapped inductor to generate a differential signal equal in amplitude and shifted in phase [...] Read more.
A new 1.575 GHz active balun with a classic double-balanced Gilbert mixer for global navigation satellite systems is proposed herein. A simple, low-noise amplifier architecture is used with a center-tapped inductor to generate a differential signal equal in amplitude and shifted in phase by 180°. The main advantage of the proposed circuit is that the phase shift between the outputs is always equal to 180°, with an accuracy of ±5°, and the gain difference between the balun outputs does not change by more than 1.5 dB. This phase shift and gain difference between the outputs are also preserved for all process corners, as well as temperature and voltage supply variations. In the balun design, a band calibration system based on a switchable capacitor bank is proposed. The balun and mixer were designed with a 110 nm CMOS process, consuming only a 2.24 mA current from a 1.5 V supply. The measured noise figure and conversion gain of the balun and mixer were, respectively, NF = 7.7 dB and GC = 25.8 dB in the band of interest. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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12 pages, 5497 KiB  
Article
An Experimental Comparison of Galvanically Isolated DC-DC Converters: Isolation Technology and Integration Approach
by Egidio Ragonese, Nunzio Spina, Alessandro Parisi and Giuseppe Palmisano
Electronics 2021, 10(10), 1186; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10101186 - 15 May 2021
Cited by 15 | Viewed by 3301
Abstract
This paper reviews state-of-the-art approaches for galvanically isolated DC-DC converters based on radio frequency (RF) micro-transformer coupling. Isolation technology, integration level and fabrication issues are analyzed to highlight the pros and cons of fully integrated (i.e., two chips) and multichip systems-in-package (SiP) implementations. [...] Read more.
This paper reviews state-of-the-art approaches for galvanically isolated DC-DC converters based on radio frequency (RF) micro-transformer coupling. Isolation technology, integration level and fabrication issues are analyzed to highlight the pros and cons of fully integrated (i.e., two chips) and multichip systems-in-package (SiP) implementations. Specifically, two different basic isolation technologies are compared, which exploit thick-oxide integrated and polyimide standalone transformers, respectively. To this aim, previously available results achieved on a fully integrated isolation technology (i.e., thick-oxide integrated transformer) are compared with the experimental performance of a DC-DC converter for 20-V gate driver applications, specifically designed and implemented by exploiting a stand-alone polyimide transformer. The comparison highlights that similar performance in terms of power efficiency can be achieved at lower output power levels (i.e., about 200 mW), while the fully integrated approach is more effective at higher power levels with a better power density. On the other hand, the stand-alone polyimide transformer approach allows higher technology flexibility for the active circuitry while being less expensive and suitable for reinforced isolation. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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14 pages, 3983 KiB  
Article
Hybrid Cross Coupled Differential Pair and Colpitts Quadrature Digitally Controlled Oscillator Architecture
by Igor Butryn, Krzysztof Siwiec and Witold Adam Pleskacz
Electronics 2021, 10(10), 1132; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10101132 - 11 May 2021
Cited by 2 | Viewed by 2322
Abstract
Growing importance of wireless communication systems forces reduction of power consumption of the designed integrated circuits. The paper focuses on minimization of power consumption in a digitally controlled oscillator (DCO) that can be employed as oscillator in GPS/Galileo receiver. The new hybrid architecture [...] Read more.
Growing importance of wireless communication systems forces reduction of power consumption of the designed integrated circuits. The paper focuses on minimization of power consumption in a digitally controlled oscillator (DCO) that can be employed as oscillator in GPS/Galileo receiver. The new hybrid architecture of DCO combines good phase noise performance of a Colpitts oscillator and relaxed startup conditions of a cross-coupled differential pair oscillator. The proposed new DCO generates a quadrature signal in a current reused frequency divider. Such solution allows of the dissipated power to be reduced. The DCO has been implemented in 110 nm CMOS technology. It generates output signal in frequency range from 1.52 GHz to 1.6 GHz and consumes 1.1 mW from 1.5 V supply voltage. The measured phase noise equals −116 dBc/Hz at 1 MHz offset from 1.575 GHz output signal. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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11 pages, 5242 KiB  
Article
An Ultra-Low-Power K-Band 22.2 GHz-to-26.9 GHz Current-Reuse VCO Using Dynamic Back-Gate-Biasing Technique
by Xiaoying Deng and Peiqi Tan
Electronics 2021, 10(8), 889; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10080889 - 08 Apr 2021
Cited by 3 | Viewed by 1907
Abstract
An ultra-low-power K-band LC-VCO (voltage-controlled oscillator) with a wide tuning range is proposed in this paper. Based on the current-reuse topology, a dynamic back-gate-biasing technique is utilized to reduce power consumption and increase tuning range. With this technique, small dimension cross-coupled pairs are [...] Read more.
An ultra-low-power K-band LC-VCO (voltage-controlled oscillator) with a wide tuning range is proposed in this paper. Based on the current-reuse topology, a dynamic back-gate-biasing technique is utilized to reduce power consumption and increase tuning range. With this technique, small dimension cross-coupled pairs are allowed, reducing parasitic capacitors and power consumption. Implemented in SMIC 55 nm 1P7M CMOS process, the proposed VCO achieves a frequency tuning range of 19.1% from 22.2 GHz to 26.9 GHz, consuming only 1.9 mW–2.1 mW from 1.2 V supply and occupying a core area of 0.043 mm2. The phase noise ranges from −107.1 dBC/HZ to −101.9 dBc/Hz at 1 MHz offset over the whole tuning range, while the total harmonic distortion (THD) and output power achieve −40.6 dB and −2.9 dBm, respectively. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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11 pages, 3269 KiB  
Article
An E-Band 21-dB Variable-Gain Amplifier with 0.5-V Supply in 40-nm CMOS
by Gibeom Shin, Kyunghwan Kim, Kangseop Lee, Hyun-Hak Jeong and Ho-Jin Song
Electronics 2021, 10(7), 804; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10070804 - 29 Mar 2021
Cited by 4 | Viewed by 2695
Abstract
This paper presents a variable-gain amplifier (VGA) in the 68–78 GHz range. To reduce DC power consumption, the drain voltage was set to 0.5 V with competitive performance in the gain and the noise figure. High-Q shunt capacitors were employed at the gate [...] Read more.
This paper presents a variable-gain amplifier (VGA) in the 68–78 GHz range. To reduce DC power consumption, the drain voltage was set to 0.5 V with competitive performance in the gain and the noise figure. High-Q shunt capacitors were employed at the gate terminal of the core transistors to move input matching points for easy matching with a compact transformer. The four stages amplifier fabricated in 40-nm bulk complementary metal oxide semiconductor (CMOS) showed a peak gain of 24.5 dB at 71.3 GHz and 3‑dB bandwidth of more than 10 GHz in 68–78 GHz range with approximately 4.8-mW power consumption per stage. Gate-bias control of the second stage in which feedback capacitances were neutralized with cross-coupled capacitors allowed us to vary the gain by around 21 dB in the operating frequency band. The noise figure was estimated to be better than 5.9 dB in the operating frequency band from the full electromagnetic (EM) simulation. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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12 pages, 4357 KiB  
Article
A 24 GHz Direct Conversion Receiver for FMCW Ranging Radar Based on Low Flicker Noise Mixer
by Dongze Li, Qingzhen Xia, Jiawei Huang, Jinwei Li, Hudong Chang, Bing Sun and Honggang Liu
Electronics 2021, 10(6), 722; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10060722 - 18 Mar 2021
Cited by 5 | Viewed by 2246
Abstract
In this paper, a 24 GHz direct conversion receiver (DCR) for frequency-modulated continuous-wave (FMCW) ranging radar based on low flicker noise mixer in 90 nm silicon-on-insulator (SOI) CMOS technology is presented. A low-noise and low-power low-noise-amplifier (LNA) adopting simultaneous noise and input matching [...] Read more.
In this paper, a 24 GHz direct conversion receiver (DCR) for frequency-modulated continuous-wave (FMCW) ranging radar based on low flicker noise mixer in 90 nm silicon-on-insulator (SOI) CMOS technology is presented. A low-noise and low-power low-noise-amplifier (LNA) adopting simultaneous noise and input matching (SNIM) method is designed. Neutralized technology and boost inductor are introduced to improve performance. The measurement results of standalone LNA show that the peak gain is 17.2 dB at 23.8 GHz and the −3 dB bandwidth is around 2.2 GHz from 22.8 GHz to 25 GHz. The LNA achieves an average 3 dB NF within the 24 GHz band. A current-bleeding mixer is used to lower noise and the factors influencing flicker noise have been discussed. Proper element values and local oscillator (LO) power have been chosen to make the mixer low-noise. Measurement results illustrate that the receiver exhibits 20.3 dB peak gain, 7 dB SSB noise figure (NF) and −22 dBm IP1dB. Flicker noise of the mixer and the receiver are measured respectively and the noise knee-point of receiver is observed 60 kHz. The receiver consumes only 16 mW with chip area of 0.65 mm2 including pads. The results demonstrate that the proposed receiver can be a promising candidate for FMCW ranging radar. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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11 pages, 4445 KiB  
Article
Transformer-Based VCO for W-Band Automotive Radar Applications
by Andrea Cavarra, Giuseppe Papotto, Alessandro Parisi, Alessandro Finocchiaro, Claudio Nocera and Giuseppe Palmisano
Electronics 2021, 10(5), 531; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10050531 - 25 Feb 2021
Cited by 6 | Viewed by 2655
Abstract
A transformer-based voltage-controlled oscillator for a W-band frequency-modulated continuous-wave (FMCW) automotive radar application is presented. The design challenges imposed by the millimeter-wave frequency operation were faced through a circuit and layout co-design approach, supported by extensive electromagnetic simulations and accurate analysis of both [...] Read more.
A transformer-based voltage-controlled oscillator for a W-band frequency-modulated continuous-wave (FMCW) automotive radar application is presented. The design challenges imposed by the millimeter-wave frequency operation were faced through a circuit and layout co-design approach, supported by extensive electromagnetic simulations and accurate analysis of both the start-up condition and the tank quality factor. The oscillator was implemented in a 28-nm fully depleted silicon-on-insulator (SOI) complementary metal–oxide–semiconductor (CMOS) technology. It provided a 37 GHz oscillation frequency with a variation of around 4 GHz, thus achieving a tuning range of 11%. Moreover, a 77 GHz output signal was also delivered, which was extracted as a second harmonic from the input-pair common-mode node. The circuit exhibited low phase noises, whose average performances were −97 dBc/Hz and −121 dBc/Hz at 1 MHz and 10 MHz offset frequencies, respectively. It delivered a 77-GHz output power of −10.5 dBm and dissipated 26 mW with a 1 V power supply. The silicon area occupation was 300 × 135 µm. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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14 pages, 1687 KiB  
Article
A Ku-Band Fractional-N Frequency Synthesizer with Adaptive Loop Bandwidth Control
by Youming Zhang, Xusheng Tang, Zhennan Wei, Kaiye Bao and Nan Jiang
Electronics 2021, 10(2), 109; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10020109 - 07 Jan 2021
Cited by 3 | Viewed by 2780
Abstract
This paper presents a Ku-band fractional-N frequency synthesizer with adaptive loop bandwidth control (ALBC) to speed up the lock settling process and meanwhile ensure better phase noise and spur performance. The theoretical analysis and circuits implementation are discussed in detail. Other key [...] Read more.
This paper presents a Ku-band fractional-N frequency synthesizer with adaptive loop bandwidth control (ALBC) to speed up the lock settling process and meanwhile ensure better phase noise and spur performance. The theoretical analysis and circuits implementation are discussed in detail. Other key modules of the frequency synthesizer such as broadband voltage-controlled oscillator (VCO) with auto frequency calibration (AFC) and programable frequency divider/charge pump/loop filter are designed for integrity and flexible configuration. The proposed frequency synthesizer is fabricated in 0.13 μm CMOS technology occupying 1.14 × 1.18 mm2 area including ESD/IOs and pads, and the area of the ALBC is only 55 × 76 μm2. The out frequency can cover from 11.37 GHz to 14.8 GHz with a frequency tuning range (FTR) of 26.2%. The phase noise is −112.5 dBc/Hz @ 1 MHz and −122.4 dBc/Hz @ 3 MHz at 13 GHz carrier frequency. Thanks to the proposed ALBC, the lock-time can be shortened by about 30% from about 36 μs to 24 μs. The chip area and power consumption of the proposed ALBC technology are slight, but the beneficial effect is significant. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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10 pages, 2765 KiB  
Article
Wideband Band-Pass Filter Design Using Coupled Line Cross-Shaped Resonator
by Dong-Sheng La, Xin Guan, Shuai-Ming Chen, Yu-Ying Li and Jing-Wei Guo
Electronics 2020, 9(12), 2173; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics9122173 - 17 Dec 2020
Cited by 6 | Viewed by 2400
Abstract
In this paper, a wideband bandpass filter with a coupled line cross-shaped resonator (CLCSR) is proposed. The proposed bandpass filter is composed of two open-end parallel coupled lines, one short-end parallel coupled line, one branch microstrip line, and the parallel coupled line feed [...] Read more.
In this paper, a wideband bandpass filter with a coupled line cross-shaped resonator (CLCSR) is proposed. The proposed bandpass filter is composed of two open-end parallel coupled lines, one short-end parallel coupled line, one branch microstrip line, and the parallel coupled line feed structure. With the use of the even and odd mode approach, the transmission zeros and transmission poles of the proposed bandpass filter are analyzed. The coupling coefficient of the parallel coupled line feed structure is big, so the distance between the parallel coupled line is too small to be processed. A three microstirp lines coupled structure is used to realize strong coupling and cross coupling. This structure also can reduce the return loss in passband and increase the out-of-band rejection. The transmission zeros can be adjusted easily by varying the lengths of the open-end parallel coupled line or the short-end parallel coupled line. The proposed bandpass filter is fabricated and measured. The simulated results agree well with the measured ones, which shows that the design method is valid. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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15 pages, 8003 KiB  
Article
A Comparative Analysis between Standard and mm-Wave Optimized BEOL in a Nanoscale CMOS Technology
by Egidio Ragonese, Claudio Nocera, Andrea Cavarra, Giuseppe Papotto, Simone Spataro and Giuseppe Palmisano
Electronics 2020, 9(12), 2124; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics9122124 - 11 Dec 2020
Cited by 3 | Viewed by 2303
Abstract
This paper presents an extensive comparison of two 28-nm CMOS technologies, i.e., standard and mm-wave-optimized (i.e., thick metals and intermetal oxides) back-end-of-line (BEOL). The proposed comparison is carried out at both component and circuit level by means of a quantitative analysis of the [...] Read more.
This paper presents an extensive comparison of two 28-nm CMOS technologies, i.e., standard and mm-wave-optimized (i.e., thick metals and intermetal oxides) back-end-of-line (BEOL). The proposed comparison is carried out at both component and circuit level by means of a quantitative analysis of the actual performance improvements due to the adoption of a mm-wave-optimized BEOL. To this end, stand-alone transformer performance is first evaluated and then a complete mm-wave macroblock is investigated. A 77-GHz down-converter for frequency modulated continuous wave (FMCW) long-range/medium range (LR/MR) radar applications is exploited as a testbench. For the first time, it is demonstrated that thicker metals and intermetal oxides do not guarantee significant improvements at mm-wave frequencies and a standard (low-cost) BEOL is competitive in comparison with more complex (expensive) ones. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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13 pages, 4498 KiB  
Article
Chebyshev-Response Branch-Line Couplers with Enhanced Bandwidth and Arbitrary Coupling Level
by Robert Smolarz, Krzysztof Wincza and Slawomir Gruszczynski
Electronics 2020, 9(11), 1828; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics9111828 - 02 Nov 2020
Cited by 6 | Viewed by 3173
Abstract
A new approach to the synthesis of broadband branch-line couplers with arbitrary coupling level was investigated in this paper. It was shown that the operational bandwidth of a classic branch-line coupler can be increased by utilizing N-section impedance transformers added to each of [...] Read more.
A new approach to the synthesis of broadband branch-line couplers with arbitrary coupling level was investigated in this paper. It was shown that the operational bandwidth of a classic branch-line coupler can be increased by utilizing N-section impedance transformers added to each of the coupler’s ports. Furthermore, the obtained response can be approximated by the Chebyshev polynomial. Moreover, it was proven that for such couplers a range of coupling coefficient values can be obtained by the modification of classic branch-line topology. The analysis of the electrical parameters of the proposed branch-line couplers was comprehensively investigated. To verify the correctness of the proposed design procedures, 3-dB, and 6-dB broadband branch-line couplers operating at the center frequency of 2 GHz having return losses greater than 20 dB were designed, fabricated, and measured. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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10 pages, 4502 KiB  
Article
Absorptive K-Band Bandpass Filter Using a Balanced Recursive Structure
by Seong-Mo Moon, Han Lim Lee and Moon-Que Lee
Electronics 2020, 9(10), 1633; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics9101633 - 03 Oct 2020
Viewed by 2346
Abstract
This article presents a new K-band absorptive bandpass filter (ABPF) based on a microwave balanced recursive architecture. The proposed structure was configured using two passive microwave hybrid couplers, two conventional bandpass filters (BPFs), and a recursive path control module consisting of a phase [...] Read more.
This article presents a new K-band absorptive bandpass filter (ABPF) based on a microwave balanced recursive architecture. The proposed structure was configured using two passive microwave hybrid couplers, two conventional bandpass filters (BPFs), and a recursive path control module consisting of a phase shifter and an optionally variable gain amplifier. Using the proposed structure, stable return characteristics that were insensitive to the output load variation in the passband, a reduction in standing wave due to absorption in the stopband, and potentially high reliability could be achieved. Furthermore, since the same BPFs were reused, the electrical filtering order within the given physical BPF stages could be increased effectively. The proposed architecture was verified by comparing it with the performance of the conventional two-stage cascaded BPF. The measured results showed a 3 dB passband at 280 MHz with the center frequency at 19.9 GHz and improved roll-off characteristics. Furthermore, the stopband showed the reflectionless characteristic with the return loss being better than 7 dB. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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14 pages, 1833 KiB  
Article
EM-Sign: A Non-Contact Recognition Method Based on 24 GHz Doppler Radar for Continuous Signs and Dialogues
by Linting Ye, Shengchang Lan, Kang Zhang and Guiyuan Zhang
Electronics 2020, 9(10), 1577; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics9101577 - 26 Sep 2020
Cited by 5 | Viewed by 2841
Abstract
We studied continuous sign language recognition using Doppler radar sensors. Four signs in Chinese sign language and American sign language were captured and extracted by complex empirical mode decomposition (CEMD) to obtain spectrograms. Image sharpening was used to enhance the micro-Doppler signatures of [...] Read more.
We studied continuous sign language recognition using Doppler radar sensors. Four signs in Chinese sign language and American sign language were captured and extracted by complex empirical mode decomposition (CEMD) to obtain spectrograms. Image sharpening was used to enhance the micro-Doppler signatures of the signs. To classify the different signs, we utilized an improved Yolov3-tiny network by replacing the framework with ResNet and fine-tuned the network in advance. This method can remove the epentheses from the training process. Experimental results revealed that the proposed method can surpass the state-of-the-art sign language recognition methods in continuous sign recognition with a precision of 0.924, a recall of 0.993, an F1-measure of 0.957 and a mean average precision (mAP) of 0.99. In addition, dialogue recognition in three daily conversation scenarios was performed and evaluated. The average word error rate (WER) was 0.235, 10% lower than in of other works. Our work provides an alternative form of sign language recognition and a new approach to simplify the training process and achieve a better continuous sign language recognition effect. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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12 pages, 2295 KiB  
Article
A 4-mW Temperature-Stable 28 GHz LNA with Resistive Bias Circuit for 5G Applications
by Dongze Li, Qingzhen Xia, Jiawei Huang, Jinwei Li, Hudong Chang, Bing Sun and Honggang Liu
Electronics 2020, 9(8), 1225; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics9081225 - 30 Jul 2020
Cited by 5 | Viewed by 4191
Abstract
This paper presents a low power two-stage single-end (SE) 28 GHz low-noise amplifier (LNA) in 90 nm silicon-on-insulator (SOI) CMOS technology for 5G applications. In this design, the influence of bias circuit is discussed. The 1200 Ω resistor which was adopted in bias [...] Read more.
This paper presents a low power two-stage single-end (SE) 28 GHz low-noise amplifier (LNA) in 90 nm silicon-on-insulator (SOI) CMOS technology for 5G applications. In this design, the influence of bias circuit is discussed. The 1200 Ω resistor which was adopted in bias circuit can feed DC voltage as well as keep whole circuit unconditionally stable. The gate bias points are set to 0.55 V to make the circuit low-power and temperature-stable. Measurement results illustrated that the LNA achieved a maximum small signal gain of 18.1 dB and an average 3.1 dB noise figure (NF) in operating frequency band. Measured S11 was below −10 dB between 25 GHz and 29 GHz and reverse isolation S12 was below −25 dB throughout the band. It consumed only 4 mW by proper selection of bias point with core area of 0.16 mm2 without pads. The fabricated LNA has demonstrated a gain variation of 3 dB and a NF variation of 1.9 dB from −40 °C to 125 °C with power variation of 0.8 mW. It suggests that the proposed SOI CMOS LNA can be a promising candidate for 5G applications. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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14 pages, 2879 KiB  
Article
Reduction of Spurious Signal Upconversion in Frequency Multipliers
by Zenon Szczepaniak and Tomasz Rogala
Electronics 2020, 9(7), 1126; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics9071126 - 10 Jul 2020
Cited by 1 | Viewed by 2384
Abstract
Usually many applications of radar transceivers and heterodyne frequency synthesizers assume a spurious signal power level below −60 dBc. In the case of modern synthesizers using direct digital synthesis (DDS) systems, the number of emerging spurious signal frequencies is very large, and spectral [...] Read more.
Usually many applications of radar transceivers and heterodyne frequency synthesizers assume a spurious signal power level below −60 dBc. In the case of modern synthesizers using direct digital synthesis (DDS) systems, the number of emerging spurious signal frequencies is very large, and spectral purity within −60 dBc can only be obtained in the relatively narrow tuning band of the DDS unit. For the purposes of widening this useful frequency range, the frequency multiplying operation is applied commonly. Then, during the process of frequency multiplication of the baseband signal containing inband spurious signals, the effect of the upconversion of spurious signals occurs. The paper contains an analysis of the undesirable effects of the conversion of spurious signal frequencies accompanying the process of frequency multiplication. A method of reducing the level of upconverted spurious signals is proposed. The numerical calculations and measurement results are provided. For the case of a frequency multiplier with a multiplying factor equal to N, the power ratio between the desired output signal and upconverted spurious signal drops by an additional 1/N2. It has been found that the application of the presented method during the design process of the frequency multiplier allows this ratio to be improved by 6 dB. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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17 pages, 5773 KiB  
Article
A CMOS Data Transfer System Based on Planar RF Coupling for Reinforced Galvanic Isolation with 25-kV Surge Voltage and 250-kV/µs CMTI
by Egidio Ragonese, Nunzio Spina, Alessandro Parisi and Giuseppe Palmisano
Electronics 2020, 9(6), 943; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics9060943 - 05 Jun 2020
Cited by 6 | Viewed by 3496
Abstract
This paper exploits an effective approach to overcome the breakdown limitations of traditional galvanic isolators based on chip-scale isolation barriers, thus achieving a very high isolation rating (i.e., compliant with the reinforced isolation requirements). Such an approach is based on radio frequency (RF) [...] Read more.
This paper exploits an effective approach to overcome the breakdown limitations of traditional galvanic isolators based on chip-scale isolation barriers, thus achieving a very high isolation rating (i.e., compliant with the reinforced isolation requirements). Such an approach is based on radio frequency (RF) planar coupling between two side-by-side co-packaged chips. Standard packaging along with proper assembling techniques can be profitably used to go beyond 20-kV surge voltage without using expensive or exotic isolation components. As a proof of concept, a bidirectional data transfer system based on RF planar coupling able to withstand an isolation rating as high as 25 kV has been designed in a low-cost standard 0.35-µm CMOS technology. Experimental measurements demonstrated a maximum data rate of 40 Mbit/s using a carrier frequency of about 1 GHz. The adopted approach also guarantees a common mode transient immunity (CMTI) of 250 kV/µs, which is a first-rate performance in view of next generation galvanic isolators for wide-bandgap power semiconductor devices, such as gallium nitride high-electron mobility transistors (GaN HEMTs) and silicon carbide (SiC) MOSFETs. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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7 pages, 2505 KiB  
Article
Differential Bi-Level Microstrip Directional Coupler with Equalized Coupling Coefficients for Directivity Improvement
by Slawomir Gruszczynski, Robert Smolarz and Krzysztof Wincza
Electronics 2020, 9(4), 547; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics9040547 - 25 Mar 2020
Cited by 1 | Viewed by 3159
Abstract
In this paper, a bi-level microstrip differential directional coupler has been investigated. It has been shown that the equalization of coupling coefficients can be successfully made with the use of appropriate dielectric stack-up and conductor geometry. The application of additional top dielectric layer [...] Read more.
In this paper, a bi-level microstrip differential directional coupler has been investigated. It has been shown that the equalization of coupling coefficients can be successfully made with the use of appropriate dielectric stack-up and conductor geometry. The application of additional top dielectric layer can ensure proper equalization of coupling coefficients by lowering the value of capacitive coupling coefficient to the value of the inductive one. The theoretically investigated coupled-line section has been used for the design of a 3-dB differential directional coupler. The measurement results are compared with the theoretical ones. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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13 pages, 3916 KiB  
Article
A Compact UWB Bandpass Chip Filter on a GaAs Substrate with Modified Chebyshev Structure
by Shanwen Hu, Yunqing Hu, Yiting Gao, Xiaodong Zhang, Xinlei Zhang, Zixuan Wang, Bo Zhou, Zhikuang Cai and Yufeng Guo
Electronics 2020, 9(2), 313; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics9020313 - 11 Feb 2020
Cited by 2 | Viewed by 2635
Abstract
Ultra-Wideband (UWB) systems are widely used in low-power, high-speed, high-security short-range wireless communication systems throughout digital homes and offices. In the RF front-end of a UWB system, bandpass filters (BPFs) are used to put through the passband signals and reject the stopband signals. [...] Read more.
Ultra-Wideband (UWB) systems are widely used in low-power, high-speed, high-security short-range wireless communication systems throughout digital homes and offices. In the RF front-end of a UWB system, bandpass filters (BPFs) are used to put through the passband signals and reject the stopband signals. Most UWB BPFs are designed with dielectric materials on circuit boards or LTCC technology. In this paper, a very compact fully integrated UWB chip filter is proposed and designed on a GaAs substrate with nitride as dielectric layers to meet the small size requirement of portable devices for next-generation UWB applications. The filter is constructed with a modified Chebyshev structure. The final filter circuit contains only four inductors instead of six for the conventional Chebyshev filter, which makes the chip more compact and cost effective. The filter is designed and fabricated on a 0.25 μm GaAs pHEMT technology with a chip size of only 0.73 mm × 0.51 mm including the chip edge and scribe line area, while the filter core area is only 0.61 mm × 0.39 mm, including bonding PADs. The measurement results illustrated that the proposed BPF shows a passband covering the frequency range of 3.1–9.0 GHz, the minimum passband insertion loss is only 1.5 dB, the stopband rejection is better than −30 dB throughout frequencies below 2 GHz and above 12 GHz, S11 is less than −16 dB, and S22 is better than −11 dB during the whole passband range. It demonstrated that the proposed filter can be considered as one of the most compact UWB filters. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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14 pages, 5000 KiB  
Article
Application of a Stub-Loaded Square Ring Resonator for Wideband Bandpass Filter Design
by Ping Zhang, Liqin Liu, Deli Chen, Min-Hang Weng and Ru-Yuan Yang
Electronics 2020, 9(1), 176; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics9010176 - 17 Jan 2020
Cited by 19 | Viewed by 3415
Abstract
In this paper, a stub-loaded square ring resonator (SLSRR) is analyzed and applied to design a very simple and compact wideband bandpass filter structure. Resonant modes dependent on the structure parameters of the SLSRR are analyzed first, and then the first two modes [...] Read more.
In this paper, a stub-loaded square ring resonator (SLSRR) is analyzed and applied to design a very simple and compact wideband bandpass filter structure. Resonant modes dependent on the structure parameters of the SLSRR are analyzed first, and then the first two modes are used to achieve a required passband. The input and output terminals are supplied with high impedance and strong coupling to provide sufficient coupling energy. Two wideband filter examples are designed, manufactured, and measured using the SLSRRs. The first filter is a wideband filter with a wide upper stopband, and the second filter is a dual wideband filter with a notched stopband between two passbands. The two filter examples are designed, fabricated, and measured to verify the design concept and present the advantages of easy design and a simple and compact structure. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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9 pages, 3402 KiB  
Article
A Compact 3.3–3.5 GHz Filter Based on Modified Composite Right-/Left-Handed Resonator Units
by Shanwen Hu, Yunqing Hu, Haiyu Zheng, Weiguang Zhu, Yiting Gao and Xiaodong Zhang
Electronics 2020, 9(1), 1; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics9010001 - 18 Dec 2019
Cited by 11 | Viewed by 3672
Abstract
In the RF (Radio Frequency) front-end of a communication system, bandpass filters (BPFs) are used to send passband signals and reject stopband signals. Substrate-integrated waveguides (SIW) are widely used in RF filter designs due to their low loss and low cost and the [...] Read more.
In the RF (Radio Frequency) front-end of a communication system, bandpass filters (BPFs) are used to send passband signals and reject stopband signals. Substrate-integrated waveguides (SIW) are widely used in RF filter designs due to their low loss and low cost and the flexibility of their integration properties. However, SIW filters under 6 GHz are still too large to meet the requirement of portable communication devices due to their long wavelength. In this paper, a very compact fully integrated SIW filter is proposed and designed with RT6010 dielectric material to meet the small size requirement of portable devices for next-generation sub-6 G applications. The proposed filter contains two sawtooth-shaped composite right-/left-handed (CRLH) resonator units, instead of traditional rectangular-shaped CRLH resonator units, which makes the filter more compact and cost effective. The filter is designed and fabricated on an RT6010 substrate, with a size of only 10 mm × 7.4 mm. The measurement results illustrated that the proposed BPF shows a passband covering the frequency range of 3.25–3.45 GHz; the minimum passband insertion loss is only 2.4 dB; the stopband rejection is better than −20 dB throughout the frequencies below 3.0 GHz and above 3.8 GHz; S11 is as low as −37 dB at 3.35 GHz; and the group delay variation is only 1.4 ns throughout the operation bandwidth. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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17 pages, 8412 KiB  
Article
Realization of High-Performance Broadband Quadrature Directional Couplers in UMS PH25 Technology
by Slawomir Gruszczynski, Robert Smolarz and Krzysztof Wincza
Electronics 2019, 8(12), 1520; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics8121520 - 11 Dec 2019
Cited by 5 | Viewed by 3497
Abstract
The problem of the realization of broadband quadrature directional couplers in UMS (United Monolithic Semiconductors) PH25 is thoroughly investigated. The limitations of the selected technology are discussed with respect to directional couplers’ design. It is shown that, in such technologies, two major problems [...] Read more.
The problem of the realization of broadband quadrature directional couplers in UMS (United Monolithic Semiconductors) PH25 is thoroughly investigated. The limitations of the selected technology are discussed with respect to directional couplers’ design. It is shown that, in such technologies, two major problems have to be overcome to achieve the high-performance of the resulting integrated couplers, i.e., the realization of appropriate coupling together with appropriate characteristic impedances, and the equalization of inductive and capacitive coupling coefficients that are inherently different in inhomogeneous dielectric structures. Three different solutions that allow for achieving strong coupling in the selected UMS PH25 process were selected and experimentally investigated, showing the possibility of such circuits’ realization. In each of the presented integrated couplers, capacitive compensation techniques were applied for coupling coefficients’ equalization. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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Review

Jump to: Research

12 pages, 8427 KiB  
Review
Compact Galvanically Isolated Architectures for Low-Power DC-DC Converters with Data Transmission
by Egidio Ragonese, Alessandro Parisi, Nunzio Spina and Giuseppe Palmisano
Electronics 2021, 10(19), 2328; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics10192328 - 23 Sep 2021
Cited by 2 | Viewed by 2730
Abstract
This paper reviews state-of-the-art architectures for galvanically isolated DC-DC converters with data transmission for low-power applications. Such applications do not have stringent requirements, in terms of power efficiency, but ask for very compact, highly integrated implementations. To this aim, architecture simplicity is crucial, [...] Read more.
This paper reviews state-of-the-art architectures for galvanically isolated DC-DC converters with data transmission for low-power applications. Such applications do not have stringent requirements, in terms of power efficiency, but ask for very compact, highly integrated implementations. To this aim, architecture simplicity is crucial, especially when data transmission and/or output power regulation are required. Since the bottleneck of galvanically isolated systems is the isolation device (i.e., typically a stacked thick oxide or polyimide transformer), the reduction of the number of isolated links, while preserving both power and data functionalities, is the more effective strategy to increase the level of integration, reduce the form factor, and have a lower cost per channel. Specifically, this review compares the pros and cons of different architectures that address this challenge differently from traditional solutions. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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15 pages, 5132 KiB  
Review
A Review on Biomedical MIMO Radars for Vital Sign Detection and Human Localization
by Emanuele Cardillo and Alina Caddemi
Electronics 2020, 9(9), 1497; https://0-doi-org.brum.beds.ac.uk/10.3390/electronics9091497 - 11 Sep 2020
Cited by 46 | Viewed by 6529
Abstract
This paper reports a thorough overview on the last developments concerning the vital sign detection and the human localization employing the multiple-input-multiple-output (MIMO) technology. The wireless motion and vital sign detection represents an outstanding research area aimed at monitoring the health conditions of [...] Read more.
This paper reports a thorough overview on the last developments concerning the vital sign detection and the human localization employing the multiple-input-multiple-output (MIMO) technology. The wireless motion and vital sign detection represents an outstanding research area aimed at monitoring the health conditions of human subjects and at detecting their presence in different environments with minimal concern. MIMO radars exhibit several interesting advantages over conventional single-input-single-output architectures mainly related to their angle detection capabilities and enhanced signal-to-noise ratio. This paper describes the main features and details the operating principles of MIMO technology. Thereafter, it summarizes the state-of-the-art of the available solutions with the purpose of fueling the research activities on this hot topic. Full article
(This article belongs to the Special Issue RF/Mm-Wave Circuits Design and Applications)
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