Hybrid LLC Converter with Wide Range of Zero-Voltage Switching and Wide Input Voltage Operation

Abstract

A new hybrid inductor-inductor-capacitor (LLC) converter is investigated to have wide voltage input operation capability and zero-voltage turn-on characteristics. The presented circuit topology can be applied for consumer power units without power factor correction or with long hold-up time requirement, photovoltaic energy conversion and renewable energy power transfer. To overcome the weakness of narrow voltage gain of resonant converter, the hybrid LLC converter with different turns ratio of transformer is presented and the experimental investigation is provided to achieve wide voltage input capability (400 V–50 V). On the input-side, the converter can operate as full bridge resonant circuit or half bridge resonant circuit with input split capacitors for high or low voltage input region. On the output-side, the less or more winding turns is selected to overcome wide voltage input operation. According to the circuit structures and transformer turns ratio, the single stage LLC converter with wide voltage input operation capability (400 V–50 V) is accomplished. The laboratory prototype has been developed and the experimental waveforms are measured and demonstrated to investigate the effectiveness of the presented hybrid LLC converter.

1. Introduction

The renewable energy systems have been presented and established to reduce fossil fuel demand and prevent the influence of global warming. The output of renewable energy sources may be unstable voltage or current with dc or ac waveform. Power electronics play the principle of energy transfer between renewable energy sources and energy storage elements or loads. The output of photovoltaic (PV) panel or small-scale wind turbine generator is an unstable and non-constant dc voltage. Therefore, dc converters with wide voltage input capability are normally demanded to achieve the principle of energy transfer between PV panel (or small-scale wind generator) and energy storage unit or dc load. The power switches of dc-dc converters can be controlled by pulse-width modulation (PWM) [1,2,3] or frequency modulation (FM) [4,5,6]. In PWM control, the switching frequency is fixed but duty cycle is variable in order to control load voltage. In FM control, the duty cycle is fixed and the switching frequency is variable to control voltage transfer function of dc converters and regulate load voltage. Gallium Nitride (GaN) FET, Insulated Gate Bipolar Transistors (IGBTs), Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) and Silicon Carbide (SiC) devices are widely used in power electronics. The main drawback of IGBT devices is low frequency operation. SiC and GaN devices have advantages of high frequency operation and low switching loss for high power density applications. However, SiC and GaN devices have high cost problem compared to MOSFET and IGBT devices. In medium power applications, MOSFET devices have advantages of low cost and medium frequency operation capability. High frequency and high efficiency power converters are demanded to achieve energy transfer from renewable energy sources to the energy storage units. Due to wide voltage variation of the solar panel output or low power wind generator, the soft switching converters with wide voltage input or output operation have studied. The series-connected dc-dc converter has studied in Reference [7] to accomplish wide input voltage operation for power conversion and battery charger applications. The disadvantage of the series-connected dc-dc converter is poor efficiency. The series/parallel-connected converters with wide voltage operation for vehicles were presented in References [8,9,10,11]. The circuit topology needs more active and passive components so that the efficiency and reliability are decreased. Phase-shift PWM scheme with a wide voltage input/output operation were studied in References [12,13,14]. The main problems of these topologies are the complicated control algorithm, high freewheeling current and hard switching operation at low load condition. Interleaved converters with frequency control have been presented in Reference [15] to have low input ripple current and achieve wide voltage input. This circuit topology is still a multistage circuit. The inductor-inductor-capacitor (LLC) converter with different winding turns was reported in Reference [16] to increase hold-up time on power units of personal computer applications. Four secondary windings are needed so that the conduction loss is increased on the transformer windings. In conventional LLC converter, the circuit can operate well at the limit voltage range to achieve low freewheeling current loss and high circuit efficiency. If the wide voltage range operation is demanded, the low inductor ratio between the magnetizing inductor and resonant inductor and low quality factor are needed in conventional LLC converter to achieve high voltage gain. However, the magnetizing inductance is decreased and the circulating current loss is increased. Therefore, the LLC converter efficiency is decreased. To solve this problem, a hybrid LLC circuit operation [17] shown in Figure 1a has been proposed to realize 4:1 wide voltage operation (V_max = 4 V_min). When input voltage is in low voltage range, the full bridge LLC resonant circuit (S₁–S₄ are active,) is operated. On the other hand, the half bridge LLC resonant circuit (S₁ and S₂ are active, S₃ OFF and S₄ ON) is used under high voltage input case. Therefore, wide input voltage operation is achieved in this circuit topology. However, there is a dc voltage level on the resonant capacitor when LLC circuit is operated at half bridge circuit structure. A hybrid LLC converter [18] has been studied to achieve 8:1 wide output voltage operation (V_o,max = 8 V_o,min). This circuit topology is based on a full bridge resonant circuit and an ac switch on the primary-side and a hybrid diode rectifier on the output-side. Compares to Reference [17], the half bridge LLC circuit with split input capacitors is used in Reference [18] to avoid a dc voltage level on the resonant capacitor under low voltage output operation. In order to extend output voltage range, a hybrid output rectifier with a full-wave rectification or a half-wave rectification structure is adopted on the secondary-side in Reference [18]. The main disadvantage of this circuit topology in Reference [18] is four diode conduction losses on the secondary-side when full-wave rectification structure is operated.

A new LLC converter is presented to realize wide range of input voltage operation. The LLC resonant circuit is used in the studied converter to achieve soft switching operation for all power devices due to inductive input impedance operation by pulse frequency modulation. To realize wide voltage input operation, the half bridge with split capacitors or full bridge equivalent LLC circuit can be operated on high-voltage side and the voltage doubler rectifier with different secondary turns is adopted on low-voltage side. Due to the different input voltage range, three circuit structures with different voltage gains are controlled to overcome wide range of input voltage variation. The input voltage range of the studied circuit topology is 50 V–400 V. For high voltage input (200 V–400 V), half bridge LLC circuit with fewer winding turns is used to obtain the least voltage gain and regulate load voltage. For medium voltage input (100 V–200 V), full bridge LLC circuit with fewer secondary turns is controlled to attain high voltage gain. For low voltage input (50 V–100 V), full bridge LLC circuit with more winding turns is adopted to obtain the largest voltage gain. Thus, the wide voltage operation (50 V–400 V) is realized in the studied LLC converter. Compared to the multistage converters or series/parallel converters, the proposed converter has simple circuit structure and control scheme by using the general analog integrated circuit. Compared to the 4:1 wide voltage LLC converter in Reference [17] with 4 switches (3 switches) conduction loss at low (high) voltage range, the proposed converter does not a dc voltage level on the resonant capacitor when half bridge LLC equivalent circuit structure with 4 switches conduction loss is operated and the proposed converter has 8:1 wide voltage operation capability. Compared to the 8:1 wide voltage LLC converter in Reference [18], the proposed converter has only two instead of four diode conduction losses on the secondary-side for high current output applications. The laboratory prototype has been developed and the experiments are given to investigate the presentation of the presented converter.

2. Circuit Configuration

The conventional LLC converters are provided in Figure 1. Figure 1a provides the converter schematic of the full bridge resonant circuit with center-tapped rectification and the voltage gain can be calculated as V_o/V_in = G_ac(f_sw)n_s/n_p, where G_ac(f) is the transfer function of resonant tank by L_m, L_r and C_r. The half bridge resonant circuit with center-tapped rectification is illustrated in Figure 1b. The voltage gain is calculated as V_o/V_in = G_ac(f_sw)n_s/(2n_p). Therefore, the full bridge LLC converter has two times of gain of the half bridge resonant circuit. However, the rectifier diodes D₁ and D₂ has at least 2 V_o voltage stress and more winding turns are needed on secondary-side. Figure 1c,d are the other two circuit configurations with voltage doubler rectification. The voltage gains of Figure 1c,d are obtained as V_o/V_in = G_ac(f_sw)(2n_s)/n_p and V_o/V_in = G_ac(f_sw)n_s/n_p, respectively. The voltage rating of D₁ and D₂ is V_o and only one winding set of transformer is used on the output-side. Compared four circuit topologies in Figure 1, the full bridge LLC circuit with voltage double rectification has the largest voltage gain and the half bridge resonant circuit with center-tapped rectification has the least voltage gain.

The proposed converter diagram is shown in Figure 2a to have wide voltage input operation (50 V–400 V) such as solar power or renewable energy conversion. The proposed hybrid LLC converter includes a full bridge resonant circuit (S₁–S₄, L_r, C_r and L_m) and a half bridge resonant circuit (S₃, S₄, S_ac1, L_r, C_r and L_m) on the primary-side and the voltage doubler rectifier with N_s and 2N_s winding turns on the secondary-side. The converter has three different operating sub-circuits for three voltage input regions (400 V–200 V, 200 V–100 V and 100 V–50 V) as shown in Figure 2b–d. If each equivalent circuit in Figure 2b–d is operated to have maximum voltage gain G_max = 2, then the proposed converter in Figure 2a can achieve wide voltage gain from G_min = 1 to G_max = 8. The passive elements C_r, L_r and L_m are the basic LLC resonant components. Due to frequency modulation, the LLC resonant tank is controlled to have an inductive input impedance characteristic and the fundamental input voltage of the resonant tank is leading to the fundamental input current. Power devices S₁–S₄ have soft switching turn-on characteristics. Power devices S_ac1 and S_ac2 are implemented by two back-to-back power MOSFETs. If S_ac1 is ON (OFF), then half bridge (full bridge) resonant circuit is operated on primary-side. S_ac2 is used to determine 2N_s or N_s secondary turns connecting to output-side. In the proposed converter, the circuit needs low (or high) voltage gain under high (or low) voltage input case to control load voltage. If 400 V > V_in > 200 V (high voltage region V_in-H, Figure 2b, S₁, S₂ and S_ac2 turn off, S_ac1 turns on and S₃ and S₄ are controlled by pulse frequency modulation. The square wave voltage v_ab has voltage amplitudes of ±V_in/2 and the magnetizing inductor voltage v_Lm has voltage amplitudes of ±n_pV_o/(2n_s). The voltage gain in Figure 2b is expressed as V_o/V_in-H = G_ac(f_sw)n_s/n_p, where G_ac(f) is the transfer function of the resonant tank by L_m, C_r and L_r. If 200 V > V_in > 100 V (medium voltage region V_in-M, Figure 2c, S_ac1 and S_ac2 turn off and S₁–S₄ are controlled by pulse frequency modulation. The square wave voltage v_ab has voltage amplitudes of ±V_in and the magnetizing inductor voltage v_Lm has voltage amplitudes of ±n_pV_o/(2n_s). The voltage gain in Figure 2c is V_o/V_in-M = G_ac(f_sw)(2n_s)/n_p. If 100 V > V_in > 50 V (low voltage region V_in-L, Figure 2d, S_ac1 turns off, S_ac2 turns on and S₁–S₄ are controlled by pulse frequency modulation. The square wave voltage v_ab has voltage amplitudes of ±V_in and the magnetizing inductor voltage v_Lm has voltage amplitudes of ±n_pV_o/(4n_s). The voltage gain is V_o/V_in-L = G_ac(f_sw)(4n_s)/n_p. From the obtained voltage gains in high, medium and low voltage input regions, it is observed that the circuit has the largest gain G_ac(f_sw)(4n_s)/n_p under low voltage input region (50 V–100 V) and least voltage gain G_ac(f_sw) n_s/n_p at high voltage input region (200 V–400 V).

3. Circuit Analysis and Principle of Operation

From the ON-OFF states of S_ac1 and S_ac2 in Figure 2b–d, the proposed LLC converter can be controlled under three voltage input regions: V_in-H: 400 V–200 V (high voltage region), V_in-M: 200 V–100 V (medium voltage region) and V_in-L: 100 V–50 V (low voltage region). When V_in is in the high voltage, the converter only needs low voltage gain to control load voltage. Therefore, S_ac1 turns on and S_ac2, S₁ and S₂ turn off. The half bridge LLC resonant circuit and low secondary turns are used in Figure 2b. S₃ and S₄ are operated with frequency control. According to the resonant circuit by L_r, C_r, L_m and R_o, the voltage gain under high voltage input region is V_o/V_in-H = n_sG_ac(f_sw)/n_p, where G_ac(f) is the transfer function by L_r, C_r, L_m and R_o. The LLC converter has four or six operating modes under f_sw (switching frequency) > or < f_r (resonant frequency). Since the converter is designed to have wide voltage gain, f_sw is always less than or close to f_r. Therefore, the zero-voltage switching (ZVS) of S₃ and S₄ and zero-current switching (ZCS) of D₃ and D₄ are accomplished. The PWM waveforms of LLC converter operated for high voltage region are illustrated in Figure 3a and the Figure 3b–g provide the equivalent circuits for modes 1–6 for one switching cycle.

• Mode 1 [t₀, t₁]: At t₀, v_CS4 = 0. The current i_Lr flows through D_S4 and S₄ turns on at this instant to have ZCS operation. The secondary current is positive so that D₃ is conducting and capacitor C_o1 is charged. The components C_r and L_r are naturally resonant and the resonant frequency ${\mathrm{f}}_{\mathrm{r}}\approx 1/2\mathsf{\pi }\sqrt{{\mathrm{L}}_{\mathrm{r}}{\mathrm{C}}_{\mathrm{r}}}$.
• Mode 2 [t₁, t₂]: Since f_r > f_sw, i_D3 is decreased to zero at t₁ with ZCS operation and i_Lr(t₁) = i_Lm(t₁). Thus, the load current I_o will discharge C_o1 and C_o2. The current i_Lm(t₂) is obtained ${\mathrm{i}}_{\mathrm{Lm}}({\mathrm{t}}_2)\approx ({\mathrm{n}}_{\mathrm{p}}{\mathrm{V}}_{\mathrm{o}})/(8{\mathrm{n}}_{\mathrm{s}}{\mathrm{L}}_{\mathrm{m}}{\mathrm{f}}_{\mathrm{sw}})$.
• Mode 3 [t₂, t₃]: Power device S₄ turns off at t₂. i_Lr(t₂) will discharge (charge) C_S3 (C_S4). Due to i_Lr(t₂) < i_Lm(t₂), D₄ will naturally conduct and capacitor voltage v_Co2 is increased.
• Mode 4 [t₃, t₄]: At the start of this mode, the capacitor voltage v_CS3 = 0. i_Lr(t₃) is positive and D_S3 is conducting so that S₃ can turn on at this instant to accomplish ZVS. In mode 4, the resonant tank transfers power from input terminal V_in to output terminal V_o.
• Mode 5 [t₄, t₅]: The diode current i_D4 will naturally turn off at t₄ due to f_r > f_sw. In this mode, the load current I_o discharges C_o1 and C_o2. The current i_Lm(t₅) is obtained ${\mathrm{i}}_{\mathrm{Lm}}({\mathrm{t}}_5)\approx -({\mathrm{n}}_{\mathrm{p}}{\mathrm{V}}_{\mathrm{o}})/(8{\mathrm{n}}_{\mathrm{s}}{\mathrm{L}}_{\mathrm{m}}{\mathrm{f}}_{\mathrm{sw}})$
• Mode 6 [t₅, T_sw + t₀]: S₃ turns off at the start of this mode. i_Lr(t₅) discharge (charge) C_S4 (C_S3) and D₃ start conducting. To achieve zero-voltage switching of S₄, |i_Lm(t₅)| must be greater than ${\mathrm{V}}_{\mathrm{in}-\mathrm{H}}\sqrt{2{\mathrm{C}}_{\mathrm{oss}}/({\mathrm{L}}_{\mathrm{m}}+{\mathrm{L}}_{\mathrm{r}})}$. At the end of this mode, v_CS4 = 0.

When V_in is in medium voltage region (V_in-M: 100 V–200 V), S_ac1 and S_ac2 turn off. The full bridge LLC circuit and low secondary turns are used in Figure 2c. The FM scheme is used to control S₁–S₄. The converter has gain V_o/V_in-M = 2G_ac(f_sw)n_s/n_p. The PWM signals and the corresponding circuits are illustrated in Figure 4 for medium voltage input condition.

• Mode 1 [t₀, t₁]: This mode starts at t₀ if the drain voltages v_S4,d = v_S1,d = 0. i_Lr flows through D_S4 and D_S1 so that S₄ and S₁ can turn on with ZVS operation. Since i_Lr(t₀) > i_Lm(t₀), it can observe that D₃ conducts, v_Lm ≈ (n_pV_o)/(2n_s). The resonant frequency by passive elements L_r and C_r in mode 1 is ${\mathrm{f}}_{\mathrm{r}}=1/[2\mathsf{\pi }\sqrt{{\mathrm{L}}_{\mathrm{r}}{\mathrm{C}}_{\mathrm{r}}}]$. The load current I_o discharges C_o2 and i_D3 charges C_o1.
• Mode 2 [t₁, t₂]: If f_sw > f_r, D₃ will naturally turn off at t₁. This mode ends at t₂ and ${\mathrm{i}}_{\mathrm{Lm}}{(\mathrm{t}}_2)\approx {(\mathrm{n}}_{\mathrm{p}}{\mathrm{V}}_{\mathrm{o}}{)/(8\mathrm{n}}_{\mathrm{s}}{\mathrm{L}}_{\mathrm{m}}{\mathrm{f}}_{\mathrm{sw}})$.
• Mode 3 [t₂, t₃]: At t₂, S₄ and S₁ turn off. i_Lr(t₂) discharges C_S3 and C_S2. Since i_Lm(t₂) > i_Lr(t₂), the diode D₄ is forward biased. To realize ZVS turn-on of S₃ and S₂, the current ${\mathrm{i}}_{\mathrm{Lm}}({\mathrm{t}}_2)$ must be greater than ${\mathrm{V}}_{\mathrm{in},\mathrm{M}}\sqrt{{\mathrm{C}}_{\mathrm{oss}}{/(\mathrm{L}}_{\mathrm{m}}{+\mathrm{L}}_{\mathrm{r}})}$.
• Mode 4 [t₃, t₄]: At t₃, C_S3 and C_S2 are discharged to zero. i_Lr(t₃) is positive so that D_S2 and D_s3 are conducting. Thus, the zero-voltage switching of S₃ and S₂ can be achieved after time t₃. Owing to i_Lm(t₃) > i_Lr(t₃), D₄ conducts, v_Lm ≈ –(V_on_p)/(2n_s) and i_Lm decreases. C_o2 is charged.
• Mode 5 [t₄, t₅]: Since f_r > f_sw, D₄ will naturally turn off at t₄. The current i_Lm(t₅) is equal to $-({\mathrm{n}}_{\mathrm{p}}{\mathrm{V}}_{\mathrm{o}})/(8{\mathrm{n}}_{\mathrm{s}}{\mathrm{L}}_{\mathrm{m}}{\mathrm{f}}_{\mathrm{sw}})$.
• Mode 6 [t₅, T_sw + t₀]: At t₅, power devices S₃ and S₂ are turned off. Since i_Lr(t₅) < 0, C_S4 and C_S1 discharge in this mode. To realize ZVS turn-on of S₄ and S₁, the current |i_Lm(t₅)| must be greater than ${\mathrm{V}}_{\mathrm{in},\mathrm{M}}\sqrt{{\mathrm{C}}_{\mathrm{oss}}/({\mathrm{L}}_{\mathrm{m}}+{\mathrm{L}}_{\mathrm{r}})}$. The mode 6 ends at time T_sw + t₀ when v_CS1 = v_CS4 = 0.

If 50 V < V_in < 100 V (low voltage region, V_in-L), S_ac1 turns off and S_ac2 turns on. The LLC circuit and 2N_s secondary turns are used in Figure 2d. For low voltage input region, the converter has gain V_o/V_in-L = 4G_ac(f_sw)n_s/n_p. It can observe the proposed converter under low voltage input region has the largest voltage gain compared to the high and medium voltage regions. Figure 5 illustrates the PWM signals and the corresponding mode circuits.

• Mode 1 [t₀, t₁]: At time t₀, v_CS4 = v_CS1 = 0. D_S4 and D_S1 turn on due to i_Lr(t₀) < 0. The zero-voltage switching of S₄ and S₁ are achieved after time t₀. i_Lr(t₀) > i_Lm(t₀) and D₁ is conducting.
• Mode 2 [t₁, t₂]: Since f_r > f_sw, D₁ will naturally turn off at t₁ and i_Lr(t₁) = i_Lm(t₁). The load current I_o discharges C_o1 and C_o2. C_r, L_m and L_r are naturally resonant with frequency f_p.
• Mode 3 [t₂–t₃]: At t₂, S₄ and S₁ turn off. i_Lr(t₂) discharges C_S3 and C_S2. Since i_Lr(t₂) < i_Lm(t₂), D₂ is forward biased and v_Co2 is increased.
• Mode 4 [t₃, t₄]: Mode 4 starts at t₃ when C_S3 and C_S2 are discharged to zero voltage. i_Lr(t₃) is positive so that D_S3 and D_S2 are conducting. S₃ and S₂ turn on at this moment to have ZVS operation.
• Mode 5 [t₄, t₅]: If f_r > f_sw, D₂ will turn off with zero-current switching at t₄. The load current I_o discharges C_o1 and C_o2.
• Mode 6 [t₅, T_sw + t₀]: This mode starts at t₅, when S₃ and S₂ turn off. i_Lr(t₅) will discharge (charge) C_S4 and C_S1 and D₁ is forward biased. This mode ends at T_sw + t₀ when v_CS4 = v_CS1 = 0.

4. Circuit Characteristics and Design Example

Based on the input voltage regions, S_ac1 and S_ac2 are controlled at on or off state. Therefore, the converter can be operated at three input voltage regions. Full bridge (half bridge) LLC converter is operated to have low (high) voltage gain for low (high) voltage input region. The equivalent resonant circuit is derived in Figure 6a. According to the PWM signals of S₁–S₄, the square wave voltage V_ac is generated. If full bridge LLC converter with S₁–S₄ is operated, the voltage V_ac has voltage values ±V_in in Figure 2c,d. If the half bridge LLC converter with S₃ and S₄ shown in Figure 2b is operated, the voltage V_ac has voltage values ±V_in/2. For medium and high voltage input regions shown in Figure 2b,c, S_ac2 is off. It can obtain the inductor voltage V_Lm = nV_o/2 or -nV_o/2, where n = n_p/n_s, if D₃ or D₄ is conducting. For low voltage input region (Figure 2d), The inductor voltage V_Lm = nV_o/4 or -nV_o/4 if D₁ or D₂ is conducting. In Figure 6a, the input-side and output-side of the resonant tank are all square voltage waveforms. Based on the Fourier Series Analysis (FSA), the square voltage waveform is expressed as the summation of the fundamental frequency component and the higher order harmonic frequency components. Thus, the circuit analysis of the resonant circuit in Figure 6a is related to the nonlinear and nonsinusoidal circuit analysis. If the output voltage at higher order harmonic frequencies are less than the fundamental harmonic voltage, then only the fundamental harmonic of square voltage wave is considered in Figure 6b to simply the circuit analysis and design the resonant converter. The fundamental harmonic approximation (FHA) approach has acceptable design results if the LLC converter is operated at or close to the resonant frequency f_r. In Figure 6b, the rms values of fundamental harmonic voltage at input and output side are given as.

$${\mathrm{V}}_{\mathrm{ac},\mathrm{f}}=\left\{\begin{array}{c}\frac{2\sqrt{2}{\mathrm{V}}_{\mathrm{in}}}{\mathsf{\pi }}, {\mathrm{S}}_{\mathrm{ac},1} \mathrm{off}\\ \frac{\sqrt{2}{\mathrm{V}}_{\mathrm{in}}}{\mathsf{\pi }}, {\mathrm{S}}_{\mathrm{ac},1} \mathrm{on}\end{array}\right.$$

(1)

$${\mathrm{V}}_{\mathrm{Lm},\mathrm{f}}=\left\{\begin{array}{c}\sqrt{2}{\mathrm{nV}}_{\mathrm{o}}/\mathsf{\pi }, {\mathrm{S}}_{\mathrm{ac}2} \mathrm{off}\\ {\mathrm{nV}}_{\mathrm{o}}/(\sqrt{2}\mathsf{\pi }), {\mathrm{S}}_{\mathrm{ac}2} \mathrm{on}\end{array}\right.$$

(2)

The ac equivalent load resistance R_e,ac can be obtained according to power balance between praimary and secondary sides of trnasformer.

$${\mathrm{P}}_{\mathrm{ac}}={({\mathrm{V}}_{\mathrm{Lm},\mathrm{f}})}^2/{\mathrm{R}}_{\mathrm{e},\mathrm{ac}}={\mathrm{P}}_{\mathrm{o}}={({\mathrm{V}}_{\mathrm{o}})}^2/{\mathrm{R}}_{\mathrm{o}}.$$

(3)

From Equations (2) and (3), the ac equivalent load resistance is calculated as.

$${\mathrm{R}}_{\mathrm{e},\mathrm{ac}}=\left\{\begin{array}{c}2{\mathrm{n}}^2{\mathrm{R}}_{\mathrm{o}}/{\mathsf{\pi }}^2, {\mathrm{S}}_{\mathrm{ac}2} \mathrm{off}\\ {\mathrm{n}}^2{\mathrm{R}}_{\mathrm{o}}/(2{\mathsf{\pi }}^2), {\mathrm{S}}_{\mathrm{ac}2} \mathrm{on}\end{array}\right..$$

(4)

From the linear circuit in Figure 6b, the voltage transfer function can be approximated by using the fundamental input and output voltages.

$${\mathrm{G}}_{\mathrm{ac}}({\mathrm{f}}_{\mathrm{sw}})=\left|\right({\mathrm{jX}}_{\mathrm{LM}}//{\mathrm{R}}_{\mathrm{e},\mathrm{ac}})/[({\mathrm{jX}}_{\mathrm{LM}}//{\mathrm{R}}_{\mathrm{e},\mathrm{ac}})+{\mathrm{jX}}_{\mathrm{Lr}}-{\mathrm{jX}}_{\mathrm{Cr}}\left]\right|={({\mathrm{V}}_{\mathrm{Lm},\mathrm{f}})}^2/{({\mathrm{V}}_{\mathrm{ac},\mathrm{f}})}^2,$$

(5)

where X_Lm = 2πf_swL_m, X_Lr = 2πf_swL_r and X_Cr =1/(2πf_swC_r). From Equations (1), (2) and (5), the voltage transfer function G_ac(f_sw) is obtained in Equations (6)–(8) for high, medium and low voltage input regions.

$$\begin{array}{l}{\mathrm{G}}_{\mathrm{ac}}({\mathrm{f}}_{\mathrm{sw}})=\frac{1}{\sqrt{{[1+\frac{{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2-1}{\frac{{\mathrm{L}}_{\mathrm{m}}}{{\mathrm{L}}_{\mathrm{r}}}{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2}]}^2+\frac{\frac{{\mathrm{L}}_{\mathrm{r}}/{\mathrm{C}}_{\mathrm{r}}}{{\mathrm{R}}_{\mathrm{e},\mathrm{ac}}^2}{[{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2-1]}^2}{{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2}}}=\frac{{\mathrm{nV}}_{\mathrm{o}}}{{\mathrm{V}}_{\mathrm{in}-\mathrm{H}}}\end{array}$$

(6)

$$\begin{array}{l}{\mathrm{G}}_{\mathrm{ac}}({\mathrm{f}}_{\mathrm{sw}})=\frac{1}{\sqrt{{[1+\frac{{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2-1}{\frac{{\mathrm{L}}_{\mathrm{m}}}{{\mathrm{L}}_{\mathrm{r}}}{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2}]}^2+\frac{\frac{{\mathrm{L}}_{\mathrm{r}}/{\mathrm{C}}_{\mathrm{r}}}{{\mathrm{R}}_{\mathrm{e},\mathrm{ac}}^2}{[{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2-1]}^2}{{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2}}}=\frac{{\mathrm{nV}}_{\mathrm{o}}}{2{\mathrm{V}}_{\mathrm{in}-\mathrm{M}}}\end{array}$$

(7)

$$\begin{array}{l}{\mathrm{G}}_{\mathrm{ac}}(f_{\mathrm{sw}})=\frac{1}{\sqrt{{[1+\frac{{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2-1}{\frac{{\mathrm{L}}_{\mathrm{m}}}{{\mathrm{L}}_{\mathrm{r}}}{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2}]}^2+\frac{\frac{{\mathrm{L}}_{\mathrm{r}}/{\mathrm{C}}_{\mathrm{r}}}{{\mathrm{R}}_{\mathrm{e},\mathrm{ac}}^2}{[{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2-1]}^2}{{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2}}}=\frac{{\mathrm{nV}}_{\mathrm{o}}}{4{\mathrm{V}}_{\mathrm{in}-\mathrm{L}}}\end{array}$$

(8)

Therefore, the load voltage V_o can be obtained under different input voltage conditions and expressed in Equations (9)–(11) for high, medium and low voltage input regions, respectively.

$$\begin{array}{l}{\mathrm{V}}_{\mathrm{o}}=\frac{{\mathrm{V}}_{\mathrm{in}-\mathrm{H}}}{\mathrm{n}\sqrt{{[1+\frac{{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2-1}{\frac{{\mathrm{L}}_{\mathrm{m}}}{{\mathrm{L}}_{\mathrm{r}}}{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2}]}^2+\frac{\frac{{\mathrm{L}}_{\mathrm{r}}/{\mathrm{C}}_{\mathrm{r}}}{{\mathrm{R}}_{\mathrm{e},\mathrm{ac}}^2}{[{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2-1]}^2}{{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2}}}\end{array}$$

(9)

$$\begin{array}{l}{\mathrm{V}}_{\mathrm{o}}=\frac{2{\mathrm{V}}_{\mathrm{in}-\mathrm{M}}}{\mathrm{n}\sqrt{{[1+\frac{{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2-1}{\frac{{\mathrm{L}}_{\mathrm{m}}}{{\mathrm{L}}_{\mathrm{r}}}{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2}]}^2+\frac{\frac{{\mathrm{L}}_{\mathrm{r}}/{\mathrm{C}}_{\mathrm{r}}}{{\mathrm{R}}_{\mathrm{e},\mathrm{ac}}^2}{[{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2-1]}^2}{{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2}}}\end{array}$$

(10)

$$\begin{array}{l}{\mathrm{V}}_{\mathrm{o}}=\frac{4{\mathrm{V}}_{\mathrm{in}-\mathrm{L}}}{\mathrm{n}\sqrt{{[1+\frac{{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2-1}{\frac{{\mathrm{L}}_{\mathrm{m}}}{{\mathrm{L}}_{\mathrm{r}}}{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2}]}^2+\frac{\frac{{\mathrm{L}}_{\mathrm{r}}/{\mathrm{C}}_{\mathrm{r}}}{{\mathrm{R}}_{\mathrm{e},\mathrm{ac}}^2}{[{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2-1]}^2}{{(\frac{{\mathrm{f}}_{\mathrm{sw}}}{{\mathrm{f}}_{\mathrm{r}}})}^2}}}\end{array}$$

(11)

The studied LLC converter is operated under wide voltage input (50–400 V), the load voltage V_o is 48 V and load power is 500 W. The resonant frequency f_r is designed at 100 kHz. The selected magnetizing and resonant inductances are L_m = 6L_r. For high (V_in-H, 200 V–400 V), medium (V_in-M, 100 V–200 V) and low (V_in-L, 50 V–100 V) voltage input ranges, the equivalent resonant circuit models in Figure 6b are identical. Thus, the converter operated at high voltage input region is designed in the following discussion. According to Equation (6), it is clear that the proposed converter has the minimum voltage gain at V_in = 400 V and has the maximum voltage gain at V_in = 200 V. It is assumed that the dc gain at V_in = 400 V input is designed as 0.95. From Equation (6), the primary-secondary turn n = n_p/n_s is obtained in Equation (12).

$$\mathrm{n}={\mathrm{n}}_{\mathrm{p}}/{\mathrm{n}}_{\mathrm{s}}={\mathrm{G}}_{\mathrm{ac}}({\mathrm{f}}_{\mathrm{sw}}){\mathrm{V}}_{\mathrm{in},\max }/{\mathrm{V}}_{\mathrm{o}}=0.95\times 400/48=7.916.$$

(12)

The magnetic core TDK EE-55 with n = n_p/n_s = 16/2 = 8 is used to implement transformer T. Therefore, the voltage gains at V_in = 400 V and 200 V are calculated in Equations (13) and (14).

$${\mathrm{G}}_{\mathrm{ac},\min }={\mathrm{nV}}_{\mathrm{o}}/{\mathrm{V}}_{\mathrm{in},\max }=8\times 48/400=0.96.$$

(13)

$${\mathrm{G}}_{\mathrm{ac},\max }={\mathrm{nV}}_{\mathrm{o}}/{\mathrm{V}}_{\mathrm{in},\min }=8\times 48/200=1.92.$$

(14)

For high voltage input range, S_ac2 is off. From Equation (4), the ac equivalent load resistance is calculated as.

$${\mathrm{R}}_{\mathrm{e},\mathrm{ac}}=2{\mathrm{n}}^2{\mathrm{R}}_{\mathrm{o}}/{\mathsf{\pi }}^2=2\times 8^2\times ({48}^2/500)/{\mathsf{\pi }}^2\approx 60 \mathsf{\Omega }.$$

(15)

The selected resonant inductance L_r = 7μH so that the magnetizing inductance L_m = 6L_r = 42 μH. The resonant capacitance C_r is calculated in Equation (16).

$${\mathrm{C}}_{\mathrm{r}}=1/(4{\mathsf{\pi }}^2{\mathrm{L}}_{\mathrm{r}}{\mathrm{f}}_{\mathrm{r}}^2)=1/(4\times {\mathsf{\pi }}^2\times 7\times {10}^{-6}\times {10}^5\times {10}^5)\approx 360 \mathrm{nF}.$$

(16)

MOSFETs TK50J60U with 600 V/25 A ratings are used for power switches S₁–S₄ and S_ac1. IXTP160N075T with 75 V/160 A ratings is used for power switch S_ac2. Power diodes MBR40100PT with 100 V/40 A ratings are adopted for the rectifier diodes D₁–D₄. The input and output capacitances are C_in1 = C_in2 = 300 μF and C_o1 = C_o2 = 540 μF. Two Schmitt voltage comparators are used to control PWM signals of S_ac1 and S_ac2. The reference voltages of two comparators are designed at 200 V (between medium and high voltage input regions) and 100 V (between low and medium voltage input regions).

Table 1. Specifications of the presented converter.

Items	Parameter
Input voltage Vin	50 V–400 V
Output voltage Vo	48 V
Rated power Po	500 W
Resonant frequency fr	100 kHz
Input capacitances Cin1, Cin2	300 μF/400 V
Onput capacitances Co1, Co2	540 μF/100 V
resonant capacitance Cr	360 nF
resonant inductance Lr	7 μH
Power switches S1–S4, Sac1	TK50J60U
Power switch Sac2	IXTP160N075T
Rectifier diodes D1–D4	MBR40100PT
Winding turns of T: np, ns, ns	16, 2, 2
Magnetizing inductance Lm	42 μH

shows the specifications of the active and passive components in the studied LLC converter.

5. Experimental Verification of the Presented Converter

The hardware circuit of the presented circuit shown in Figure 7 is setup and the circuit specifications are shown in Table 1. The prototype is tested and the measured waveforms are provided to confirm the effectiveness of the presented resonant converter. The PWM signals of active switches at 50 V input (low voltage input region), 190 V input (medium voltage input region) and 400 V input (high voltage input region) and full load are shown in Figure 8a–c respectively. For V_in = 50 V input (low voltage range), S_ac1 is off, S_ac2 is on and S₁–S₄ are active with switching frequency f_sw ≈ 65 kHz shown in Figure 8a. For V_in = 190 V input (medium voltage range), S_ac1 and S_ac2 are off and only S₁–S₄ are active with switching frequency f_sw ≈ 102 kHz (Figure 8b). For V_in = 400 V input (high voltage range), S_ac1 is on and S₁, S₂ and S_ac2 are off. Only S₃ and S₄ are active with switching frequency f_sw ≈ 108 kHz shown in Figure 8c. Figure 9 and Figure 10 give the experimental waveforms of input-side and output-side, respectively, at V_in = 50 V, 190 V and 400 V under full load. For 50 V input (low voltage range), S_ac2 is on so that D₁ and D₂ are active and D₃ and D₄ are in the off state as shown in Figure 10a. For 190 V and 400 V input conditions, S_ac2 is off so that D₁ and D₂ are reverse biased and D₃ and D₄ are active (Figure 10b,c). From the measured waveforms in Figure 10, the output capacitor voltages V_Co1 and V_Co2 are balanced well. Figure 11 gives the PWM signals of power switch S₁ or S₃ at 50 V, 190 V and 400 V input under 20% and 100% loads. It can observe the ZVS operation of S₁ and S₃ is realized for both 20% and 100% loads. Figure 12a shows the input voltage V_in and the gating voltage v_Sac2,g between V_in = 50 V and 400 V. When V_in ≥ or < 100 V, S_ac2 is off (medium or high voltage range) or on (low voltage range). Figure 12b provides the input voltage V_in and PWM voltages v_Sac1, v_S1,g and v_S2,g between V_in = 0 V and 400 V. When V_in ≥ 200 V (high voltage input region), S_ac1 is turned on and S₁ and S₂ are turned off. The converter efficiencies for different input voltages and loads are given in

Table 2. Measured efficiencies under input voltage and load conditions.

Input Voltage Vin	Efficiency
Vin = 50 V & 50% load (low voltage range)	88.1%
Vin = 50 V & 100% load (low voltage range)	87.2%
Vin = 90 V & 50% load (low voltage range)	89.7%
Vin = 90 V & 100% load (low voltage range)	88.1%
Vin = 110 V & 50% load (medium voltage range)	89.5%
Vin = 110 V & 100% load (medium voltage range)	88.2%
Vin = 190 V & 50% load (medium voltage range)	91.3%
Vin = 190 V & 100% load (medium voltage range)	90.1%
Vin = 210 V & 50% load (high voltage range)	90.3%
Vin = 210 V & 100% load (high voltage range)	89.6%
Vin = 400 V & 50% load (high voltage range)	92.5%
Vin = 400 V & 100% load (high voltage range)	91.8%

. Under low voltage input region, the 2n_s winding turns are used on the output-side. Therefore, the higher primary-side current is introduced and the conduction losses on switches and winding turns are increased compared to the n_s winding turns used on the output-side under medium and high voltage input regions. Thus, the circuit efficiency at low voltage input region is less than the medium or high voltage input region under the same load. The measured switching frequency at different loads and input conditions are provided in

Table 3. Measured switching frequencies under input voltage and load conditions.

Input Voltage Vin	Switching Frequency fsw (kHz)
Vin = 50 V & 50% load (low voltage range)	61
Vin = 50 V & 100% load (low voltage range)	52
Vin = 90 V & 50% load (low voltage range)	85
Vin = 90 V & 100% load (low voltage range)	81
Vin = 110 V & 50% load (medium voltage range)	57
Vin = 110 V & 100% load (medium voltage range)	55
Vin = 190 V & 50% load (medium voltage range)	101
Vin = 190 V & 100% load (medium voltage range)	98
Vin = 210 V & 50% load (high voltage range)	57
Vin = 210 V & 100% load (high voltage range)	54
Vin = 400 V & 50% load (high voltage range)	104
Vin = 400 V & 100% load (high voltage range)	97

. On each input voltage region, the higher input voltage results in the higher switching frequency under the same load.

6. Conclusions

A new ZVS LLC converter is presented, analysis and realized to have wide load soft switching and wide voltage input operation. In order to accomplish wide load range of ZVS operation, the LLC resonant tank is used to accomplish ZVS turn-on for all active devices. According to the different input voltage ranges (50 V–400 V), the variable voltage gain is used to regulate load voltage constant. To realize the variable voltage gain which is related to the input voltage range (low, medium or high voltage range), two ac power switches are adopted in order to select half bridge or full bridge resonant circuit with the different turns-ratio of transformer. Thus, the wide range of input voltage operation is realized in the proposed circuit. The studied LLC converter can be applied to wide voltage input variation such as switching power converters with long hold-up time requirement, battery systems or solar panel. Compared to the other wide voltage circuit topologies, the proposed converter has no dc voltage level on the resonant converter [17] and less diode conduction loss [18]. However, more power devices are still needed in the proposed converter to realize 8:1 wide voltage operation. Thus, the cost issue is the main drawback of the studied circuit for industry applications. The presented converter has been developed in the laboratory and its effectiveness was validated through experiments by a laboratory prototype circuit.