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Applied Sciences
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New Trends in Real-Time Embedded Systems
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New Trends in Real-Time Embedded Systems

A special issue of Applied Sciences (ISSN 2076-3417). This special issue belongs to the section "Electrical, Electronics and Communications Engineering".

Deadline for manuscript submissions: closed (20 December 2021) | Viewed by 10622

Special Issue Editors

Prof. Dr. William Fornaciari

E-Mail Website
Guest Editor
Politecnico di Milano – DEIB, Milano, Italy
Interests: embedded systems; high-performance computing; energy aware design of Hw and Sw; multi-many cores; performance predictability and real-time; cybersecurity
Special Issues, Collections and Topics in MDPI journals
Dr. Luigi Pomante

E-Mail Website
Guest Editor
1. Department of Information Engineering, Computer Science and Mathematics, University of L’Aquila, 67100 L’Aquila, Italy
2. Center of Excellence DEWS, University of L’Aquila, 67100 L’Aquila, Italy
Interests: electronic design automation (with focus on ESL HW/SW co-design); networked embedded systems (with focus on wireless sensor networks)
Special Issues, Collections and Topics in MDPI journals
Dr. Giacomo Valente

E-Mail Website
Guest Editor
Università degli Studi dell’Aquila – DISIM/DEWS, L’Aquila, Italy
Interests: system monitoring; real-time systems; edge-computing; hardware reconfiguration
Special Issues, Collections and Topics in MDPI journals
Dr. Vittoriano Muttillo

E-Mail Website
Guest Editor
Università degli Studi dell’Aquila – DISIM/DEWS, L’Aquila, Italy
Interests: electronic design automation; embedded and cyberphysical systems; software engineering; machine learning; model-driven engineering; formal specification; real-time systems; system monitoring

Special Issue Information

Dear Colleagues,

The never-ending evolutions of the applications and of the computing platforms are exacerbating most of the existing design issues, especially because the architectures are becoming more and more specialized and heterogeneous, and the workload rather mixed. Not purely functional design requirements are driving the choices of the system’ architects and application developers, and fulfilling the crucial needs of power consumption and timing predictability is becoming very problematic, especially if the cost-effectiveness of the computing platform remains one of the major constraints. Conservative solutions are still important, but many other approaches can be sought to balance performance and cost.

This Special Issue is tackling such a problem from a cross-domain perspective, focusing on the aspects of software, hardware, and real-time theory that are mostly affecting the timing behavior of modern embedded systems.

Topics of interest include but are not limited to the following areas:

  • New trends in schedulability/feasibility analysis (e.g., theoretical and/or applied to academic/industrial use cases) in single/multi-core scenarios with focus on performance;
  • New Trends in WCET analysis and evaluation with novel methodologies (e.g., AI/ML, pWCET, new approach to WCET estimation and evaluations);
  • Dynamic (partial) reconfiguration for real-time embedded systems;
  • HW accelerators for system performance enhancement and power/energy-awareness for real-time systems;
  • Use of AI/ML for real-time embedded systems (e.g., schedulability, partitioning, dynamic allocation/binding, system predictions and simulations);
  • Real-time embedded systems simulations, emulations, and analysis;
  • Novel real-time communications models and Infrastructures for single/multi-core systems;
  • New trends in hypervisors and mixed-criticality systems;
  • New trends for security and/or reliability for real-time embedded systems.

Prof. Dr. William Fornaciari
Dr. Luigi Pomante
Dr. Giacomo Valente
Dr. Vittoriano Muttillo
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Applied Sciences is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • embedded systems
  • real-time systems
  • mixed-criticality systems
  • networked embedded systems
  • electronic design automation
  • ESL HW/SW co-design
  • dynamic partial reconfiguration
  • machine learning

Published Papers (4 papers)

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Research

26 pages, 6382 KiB  
Article
A Novel Framework for Testing High-Speed Serial Interfaces in Multiprocessor Based Real-Time Embedded System
by Sabeen Masood, Shoab Ahmed Khan, Ali Hassan and Urooj Fatima
Appl. Sci. 2021, 11(16), 7465; https://0-doi-org.brum.beds.ac.uk/10.3390/app11167465 - 13 Aug 2021
Cited by 3 | Viewed by 2428
Abstract
Recent years has seen a tremendous increase in processing requirements of present-day embedded system applications. Embedded systems consist of multiple processing elements (PEs) connected to each other using different types of interfaces. Many complicated tasks are accomplished by embedded systems in varied settings, [...] Read more.
Recent years has seen a tremendous increase in processing requirements of present-day embedded system applications. Embedded systems consist of multiple processing elements (PEs) connected to each other using different types of interfaces. Many complicated tasks are accomplished by embedded systems in varied settings, which may introduce errors during inter-processor communication. Testing such systems is tremendously difficult and challenging from testing non-real time systems. A major part of testing real time embedded systems involves ensuring accuracy and timing in synchronous inter-process communication More specifically, the synchronization and inter-processor communication of real-time applications makes testing a challenging task and due to the demand for higher data rate increases, day-by-day, making testing of such systems even more complex. This paper presents a novel frame work that uses multiple instances of simulators with physical high-speed serial interfaces to emulate any real time embedded system communication. The framework presents a testing technique that detects all faults related to synchronization of high-speed synchronous serial interfaces in a systematic manner. The novelty of our approach is to simulate communication across multiple processors in a simulation environment for detecting and localizing bugs. We verify this framework using a case study consisting of an embedded software defined radio (SDR) system. The test results show the applicability of our approach in fixing bugs that relates to synchronization issues that otherwise are very hard to find and fix in very complicated systems, such as SDR. Full article
(This article belongs to the Special Issue New Trends in Real-Time Embedded Systems)
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22 pages, 845 KiB  
Article
A Measurement-Based Message-Level Timing Prediction Approach for Data-Dependent SDFGs on Tile-Based Heterogeneous MPSoCs
by Ralf Stemmer, Hai-Dang Vu, Sébastien Le Nours, Kim Grüttner, Sébastien Pillement and Wolfgang Nebel
Appl. Sci. 2021, 11(14), 6649; https://0-doi-org.brum.beds.ac.uk/10.3390/app11146649 - 20 Jul 2021
Cited by 1 | Viewed by 2320
Abstract
Fast yet accurate performance and timing prediction of complex parallel data flow applications on multi-processor systems remains a very difficult discipline. The reason for it comes from the complexity of the data flow applications w.r.t. data dependent execution paths and the hardware platform [...] Read more.
Fast yet accurate performance and timing prediction of complex parallel data flow applications on multi-processor systems remains a very difficult discipline. The reason for it comes from the complexity of the data flow applications w.r.t. data dependent execution paths and the hardware platform with shared resources, like buses and memories. This combination may lead to complex timing interferences that are difficult to express in pure analytical or classical simulation-based approaches. In this work, we propose the combination of timing measurement and statistical simulation models for probabilistic timing and performance prediction of Synchronous Data Flow (SDF) applications on MPSoCs with shared memories. We exploit the separation of computation and communication in our SDF model of computation to set-up simulation-based performance prediction models following different abstraction approaches. We especially propose a message-level communication model driven by a data-dependent probabilistic execution phase timing model. We compare our work against measurement on two case-studies from the computer vision domain: a Sobel filter and a JPEG decoder. We show that the accuracy and execution time of our modeling and evaluation framework outperforms existing approaches and is suitable for a fast yet accurate design space exploration. Full article
(This article belongs to the Special Issue New Trends in Real-Time Embedded Systems)
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27 pages, 4327 KiB  
Article
Network Calculus-Based Latency for Time-Triggered Traffic under Flexible Window-Overlapping Scheduling (FWOS) in a Time-Sensitive Network (TSN)
by Khaled M. Shalghum, Nor Kamariah Noordin, Aduwati Sali and Fazirulhisyam Hashim
Appl. Sci. 2021, 11(9), 3896; https://0-doi-org.brum.beds.ac.uk/10.3390/app11093896 - 25 Apr 2021
Cited by 12 | Viewed by 2884
Abstract
Deterministic latency is an urgent demand to pursue the continuous increase in intelligence in several real-time applications, such as connected vehicles and automation industries. A time-sensitive network (TSN) is a new framework introduced to serve these applications. Several functions are defined in the [...] Read more.
Deterministic latency is an urgent demand to pursue the continuous increase in intelligence in several real-time applications, such as connected vehicles and automation industries. A time-sensitive network (TSN) is a new framework introduced to serve these applications. Several functions are defined in the TSN standard to support time-triggered (TT) requirements, such as IEEE 802.1Qbv and IEEE 802.1Qbu for traffic scheduling and preemption mechanisms, respectively. However, implementing strict timing constraints to support scheduled traffic can miss the needs of unscheduled real-time flows. Accordingly, more relaxed scheduling algorithms are required. In this paper, we introduce the flexible window-overlapping scheduling (FWOS) algorithm that optimizes the overlapping among TT windows by three different metrics: the priority of overlapping, the position of overlapping, and the overlapping ratio (OR). An analytical model for the worst-case end-to-end delay (WCD) is derived using the network calculus (NC) approach considering the relative relationships between window offsets for consecutive nodes and evaluated under a realistic vehicle use case. While guaranteeing latency deadline for TT traffic, the FWOS algorithm defines the maximum allowable OR that maximizes the bandwidth available for unscheduled transmission. Even under a non-overlapping scenario, less pessimistic latency bounds have been obtained using FWOS than the latest related works. Full article
(This article belongs to the Special Issue New Trends in Real-Time Embedded Systems)
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21 pages, 3100 KiB  
Article
Towards Fully Jitterless Applications: Periodic Scheduling in Multiprocessor MCSs Using a Table-Driven Approach
by Eugenia Ana Capota, Cristina Sorina Stangaciu, Mihai Victor Micea and Daniel-Ioan Curiac
Appl. Sci. 2020, 10(19), 6702; https://0-doi-org.brum.beds.ac.uk/10.3390/app10196702 - 25 Sep 2020
Cited by 3 | Viewed by 1785
Abstract
In mixed criticality systems (MCSs), the time-triggered scheduling approach focuses on a special case of safety-critical embedded applications which run in a time-triggered environment. Sometimes, for these types of MCSs, perfectly periodical (i.e., jitterless) scheduling for certain critical tasks is needed. In this [...] Read more.
In mixed criticality systems (MCSs), the time-triggered scheduling approach focuses on a special case of safety-critical embedded applications which run in a time-triggered environment. Sometimes, for these types of MCSs, perfectly periodical (i.e., jitterless) scheduling for certain critical tasks is needed. In this paper, we propose FENP_MC (Fixed Execution Non-Preemptive Mixed Criticality), a real-time, table-driven, non-preemptive scheduling method specifically adapted to mixed criticality systems which guarantees jitterless execution in a mixed criticality time-triggered environment. We also provide a multiprocessor version, namely, P_FENP_MC (Partitioned Fixed Execution Non-Preemptive Mixed Criticality), using a partitioning heuristic. Feasibility tests are proposed for both uniprocessor and homogenous multiprocessor systems. An analysis of the algorithm performance is presented in terms of success ratio and scheduling jitter by comparing it against a time-triggered and an event-driven method in a non-preemptive context. Full article
(This article belongs to the Special Issue New Trends in Real-Time Embedded Systems)
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